1 /* 2 * PowerNV setup code. 3 * 4 * Copyright 2011 IBM Corp. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 */ 11 12 #undef DEBUG 13 14 #include <linux/cpu.h> 15 #include <linux/errno.h> 16 #include <linux/sched.h> 17 #include <linux/kernel.h> 18 #include <linux/tty.h> 19 #include <linux/reboot.h> 20 #include <linux/init.h> 21 #include <linux/console.h> 22 #include <linux/delay.h> 23 #include <linux/irq.h> 24 #include <linux/seq_file.h> 25 #include <linux/of.h> 26 #include <linux/of_fdt.h> 27 #include <linux/interrupt.h> 28 #include <linux/bug.h> 29 #include <linux/pci.h> 30 #include <linux/cpufreq.h> 31 32 #include <asm/machdep.h> 33 #include <asm/firmware.h> 34 #include <asm/xics.h> 35 #include <asm/opal.h> 36 #include <asm/kexec.h> 37 #include <asm/smp.h> 38 39 #include "powernv.h" 40 41 static void __init pnv_setup_arch(void) 42 { 43 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); 44 45 /* Initialize SMP */ 46 pnv_smp_init(); 47 48 /* Setup PCI */ 49 pnv_pci_init(); 50 51 /* Setup RTC and NVRAM callbacks */ 52 if (firmware_has_feature(FW_FEATURE_OPAL)) 53 opal_nvram_init(); 54 55 /* Enable NAP mode */ 56 powersave_nap = 1; 57 58 /* XXX PMCS */ 59 } 60 61 static void __init pnv_init(void) 62 { 63 /* 64 * Initialize the LPC bus now so that legacy serial 65 * ports can be found on it 66 */ 67 opal_lpc_init(); 68 69 #ifdef CONFIG_HVC_OPAL 70 if (firmware_has_feature(FW_FEATURE_OPAL)) 71 hvc_opal_init_early(); 72 else 73 #endif 74 add_preferred_console("hvc", 0, NULL); 75 } 76 77 static void __init pnv_init_IRQ(void) 78 { 79 xics_init(); 80 81 WARN_ON(!ppc_md.get_irq); 82 } 83 84 static void pnv_show_cpuinfo(struct seq_file *m) 85 { 86 struct device_node *root; 87 const char *model = ""; 88 89 root = of_find_node_by_path("/"); 90 if (root) 91 model = of_get_property(root, "model", NULL); 92 seq_printf(m, "machine\t\t: PowerNV %s\n", model); 93 if (firmware_has_feature(FW_FEATURE_OPAL)) 94 seq_printf(m, "firmware\t: OPAL\n"); 95 else 96 seq_printf(m, "firmware\t: BML\n"); 97 of_node_put(root); 98 if (radix_enabled()) 99 seq_printf(m, "MMU\t\t: Radix\n"); 100 else 101 seq_printf(m, "MMU\t\t: Hash\n"); 102 } 103 104 static void pnv_prepare_going_down(void) 105 { 106 /* 107 * Disable all notifiers from OPAL, we can't 108 * service interrupts anymore anyway 109 */ 110 opal_event_shutdown(); 111 112 /* Soft disable interrupts */ 113 local_irq_disable(); 114 115 /* 116 * Return secondary CPUs to firwmare if a flash update 117 * is pending otherwise we will get all sort of error 118 * messages about CPU being stuck etc.. This will also 119 * have the side effect of hard disabling interrupts so 120 * past this point, the kernel is effectively dead. 121 */ 122 opal_flash_term_callback(); 123 } 124 125 static void __noreturn pnv_restart(char *cmd) 126 { 127 long rc = OPAL_BUSY; 128 129 pnv_prepare_going_down(); 130 131 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { 132 rc = opal_cec_reboot(); 133 if (rc == OPAL_BUSY_EVENT) 134 opal_poll_events(NULL); 135 else 136 mdelay(10); 137 } 138 for (;;) 139 opal_poll_events(NULL); 140 } 141 142 static void __noreturn pnv_power_off(void) 143 { 144 long rc = OPAL_BUSY; 145 146 pnv_prepare_going_down(); 147 148 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { 149 rc = opal_cec_power_down(0); 150 if (rc == OPAL_BUSY_EVENT) 151 opal_poll_events(NULL); 152 else 153 mdelay(10); 154 } 155 for (;;) 156 opal_poll_events(NULL); 157 } 158 159 static void __noreturn pnv_halt(void) 160 { 161 pnv_power_off(); 162 } 163 164 static void pnv_progress(char *s, unsigned short hex) 165 { 166 } 167 168 static void pnv_shutdown(void) 169 { 170 /* Let the PCI code clear up IODA tables */ 171 pnv_pci_shutdown(); 172 173 /* 174 * Stop OPAL activity: Unregister all OPAL interrupts so they 175 * don't fire up while we kexec and make sure all potentially 176 * DMA'ing ops are complete (such as dump retrieval). 177 */ 178 opal_shutdown(); 179 } 180 181 #ifdef CONFIG_KEXEC_CORE 182 static void pnv_kexec_wait_secondaries_down(void) 183 { 184 int my_cpu, i, notified = -1; 185 186 my_cpu = get_cpu(); 187 188 for_each_online_cpu(i) { 189 uint8_t status; 190 int64_t rc, timeout = 1000; 191 192 if (i == my_cpu) 193 continue; 194 195 for (;;) { 196 rc = opal_query_cpu_status(get_hard_smp_processor_id(i), 197 &status); 198 if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED) 199 break; 200 barrier(); 201 if (i != notified) { 202 printk(KERN_INFO "kexec: waiting for cpu %d " 203 "(physical %d) to enter OPAL\n", 204 i, paca[i].hw_cpu_id); 205 notified = i; 206 } 207 208 /* 209 * On crash secondaries might be unreachable or hung, 210 * so timeout if we've waited too long 211 * */ 212 mdelay(1); 213 if (timeout-- == 0) { 214 printk(KERN_ERR "kexec: timed out waiting for " 215 "cpu %d (physical %d) to enter OPAL\n", 216 i, paca[i].hw_cpu_id); 217 break; 218 } 219 } 220 } 221 } 222 223 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary) 224 { 225 xics_kexec_teardown_cpu(secondary); 226 227 /* On OPAL, we return all CPUs to firmware */ 228 229 if (!firmware_has_feature(FW_FEATURE_OPAL)) 230 return; 231 232 if (secondary) { 233 /* Return secondary CPUs to firmware on OPAL v3 */ 234 mb(); 235 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE; 236 mb(); 237 238 /* Return the CPU to OPAL */ 239 opal_return_cpu(); 240 } else { 241 /* Primary waits for the secondaries to have reached OPAL */ 242 pnv_kexec_wait_secondaries_down(); 243 244 /* 245 * We might be running as little-endian - now that interrupts 246 * are disabled, reset the HILE bit to big-endian so we don't 247 * take interrupts in the wrong endian later 248 */ 249 opal_reinit_cpus(OPAL_REINIT_CPUS_HILE_BE); 250 } 251 } 252 #endif /* CONFIG_KEXEC_CORE */ 253 254 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE 255 static unsigned long pnv_memory_block_size(void) 256 { 257 return 256UL * 1024 * 1024; 258 } 259 #endif 260 261 static void __init pnv_setup_machdep_opal(void) 262 { 263 ppc_md.get_boot_time = opal_get_boot_time; 264 ppc_md.restart = pnv_restart; 265 pm_power_off = pnv_power_off; 266 ppc_md.halt = pnv_halt; 267 ppc_md.machine_check_exception = opal_machine_check; 268 ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery; 269 ppc_md.hmi_exception_early = opal_hmi_exception_early; 270 ppc_md.handle_hmi_exception = opal_handle_hmi_exception; 271 } 272 273 static int __init pnv_probe(void) 274 { 275 if (!of_machine_is_compatible("ibm,powernv")) 276 return 0; 277 278 if (firmware_has_feature(FW_FEATURE_OPAL)) 279 pnv_setup_machdep_opal(); 280 281 pr_debug("PowerNV detected !\n"); 282 283 pnv_init(); 284 285 return 1; 286 } 287 288 /* 289 * Returns the cpu frequency for 'cpu' in Hz. This is used by 290 * /proc/cpuinfo 291 */ 292 static unsigned long pnv_get_proc_freq(unsigned int cpu) 293 { 294 unsigned long ret_freq; 295 296 ret_freq = cpufreq_quick_get(cpu) * 1000ul; 297 298 /* 299 * If the backend cpufreq driver does not exist, 300 * then fallback to old way of reporting the clockrate. 301 */ 302 if (!ret_freq) 303 ret_freq = ppc_proc_freq; 304 return ret_freq; 305 } 306 307 define_machine(powernv) { 308 .name = "PowerNV", 309 .probe = pnv_probe, 310 .setup_arch = pnv_setup_arch, 311 .init_IRQ = pnv_init_IRQ, 312 .show_cpuinfo = pnv_show_cpuinfo, 313 .get_proc_freq = pnv_get_proc_freq, 314 .progress = pnv_progress, 315 .machine_shutdown = pnv_shutdown, 316 .power_save = NULL, 317 .calibrate_decr = generic_calibrate_decr, 318 #ifdef CONFIG_KEXEC_CORE 319 .kexec_cpu_down = pnv_kexec_cpu_down, 320 #endif 321 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE 322 .memory_block_size = pnv_memory_block_size, 323 #endif 324 }; 325