1 /* 2 * PowerNV setup code. 3 * 4 * Copyright 2011 IBM Corp. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 */ 11 12 #undef DEBUG 13 14 #include <linux/cpu.h> 15 #include <linux/errno.h> 16 #include <linux/sched.h> 17 #include <linux/kernel.h> 18 #include <linux/tty.h> 19 #include <linux/reboot.h> 20 #include <linux/init.h> 21 #include <linux/console.h> 22 #include <linux/delay.h> 23 #include <linux/irq.h> 24 #include <linux/seq_file.h> 25 #include <linux/of.h> 26 #include <linux/of_fdt.h> 27 #include <linux/interrupt.h> 28 #include <linux/bug.h> 29 #include <linux/pci.h> 30 #include <linux/cpufreq.h> 31 32 #include <asm/machdep.h> 33 #include <asm/firmware.h> 34 #include <asm/xics.h> 35 #include <asm/xive.h> 36 #include <asm/opal.h> 37 #include <asm/kexec.h> 38 #include <asm/smp.h> 39 #include <asm/tm.h> 40 #include <asm/setup.h> 41 #include <asm/security_features.h> 42 43 #include "powernv.h" 44 45 46 static bool fw_feature_is(const char *state, const char *name, 47 struct device_node *fw_features) 48 { 49 struct device_node *np; 50 bool rc = false; 51 52 np = of_get_child_by_name(fw_features, name); 53 if (np) { 54 rc = of_property_read_bool(np, state); 55 of_node_put(np); 56 } 57 58 return rc; 59 } 60 61 static void init_fw_feat_flags(struct device_node *np) 62 { 63 if (fw_feature_is("enabled", "inst-spec-barrier-ori31,31,0", np)) 64 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31); 65 66 if (fw_feature_is("enabled", "fw-bcctrl-serialized", np)) 67 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED); 68 69 if (fw_feature_is("enabled", "inst-l1d-flush-ori30,30,0", np)) 70 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30); 71 72 if (fw_feature_is("enabled", "inst-l1d-flush-trig2", np)) 73 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2); 74 75 if (fw_feature_is("enabled", "fw-l1d-thread-split", np)) 76 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV); 77 78 if (fw_feature_is("enabled", "fw-count-cache-disabled", np)) 79 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED); 80 81 if (fw_feature_is("enabled", "fw-count-cache-flush-bcctr2,0,0", np)) 82 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST); 83 84 if (fw_feature_is("enabled", "needs-count-cache-flush-on-context-switch", np)) 85 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE); 86 87 /* 88 * The features below are enabled by default, so we instead look to see 89 * if firmware has *disabled* them, and clear them if so. 90 */ 91 if (fw_feature_is("disabled", "speculation-policy-favor-security", np)) 92 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY); 93 94 if (fw_feature_is("disabled", "needs-l1d-flush-msr-pr-0-to-1", np)) 95 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR); 96 97 if (fw_feature_is("disabled", "needs-l1d-flush-msr-hv-1-to-0", np)) 98 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV); 99 100 if (fw_feature_is("disabled", "needs-spec-barrier-for-bound-checks", np)) 101 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR); 102 } 103 104 static void pnv_setup_rfi_flush(void) 105 { 106 struct device_node *np, *fw_features; 107 enum l1d_flush_type type; 108 bool enable; 109 110 /* Default to fallback in case fw-features are not available */ 111 type = L1D_FLUSH_FALLBACK; 112 113 np = of_find_node_by_name(NULL, "ibm,opal"); 114 fw_features = of_get_child_by_name(np, "fw-features"); 115 of_node_put(np); 116 117 if (fw_features) { 118 init_fw_feat_flags(fw_features); 119 of_node_put(fw_features); 120 121 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2)) 122 type = L1D_FLUSH_MTTRIG; 123 124 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30)) 125 type = L1D_FLUSH_ORI; 126 } 127 128 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \ 129 (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR) || \ 130 security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV)); 131 132 setup_rfi_flush(type, enable); 133 setup_count_cache_flush(); 134 } 135 136 static void __init pnv_setup_arch(void) 137 { 138 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); 139 140 pnv_setup_rfi_flush(); 141 setup_stf_barrier(); 142 143 /* Initialize SMP */ 144 pnv_smp_init(); 145 146 /* Setup PCI */ 147 pnv_pci_init(); 148 149 /* Setup RTC and NVRAM callbacks */ 150 if (firmware_has_feature(FW_FEATURE_OPAL)) 151 opal_nvram_init(); 152 153 /* Enable NAP mode */ 154 powersave_nap = 1; 155 156 /* XXX PMCS */ 157 } 158 159 static void __init pnv_init(void) 160 { 161 /* 162 * Initialize the LPC bus now so that legacy serial 163 * ports can be found on it 164 */ 165 opal_lpc_init(); 166 167 #ifdef CONFIG_HVC_OPAL 168 if (firmware_has_feature(FW_FEATURE_OPAL)) 169 hvc_opal_init_early(); 170 else 171 #endif 172 add_preferred_console("hvc", 0, NULL); 173 } 174 175 static void __init pnv_init_IRQ(void) 176 { 177 /* Try using a XIVE if available, otherwise use a XICS */ 178 if (!xive_native_init()) 179 xics_init(); 180 181 WARN_ON(!ppc_md.get_irq); 182 } 183 184 static void pnv_show_cpuinfo(struct seq_file *m) 185 { 186 struct device_node *root; 187 const char *model = ""; 188 189 root = of_find_node_by_path("/"); 190 if (root) 191 model = of_get_property(root, "model", NULL); 192 seq_printf(m, "machine\t\t: PowerNV %s\n", model); 193 if (firmware_has_feature(FW_FEATURE_OPAL)) 194 seq_printf(m, "firmware\t: OPAL\n"); 195 else 196 seq_printf(m, "firmware\t: BML\n"); 197 of_node_put(root); 198 if (radix_enabled()) 199 seq_printf(m, "MMU\t\t: Radix\n"); 200 else 201 seq_printf(m, "MMU\t\t: Hash\n"); 202 } 203 204 static void pnv_prepare_going_down(void) 205 { 206 /* 207 * Disable all notifiers from OPAL, we can't 208 * service interrupts anymore anyway 209 */ 210 opal_event_shutdown(); 211 212 /* Print flash update message if one is scheduled. */ 213 opal_flash_update_print_message(); 214 215 smp_send_stop(); 216 217 hard_irq_disable(); 218 } 219 220 static void __noreturn pnv_restart(char *cmd) 221 { 222 long rc = OPAL_BUSY; 223 224 pnv_prepare_going_down(); 225 226 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { 227 rc = opal_cec_reboot(); 228 if (rc == OPAL_BUSY_EVENT) 229 opal_poll_events(NULL); 230 else 231 mdelay(10); 232 } 233 for (;;) 234 opal_poll_events(NULL); 235 } 236 237 static void __noreturn pnv_power_off(void) 238 { 239 long rc = OPAL_BUSY; 240 241 pnv_prepare_going_down(); 242 243 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { 244 rc = opal_cec_power_down(0); 245 if (rc == OPAL_BUSY_EVENT) 246 opal_poll_events(NULL); 247 else 248 mdelay(10); 249 } 250 for (;;) 251 opal_poll_events(NULL); 252 } 253 254 static void __noreturn pnv_halt(void) 255 { 256 pnv_power_off(); 257 } 258 259 static void pnv_progress(char *s, unsigned short hex) 260 { 261 } 262 263 static void pnv_shutdown(void) 264 { 265 /* Let the PCI code clear up IODA tables */ 266 pnv_pci_shutdown(); 267 268 /* 269 * Stop OPAL activity: Unregister all OPAL interrupts so they 270 * don't fire up while we kexec and make sure all potentially 271 * DMA'ing ops are complete (such as dump retrieval). 272 */ 273 opal_shutdown(); 274 } 275 276 #ifdef CONFIG_KEXEC_CORE 277 static void pnv_kexec_wait_secondaries_down(void) 278 { 279 int my_cpu, i, notified = -1; 280 281 my_cpu = get_cpu(); 282 283 for_each_online_cpu(i) { 284 uint8_t status; 285 int64_t rc, timeout = 1000; 286 287 if (i == my_cpu) 288 continue; 289 290 for (;;) { 291 rc = opal_query_cpu_status(get_hard_smp_processor_id(i), 292 &status); 293 if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED) 294 break; 295 barrier(); 296 if (i != notified) { 297 printk(KERN_INFO "kexec: waiting for cpu %d " 298 "(physical %d) to enter OPAL\n", 299 i, paca_ptrs[i]->hw_cpu_id); 300 notified = i; 301 } 302 303 /* 304 * On crash secondaries might be unreachable or hung, 305 * so timeout if we've waited too long 306 * */ 307 mdelay(1); 308 if (timeout-- == 0) { 309 printk(KERN_ERR "kexec: timed out waiting for " 310 "cpu %d (physical %d) to enter OPAL\n", 311 i, paca_ptrs[i]->hw_cpu_id); 312 break; 313 } 314 } 315 } 316 } 317 318 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary) 319 { 320 u64 reinit_flags; 321 322 if (xive_enabled()) 323 xive_teardown_cpu(); 324 else 325 xics_kexec_teardown_cpu(secondary); 326 327 /* On OPAL, we return all CPUs to firmware */ 328 if (!firmware_has_feature(FW_FEATURE_OPAL)) 329 return; 330 331 if (secondary) { 332 /* Return secondary CPUs to firmware on OPAL v3 */ 333 mb(); 334 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE; 335 mb(); 336 337 /* Return the CPU to OPAL */ 338 opal_return_cpu(); 339 } else { 340 /* Primary waits for the secondaries to have reached OPAL */ 341 pnv_kexec_wait_secondaries_down(); 342 343 /* Switch XIVE back to emulation mode */ 344 if (xive_enabled()) 345 xive_shutdown(); 346 347 /* 348 * We might be running as little-endian - now that interrupts 349 * are disabled, reset the HILE bit to big-endian so we don't 350 * take interrupts in the wrong endian later 351 * 352 * We reinit to enable both radix and hash on P9 to ensure 353 * the mode used by the next kernel is always supported. 354 */ 355 reinit_flags = OPAL_REINIT_CPUS_HILE_BE; 356 if (cpu_has_feature(CPU_FTR_ARCH_300)) 357 reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX | 358 OPAL_REINIT_CPUS_MMU_HASH; 359 opal_reinit_cpus(reinit_flags); 360 } 361 } 362 #endif /* CONFIG_KEXEC_CORE */ 363 364 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE 365 static unsigned long pnv_memory_block_size(void) 366 { 367 return 256UL * 1024 * 1024; 368 } 369 #endif 370 371 static void __init pnv_setup_machdep_opal(void) 372 { 373 ppc_md.get_boot_time = opal_get_boot_time; 374 ppc_md.restart = pnv_restart; 375 pm_power_off = pnv_power_off; 376 ppc_md.halt = pnv_halt; 377 /* ppc_md.system_reset_exception gets filled in by pnv_smp_init() */ 378 ppc_md.machine_check_exception = opal_machine_check; 379 ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery; 380 ppc_md.hmi_exception_early = opal_hmi_exception_early; 381 ppc_md.handle_hmi_exception = opal_handle_hmi_exception; 382 } 383 384 static int __init pnv_probe(void) 385 { 386 if (!of_machine_is_compatible("ibm,powernv")) 387 return 0; 388 389 if (firmware_has_feature(FW_FEATURE_OPAL)) 390 pnv_setup_machdep_opal(); 391 392 pr_debug("PowerNV detected !\n"); 393 394 pnv_init(); 395 396 return 1; 397 } 398 399 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 400 void __init pnv_tm_init(void) 401 { 402 if (!firmware_has_feature(FW_FEATURE_OPAL) || 403 !pvr_version_is(PVR_POWER9) || 404 early_cpu_has_feature(CPU_FTR_TM)) 405 return; 406 407 if (opal_reinit_cpus(OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED) != OPAL_SUCCESS) 408 return; 409 410 pr_info("Enabling TM (Transactional Memory) with Suspend Disabled\n"); 411 cur_cpu_spec->cpu_features |= CPU_FTR_TM; 412 /* Make sure "normal" HTM is off (it should be) */ 413 cur_cpu_spec->cpu_user_features2 &= ~PPC_FEATURE2_HTM; 414 /* Turn on no suspend mode, and HTM no SC */ 415 cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NO_SUSPEND | \ 416 PPC_FEATURE2_HTM_NOSC; 417 tm_suspend_disabled = true; 418 } 419 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 420 421 /* 422 * Returns the cpu frequency for 'cpu' in Hz. This is used by 423 * /proc/cpuinfo 424 */ 425 static unsigned long pnv_get_proc_freq(unsigned int cpu) 426 { 427 unsigned long ret_freq; 428 429 ret_freq = cpufreq_get(cpu) * 1000ul; 430 431 /* 432 * If the backend cpufreq driver does not exist, 433 * then fallback to old way of reporting the clockrate. 434 */ 435 if (!ret_freq) 436 ret_freq = ppc_proc_freq; 437 return ret_freq; 438 } 439 440 define_machine(powernv) { 441 .name = "PowerNV", 442 .probe = pnv_probe, 443 .setup_arch = pnv_setup_arch, 444 .init_IRQ = pnv_init_IRQ, 445 .show_cpuinfo = pnv_show_cpuinfo, 446 .get_proc_freq = pnv_get_proc_freq, 447 .progress = pnv_progress, 448 .machine_shutdown = pnv_shutdown, 449 .power_save = NULL, 450 .calibrate_decr = generic_calibrate_decr, 451 #ifdef CONFIG_KEXEC_CORE 452 .kexec_cpu_down = pnv_kexec_cpu_down, 453 #endif 454 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE 455 .memory_block_size = pnv_memory_block_size, 456 #endif 457 }; 458