161305a96SBenjamin Herrenschmidt #ifndef __POWERNV_PCI_H 261305a96SBenjamin Herrenschmidt #define __POWERNV_PCI_H 361305a96SBenjamin Herrenschmidt 461305a96SBenjamin Herrenschmidt struct pci_dn; 561305a96SBenjamin Herrenschmidt 661305a96SBenjamin Herrenschmidt enum pnv_phb_type { 72de50e96SRussell Currey PNV_PHB_IODA1 = 0, 82de50e96SRussell Currey PNV_PHB_IODA2 = 1, 92de50e96SRussell Currey PNV_PHB_NPU = 2, 1061305a96SBenjamin Herrenschmidt }; 1161305a96SBenjamin Herrenschmidt 12cee72d5bSBenjamin Herrenschmidt /* Precise PHB model for error management */ 13cee72d5bSBenjamin Herrenschmidt enum pnv_phb_model { 14cee72d5bSBenjamin Herrenschmidt PNV_PHB_MODEL_UNKNOWN, 15cee72d5bSBenjamin Herrenschmidt PNV_PHB_MODEL_P7IOC, 16aa0c033fSGavin Shan PNV_PHB_MODEL_PHB3, 175d2aa710SAlistair Popple PNV_PHB_MODEL_NPU, 18cee72d5bSBenjamin Herrenschmidt }; 19cee72d5bSBenjamin Herrenschmidt 205c9d6d75SGavin Shan #define PNV_PCI_DIAG_BUF_SIZE 8192 217ebdf956SGavin Shan #define PNV_IODA_PE_DEV (1 << 0) /* PE has single PCI device */ 227ebdf956SGavin Shan #define PNV_IODA_PE_BUS (1 << 1) /* PE has primary PCI bus */ 237ebdf956SGavin Shan #define PNV_IODA_PE_BUS_ALL (1 << 2) /* PE has subordinate buses */ 24262af557SGuo Chao #define PNV_IODA_PE_MASTER (1 << 3) /* Master PE in compound case */ 25262af557SGuo Chao #define PNV_IODA_PE_SLAVE (1 << 4) /* Slave PE in compound case */ 26781a868fSWei Yang #define PNV_IODA_PE_VF (1 << 5) /* PE for one VF */ 27cee72d5bSBenjamin Herrenschmidt 28184cd4a3SBenjamin Herrenschmidt /* Data associated with a PE, including IOMMU tracking etc.. */ 294cce9550SGavin Shan struct pnv_phb; 30184cd4a3SBenjamin Herrenschmidt struct pnv_ioda_pe { 317ebdf956SGavin Shan unsigned long flags; 324cce9550SGavin Shan struct pnv_phb *phb; 33c5f7700bSGavin Shan int device_count; 347ebdf956SGavin Shan 35184cd4a3SBenjamin Herrenschmidt /* A PE can be associated with a single device or an 36184cd4a3SBenjamin Herrenschmidt * entire bus (& children). In the former case, pdev 37184cd4a3SBenjamin Herrenschmidt * is populated, in the later case, pbus is. 38184cd4a3SBenjamin Herrenschmidt */ 39781a868fSWei Yang #ifdef CONFIG_PCI_IOV 40781a868fSWei Yang struct pci_dev *parent_dev; 41781a868fSWei Yang #endif 42184cd4a3SBenjamin Herrenschmidt struct pci_dev *pdev; 43184cd4a3SBenjamin Herrenschmidt struct pci_bus *pbus; 44184cd4a3SBenjamin Herrenschmidt 45184cd4a3SBenjamin Herrenschmidt /* Effective RID (device RID for a device PE and base bus 46184cd4a3SBenjamin Herrenschmidt * RID with devfn 0 for a bus PE) 47184cd4a3SBenjamin Herrenschmidt */ 48184cd4a3SBenjamin Herrenschmidt unsigned int rid; 49184cd4a3SBenjamin Herrenschmidt 50184cd4a3SBenjamin Herrenschmidt /* PE number */ 51184cd4a3SBenjamin Herrenschmidt unsigned int pe_number; 52184cd4a3SBenjamin Herrenschmidt 53184cd4a3SBenjamin Herrenschmidt /* "Base" iommu table, ie, 4K TCEs, 32-bit DMA */ 54b348aa65SAlexey Kardashevskiy struct iommu_table_group table_group; 55184cd4a3SBenjamin Herrenschmidt 56cd15b048SBenjamin Herrenschmidt /* 64-bit TCE bypass region */ 57cd15b048SBenjamin Herrenschmidt bool tce_bypass_enabled; 58cd15b048SBenjamin Herrenschmidt uint64_t tce_bypass_base; 59184cd4a3SBenjamin Herrenschmidt 60184cd4a3SBenjamin Herrenschmidt /* MSIs. MVE index is identical for for 32 and 64 bit MSI 61184cd4a3SBenjamin Herrenschmidt * and -1 if not supported. (It's actually identical to the 62184cd4a3SBenjamin Herrenschmidt * PE number) 63184cd4a3SBenjamin Herrenschmidt */ 64184cd4a3SBenjamin Herrenschmidt int mve_number; 65184cd4a3SBenjamin Herrenschmidt 66262af557SGuo Chao /* PEs in compound case */ 67262af557SGuo Chao struct pnv_ioda_pe *master; 68262af557SGuo Chao struct list_head slaves; 69262af557SGuo Chao 70184cd4a3SBenjamin Herrenschmidt /* Link in list of PE#s */ 717ebdf956SGavin Shan struct list_head list; 72184cd4a3SBenjamin Herrenschmidt }; 73184cd4a3SBenjamin Herrenschmidt 74f5bc6b70SGavin Shan #define PNV_PHB_FLAG_EEH (1 << 0) 75f5bc6b70SGavin Shan 7661305a96SBenjamin Herrenschmidt struct pnv_phb { 7761305a96SBenjamin Herrenschmidt struct pci_controller *hose; 7861305a96SBenjamin Herrenschmidt enum pnv_phb_type type; 79cee72d5bSBenjamin Herrenschmidt enum pnv_phb_model model; 808747f363SGavin Shan u64 hub_id; 8161305a96SBenjamin Herrenschmidt u64 opal_id; 82f5bc6b70SGavin Shan int flags; 8361305a96SBenjamin Herrenschmidt void __iomem *regs; 84db1266c8SGavin Shan int initialized; 8561305a96SBenjamin Herrenschmidt spinlock_t lock; 8661305a96SBenjamin Herrenschmidt 8737c367f2SGavin Shan #ifdef CONFIG_DEBUG_FS 887f52a526SGavin Shan int has_dbgfs; 8937c367f2SGavin Shan struct dentry *dbgfs; 9037c367f2SGavin Shan #endif 9137c367f2SGavin Shan 92c1a2562aSBenjamin Herrenschmidt #ifdef CONFIG_PCI_MSI 93c1a2562aSBenjamin Herrenschmidt unsigned int msi_base; 94c1a2562aSBenjamin Herrenschmidt unsigned int msi32_support; 95fb1b55d6SGavin Shan struct msi_bitmap msi_bmp; 96c1a2562aSBenjamin Herrenschmidt #endif 97c1a2562aSBenjamin Herrenschmidt int (*msi_setup)(struct pnv_phb *phb, struct pci_dev *dev, 98137436c9SGavin Shan unsigned int hwirq, unsigned int virq, 99137436c9SGavin Shan unsigned int is_64, struct msi_msg *msg); 10061305a96SBenjamin Herrenschmidt void (*dma_dev_setup)(struct pnv_phb *phb, struct pci_dev *pdev); 10161305a96SBenjamin Herrenschmidt void (*fixup_phb)(struct pci_controller *hose); 102262af557SGuo Chao int (*init_m64)(struct pnv_phb *phb); 10396a2f92bSGavin Shan void (*reserve_m64_pe)(struct pci_bus *bus, 10496a2f92bSGavin Shan unsigned long *pe_bitmap, bool all); 1051e916772SGavin Shan struct pnv_ioda_pe *(*pick_m64_pe)(struct pci_bus *bus, bool all); 10649dec922SGavin Shan int (*get_pe_state)(struct pnv_phb *phb, int pe_no); 10749dec922SGavin Shan void (*freeze_pe)(struct pnv_phb *phb, int pe_no); 10849dec922SGavin Shan int (*unfreeze_pe)(struct pnv_phb *phb, int pe_no, int opt); 10961305a96SBenjamin Herrenschmidt 110184cd4a3SBenjamin Herrenschmidt struct { 111184cd4a3SBenjamin Herrenschmidt /* Global bridge info */ 11292b8f137SGavin Shan unsigned int total_pe_num; 11392b8f137SGavin Shan unsigned int reserved_pe_idx; 11463803c39SGavin Shan unsigned int root_pe_idx; 11563803c39SGavin Shan bool root_pe_populated; 116262af557SGuo Chao 117262af557SGuo Chao /* 32-bit MMIO window */ 118184cd4a3SBenjamin Herrenschmidt unsigned int m32_size; 119184cd4a3SBenjamin Herrenschmidt unsigned int m32_segsize; 120184cd4a3SBenjamin Herrenschmidt unsigned int m32_pci_base; 121262af557SGuo Chao 122262af557SGuo Chao /* 64-bit MMIO window */ 123262af557SGuo Chao unsigned int m64_bar_idx; 124262af557SGuo Chao unsigned long m64_size; 125262af557SGuo Chao unsigned long m64_segsize; 126262af557SGuo Chao unsigned long m64_base; 127262af557SGuo Chao unsigned long m64_bar_alloc; 128262af557SGuo Chao 129262af557SGuo Chao /* IO ports */ 130184cd4a3SBenjamin Herrenschmidt unsigned int io_size; 131184cd4a3SBenjamin Herrenschmidt unsigned int io_segsize; 132184cd4a3SBenjamin Herrenschmidt unsigned int io_pci_base; 133184cd4a3SBenjamin Herrenschmidt 13413ce7598SGavin Shan /* PE allocation */ 135781a868fSWei Yang struct mutex pe_alloc_mutex; 13613ce7598SGavin Shan unsigned long *pe_alloc; 13713ce7598SGavin Shan struct pnv_ioda_pe *pe_array; 138184cd4a3SBenjamin Herrenschmidt 139184cd4a3SBenjamin Herrenschmidt /* M32 & IO segment maps */ 14093289d8cSGavin Shan unsigned int *m64_segmap; 141184cd4a3SBenjamin Herrenschmidt unsigned int *m32_segmap; 142184cd4a3SBenjamin Herrenschmidt unsigned int *io_segmap; 143184cd4a3SBenjamin Herrenschmidt 1442b923ed1SGavin Shan /* DMA32 segment maps - IODA1 only */ 1452b923ed1SGavin Shan unsigned int dma32_count; 1462b923ed1SGavin Shan unsigned int *dma32_segmap; 1472b923ed1SGavin Shan 148137436c9SGavin Shan /* IRQ chip */ 149137436c9SGavin Shan int irq_chip_init; 150137436c9SGavin Shan struct irq_chip irq_chip; 151137436c9SGavin Shan 1527ebdf956SGavin Shan /* Sorted list of used PE's based 1537ebdf956SGavin Shan * on the sequence of creation 1547ebdf956SGavin Shan */ 1557ebdf956SGavin Shan struct list_head pe_list; 156781a868fSWei Yang struct mutex pe_list_mutex; 1577ebdf956SGavin Shan 158c127562aSGavin Shan /* Reverse map of PEs, indexed by {bus, devfn} */ 159c127562aSGavin Shan unsigned int pe_rmap[0x10000]; 160184cd4a3SBenjamin Herrenschmidt 1615780fb04SAlexey Kardashevskiy /* TCE cache invalidate registers (physical and 1625780fb04SAlexey Kardashevskiy * remapped) 1635780fb04SAlexey Kardashevskiy */ 1645780fb04SAlexey Kardashevskiy phys_addr_t tce_inval_reg_phys; 1655780fb04SAlexey Kardashevskiy __be64 __iomem *tce_inval_reg; 166184cd4a3SBenjamin Herrenschmidt } ioda; 167cee72d5bSBenjamin Herrenschmidt 168ca1de5deSBrian W Hart /* PHB and hub status structure */ 169cee72d5bSBenjamin Herrenschmidt union { 170cee72d5bSBenjamin Herrenschmidt unsigned char blob[PNV_PCI_DIAG_BUF_SIZE]; 171cee72d5bSBenjamin Herrenschmidt struct OpalIoP7IOCPhbErrorData p7ioc; 17293aef2a7SGavin Shan struct OpalIoPhb3ErrorData phb3; 173ca1de5deSBrian W Hart struct OpalIoP7IOCErrorData hub_diag; 174cee72d5bSBenjamin Herrenschmidt } diag; 175ca1de5deSBrian W Hart 17661305a96SBenjamin Herrenschmidt }; 17761305a96SBenjamin Herrenschmidt 17861305a96SBenjamin Herrenschmidt extern struct pci_ops pnv_pci_ops; 179da004c36SAlexey Kardashevskiy extern int pnv_tce_build(struct iommu_table *tbl, long index, long npages, 180da004c36SAlexey Kardashevskiy unsigned long uaddr, enum dma_data_direction direction, 181da004c36SAlexey Kardashevskiy struct dma_attrs *attrs); 182da004c36SAlexey Kardashevskiy extern void pnv_tce_free(struct iommu_table *tbl, long index, long npages); 18305c6cfb9SAlexey Kardashevskiy extern int pnv_tce_xchg(struct iommu_table *tbl, long index, 18405c6cfb9SAlexey Kardashevskiy unsigned long *hpa, enum dma_data_direction *direction); 185da004c36SAlexey Kardashevskiy extern unsigned long pnv_tce_get(struct iommu_table *tbl, long index); 18661305a96SBenjamin Herrenschmidt 18793aef2a7SGavin Shan void pnv_pci_dump_phb_diag_data(struct pci_controller *hose, 18893aef2a7SGavin Shan unsigned char *log_buff); 1893532a741SGavin Shan int pnv_pci_cfg_read(struct pci_dn *pdn, 1909bf41be6SGavin Shan int where, int size, u32 *val); 1913532a741SGavin Shan int pnv_pci_cfg_write(struct pci_dn *pdn, 1929bf41be6SGavin Shan int where, int size, u32 val); 1930eaf4defSAlexey Kardashevskiy extern struct iommu_table *pnv_pci_table_alloc(int nid); 1940eaf4defSAlexey Kardashevskiy 1950eaf4defSAlexey Kardashevskiy extern long pnv_pci_link_table_and_group(int node, int num, 1960eaf4defSAlexey Kardashevskiy struct iommu_table *tbl, 1970eaf4defSAlexey Kardashevskiy struct iommu_table_group *table_group); 1980eaf4defSAlexey Kardashevskiy extern void pnv_pci_unlink_table_and_group(struct iommu_table *tbl, 1990eaf4defSAlexey Kardashevskiy struct iommu_table_group *table_group); 20061305a96SBenjamin Herrenschmidt extern void pnv_pci_setup_iommu_table(struct iommu_table *tbl, 20161305a96SBenjamin Herrenschmidt void *tce_mem, u64 tce_size, 2028fa5d454SAlexey Kardashevskiy u64 dma_offset, unsigned page_shift); 203184cd4a3SBenjamin Herrenschmidt extern void pnv_pci_init_ioda_hub(struct device_node *np); 204aa0c033fSGavin Shan extern void pnv_pci_init_ioda2_phb(struct device_node *np); 2055d2aa710SAlistair Popple extern void pnv_pci_init_npu_phb(struct device_node *np); 2064cce9550SGavin Shan extern void pnv_pci_ioda_tce_invalidate(struct iommu_table *tbl, 2073ad26e5cSBenjamin Herrenschmidt __be64 *startp, __be64 *endp, bool rm); 208d92a208dSGavin Shan extern void pnv_pci_reset_secondary_bus(struct pci_dev *dev); 209cadf364dSGavin Shan extern int pnv_eeh_phb_reset(struct pci_controller *hose, int option); 21073ed148aSBenjamin Herrenschmidt 21192ae0353SDaniel Axtens extern void pnv_pci_dma_dev_setup(struct pci_dev *pdev); 2121bc74f1cSGavin Shan extern void pnv_pci_dma_bus_setup(struct pci_bus *bus); 21392ae0353SDaniel Axtens extern int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type); 21492ae0353SDaniel Axtens extern void pnv_teardown_msi_irqs(struct pci_dev *pdev); 21592ae0353SDaniel Axtens 2167d623e42SAlexey Kardashevskiy extern void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level, 2177d623e42SAlexey Kardashevskiy const char *fmt, ...); 2187d623e42SAlexey Kardashevskiy #define pe_err(pe, fmt, ...) \ 2197d623e42SAlexey Kardashevskiy pe_level_printk(pe, KERN_ERR, fmt, ##__VA_ARGS__) 2207d623e42SAlexey Kardashevskiy #define pe_warn(pe, fmt, ...) \ 2217d623e42SAlexey Kardashevskiy pe_level_printk(pe, KERN_WARNING, fmt, ##__VA_ARGS__) 2227d623e42SAlexey Kardashevskiy #define pe_info(pe, fmt, ...) \ 2237d623e42SAlexey Kardashevskiy pe_level_printk(pe, KERN_INFO, fmt, ##__VA_ARGS__) 2247d623e42SAlexey Kardashevskiy 2255d2aa710SAlistair Popple /* Nvlink functions */ 226f9f83456SAlexey Kardashevskiy extern void pnv_npu_try_dma_set_bypass(struct pci_dev *gpdev, bool bypass); 2270bbcdb43SAlexey Kardashevskiy extern void pnv_pci_ioda2_tce_invalidate_entire(struct pnv_phb *phb, bool rm); 228b5cb9ab1SAlexey Kardashevskiy extern struct pnv_ioda_pe *pnv_pci_npu_setup_iommu(struct pnv_ioda_pe *npe); 229b5cb9ab1SAlexey Kardashevskiy extern long pnv_npu_set_window(struct pnv_ioda_pe *npe, int num, 230b5cb9ab1SAlexey Kardashevskiy struct iommu_table *tbl); 231b5cb9ab1SAlexey Kardashevskiy extern long pnv_npu_unset_window(struct pnv_ioda_pe *npe, int num); 232b5cb9ab1SAlexey Kardashevskiy extern void pnv_npu_take_ownership(struct pnv_ioda_pe *npe); 233b5cb9ab1SAlexey Kardashevskiy extern void pnv_npu_release_ownership(struct pnv_ioda_pe *npe); 2345d2aa710SAlistair Popple 23561305a96SBenjamin Herrenschmidt #endif /* __POWERNV_PCI_H */ 236