161305a96SBenjamin Herrenschmidt #ifndef __POWERNV_PCI_H 261305a96SBenjamin Herrenschmidt #define __POWERNV_PCI_H 361305a96SBenjamin Herrenschmidt 4f456834aSIan Munsie #include <linux/iommu.h> 5f456834aSIan Munsie #include <asm/iommu.h> 6f456834aSIan Munsie #include <asm/msi_bitmap.h> 7f456834aSIan Munsie 861305a96SBenjamin Herrenschmidt struct pci_dn; 961305a96SBenjamin Herrenschmidt 101ab66d1fSAlistair Popple /* Maximum possible number of ATSD MMIO registers per NPU */ 111ab66d1fSAlistair Popple #define NV_NMMU_ATSD_REGS 8 121ab66d1fSAlistair Popple 1361305a96SBenjamin Herrenschmidt enum pnv_phb_type { 142de50e96SRussell Currey PNV_PHB_IODA1 = 0, 152de50e96SRussell Currey PNV_PHB_IODA2 = 1, 162de50e96SRussell Currey PNV_PHB_NPU = 2, 1761305a96SBenjamin Herrenschmidt }; 1861305a96SBenjamin Herrenschmidt 19cee72d5bSBenjamin Herrenschmidt /* Precise PHB model for error management */ 20cee72d5bSBenjamin Herrenschmidt enum pnv_phb_model { 21cee72d5bSBenjamin Herrenschmidt PNV_PHB_MODEL_UNKNOWN, 22cee72d5bSBenjamin Herrenschmidt PNV_PHB_MODEL_P7IOC, 23aa0c033fSGavin Shan PNV_PHB_MODEL_PHB3, 245d2aa710SAlistair Popple PNV_PHB_MODEL_NPU, 25616badd2SAlistair Popple PNV_PHB_MODEL_NPU2, 26cee72d5bSBenjamin Herrenschmidt }; 27cee72d5bSBenjamin Herrenschmidt 285c9d6d75SGavin Shan #define PNV_PCI_DIAG_BUF_SIZE 8192 297ebdf956SGavin Shan #define PNV_IODA_PE_DEV (1 << 0) /* PE has single PCI device */ 307ebdf956SGavin Shan #define PNV_IODA_PE_BUS (1 << 1) /* PE has primary PCI bus */ 317ebdf956SGavin Shan #define PNV_IODA_PE_BUS_ALL (1 << 2) /* PE has subordinate buses */ 32262af557SGuo Chao #define PNV_IODA_PE_MASTER (1 << 3) /* Master PE in compound case */ 33262af557SGuo Chao #define PNV_IODA_PE_SLAVE (1 << 4) /* Slave PE in compound case */ 34781a868fSWei Yang #define PNV_IODA_PE_VF (1 << 5) /* PE for one VF */ 35cee72d5bSBenjamin Herrenschmidt 36184cd4a3SBenjamin Herrenschmidt /* Data associated with a PE, including IOMMU tracking etc.. */ 374cce9550SGavin Shan struct pnv_phb; 38184cd4a3SBenjamin Herrenschmidt struct pnv_ioda_pe { 397ebdf956SGavin Shan unsigned long flags; 404cce9550SGavin Shan struct pnv_phb *phb; 41c5f7700bSGavin Shan int device_count; 427ebdf956SGavin Shan 43184cd4a3SBenjamin Herrenschmidt /* A PE can be associated with a single device or an 44184cd4a3SBenjamin Herrenschmidt * entire bus (& children). In the former case, pdev 45184cd4a3SBenjamin Herrenschmidt * is populated, in the later case, pbus is. 46184cd4a3SBenjamin Herrenschmidt */ 47781a868fSWei Yang #ifdef CONFIG_PCI_IOV 48781a868fSWei Yang struct pci_dev *parent_dev; 49781a868fSWei Yang #endif 50184cd4a3SBenjamin Herrenschmidt struct pci_dev *pdev; 51184cd4a3SBenjamin Herrenschmidt struct pci_bus *pbus; 52184cd4a3SBenjamin Herrenschmidt 53184cd4a3SBenjamin Herrenschmidt /* Effective RID (device RID for a device PE and base bus 54184cd4a3SBenjamin Herrenschmidt * RID with devfn 0 for a bus PE) 55184cd4a3SBenjamin Herrenschmidt */ 56184cd4a3SBenjamin Herrenschmidt unsigned int rid; 57184cd4a3SBenjamin Herrenschmidt 58184cd4a3SBenjamin Herrenschmidt /* PE number */ 59184cd4a3SBenjamin Herrenschmidt unsigned int pe_number; 60184cd4a3SBenjamin Herrenschmidt 61184cd4a3SBenjamin Herrenschmidt /* "Base" iommu table, ie, 4K TCEs, 32-bit DMA */ 62b348aa65SAlexey Kardashevskiy struct iommu_table_group table_group; 63184cd4a3SBenjamin Herrenschmidt 64cd15b048SBenjamin Herrenschmidt /* 64-bit TCE bypass region */ 65cd15b048SBenjamin Herrenschmidt bool tce_bypass_enabled; 66cd15b048SBenjamin Herrenschmidt uint64_t tce_bypass_base; 67184cd4a3SBenjamin Herrenschmidt 68184cd4a3SBenjamin Herrenschmidt /* MSIs. MVE index is identical for for 32 and 64 bit MSI 69184cd4a3SBenjamin Herrenschmidt * and -1 if not supported. (It's actually identical to the 70184cd4a3SBenjamin Herrenschmidt * PE number) 71184cd4a3SBenjamin Herrenschmidt */ 72184cd4a3SBenjamin Herrenschmidt int mve_number; 73184cd4a3SBenjamin Herrenschmidt 74262af557SGuo Chao /* PEs in compound case */ 75262af557SGuo Chao struct pnv_ioda_pe *master; 76262af557SGuo Chao struct list_head slaves; 77262af557SGuo Chao 78184cd4a3SBenjamin Herrenschmidt /* Link in list of PE#s */ 797ebdf956SGavin Shan struct list_head list; 80184cd4a3SBenjamin Herrenschmidt }; 81184cd4a3SBenjamin Herrenschmidt 82f5bc6b70SGavin Shan #define PNV_PHB_FLAG_EEH (1 << 0) 834361b034SIan Munsie #define PNV_PHB_FLAG_CXL (1 << 1) /* Real PHB supporting the cxl kernel API */ 84f5bc6b70SGavin Shan 8561305a96SBenjamin Herrenschmidt struct pnv_phb { 8661305a96SBenjamin Herrenschmidt struct pci_controller *hose; 8761305a96SBenjamin Herrenschmidt enum pnv_phb_type type; 88cee72d5bSBenjamin Herrenschmidt enum pnv_phb_model model; 898747f363SGavin Shan u64 hub_id; 9061305a96SBenjamin Herrenschmidt u64 opal_id; 91f5bc6b70SGavin Shan int flags; 9261305a96SBenjamin Herrenschmidt void __iomem *regs; 93fd141d1aSBenjamin Herrenschmidt u64 regs_phys; 94db1266c8SGavin Shan int initialized; 9561305a96SBenjamin Herrenschmidt spinlock_t lock; 9661305a96SBenjamin Herrenschmidt 9737c367f2SGavin Shan #ifdef CONFIG_DEBUG_FS 987f52a526SGavin Shan int has_dbgfs; 9937c367f2SGavin Shan struct dentry *dbgfs; 10037c367f2SGavin Shan #endif 10137c367f2SGavin Shan 102c1a2562aSBenjamin Herrenschmidt #ifdef CONFIG_PCI_MSI 103c1a2562aSBenjamin Herrenschmidt unsigned int msi_base; 104c1a2562aSBenjamin Herrenschmidt unsigned int msi32_support; 105fb1b55d6SGavin Shan struct msi_bitmap msi_bmp; 106c1a2562aSBenjamin Herrenschmidt #endif 107c1a2562aSBenjamin Herrenschmidt int (*msi_setup)(struct pnv_phb *phb, struct pci_dev *dev, 108137436c9SGavin Shan unsigned int hwirq, unsigned int virq, 109137436c9SGavin Shan unsigned int is_64, struct msi_msg *msg); 11061305a96SBenjamin Herrenschmidt void (*dma_dev_setup)(struct pnv_phb *phb, struct pci_dev *pdev); 11161305a96SBenjamin Herrenschmidt void (*fixup_phb)(struct pci_controller *hose); 112262af557SGuo Chao int (*init_m64)(struct pnv_phb *phb); 11396a2f92bSGavin Shan void (*reserve_m64_pe)(struct pci_bus *bus, 11496a2f92bSGavin Shan unsigned long *pe_bitmap, bool all); 1151e916772SGavin Shan struct pnv_ioda_pe *(*pick_m64_pe)(struct pci_bus *bus, bool all); 11649dec922SGavin Shan int (*get_pe_state)(struct pnv_phb *phb, int pe_no); 11749dec922SGavin Shan void (*freeze_pe)(struct pnv_phb *phb, int pe_no); 11849dec922SGavin Shan int (*unfreeze_pe)(struct pnv_phb *phb, int pe_no, int opt); 11961305a96SBenjamin Herrenschmidt 120184cd4a3SBenjamin Herrenschmidt struct { 121184cd4a3SBenjamin Herrenschmidt /* Global bridge info */ 12292b8f137SGavin Shan unsigned int total_pe_num; 12392b8f137SGavin Shan unsigned int reserved_pe_idx; 12463803c39SGavin Shan unsigned int root_pe_idx; 12563803c39SGavin Shan bool root_pe_populated; 126262af557SGuo Chao 127262af557SGuo Chao /* 32-bit MMIO window */ 128184cd4a3SBenjamin Herrenschmidt unsigned int m32_size; 129184cd4a3SBenjamin Herrenschmidt unsigned int m32_segsize; 130184cd4a3SBenjamin Herrenschmidt unsigned int m32_pci_base; 131262af557SGuo Chao 132262af557SGuo Chao /* 64-bit MMIO window */ 133262af557SGuo Chao unsigned int m64_bar_idx; 134262af557SGuo Chao unsigned long m64_size; 135262af557SGuo Chao unsigned long m64_segsize; 136262af557SGuo Chao unsigned long m64_base; 137262af557SGuo Chao unsigned long m64_bar_alloc; 138262af557SGuo Chao 139262af557SGuo Chao /* IO ports */ 140184cd4a3SBenjamin Herrenschmidt unsigned int io_size; 141184cd4a3SBenjamin Herrenschmidt unsigned int io_segsize; 142184cd4a3SBenjamin Herrenschmidt unsigned int io_pci_base; 143184cd4a3SBenjamin Herrenschmidt 14413ce7598SGavin Shan /* PE allocation */ 145781a868fSWei Yang struct mutex pe_alloc_mutex; 14613ce7598SGavin Shan unsigned long *pe_alloc; 14713ce7598SGavin Shan struct pnv_ioda_pe *pe_array; 148184cd4a3SBenjamin Herrenschmidt 149184cd4a3SBenjamin Herrenschmidt /* M32 & IO segment maps */ 15093289d8cSGavin Shan unsigned int *m64_segmap; 151184cd4a3SBenjamin Herrenschmidt unsigned int *m32_segmap; 152184cd4a3SBenjamin Herrenschmidt unsigned int *io_segmap; 153184cd4a3SBenjamin Herrenschmidt 1542b923ed1SGavin Shan /* DMA32 segment maps - IODA1 only */ 1552b923ed1SGavin Shan unsigned int dma32_count; 1562b923ed1SGavin Shan unsigned int *dma32_segmap; 1572b923ed1SGavin Shan 158137436c9SGavin Shan /* IRQ chip */ 159137436c9SGavin Shan int irq_chip_init; 160137436c9SGavin Shan struct irq_chip irq_chip; 161137436c9SGavin Shan 1627ebdf956SGavin Shan /* Sorted list of used PE's based 1637ebdf956SGavin Shan * on the sequence of creation 1647ebdf956SGavin Shan */ 1657ebdf956SGavin Shan struct list_head pe_list; 166781a868fSWei Yang struct mutex pe_list_mutex; 1677ebdf956SGavin Shan 168c127562aSGavin Shan /* Reverse map of PEs, indexed by {bus, devfn} */ 169c127562aSGavin Shan unsigned int pe_rmap[0x10000]; 170184cd4a3SBenjamin Herrenschmidt } ioda; 171cee72d5bSBenjamin Herrenschmidt 172ca1de5deSBrian W Hart /* PHB and hub status structure */ 173cee72d5bSBenjamin Herrenschmidt union { 174cee72d5bSBenjamin Herrenschmidt unsigned char blob[PNV_PCI_DIAG_BUF_SIZE]; 175cee72d5bSBenjamin Herrenschmidt struct OpalIoP7IOCPhbErrorData p7ioc; 17693aef2a7SGavin Shan struct OpalIoPhb3ErrorData phb3; 177ca1de5deSBrian W Hart struct OpalIoP7IOCErrorData hub_diag; 178cee72d5bSBenjamin Herrenschmidt } diag; 179ca1de5deSBrian W Hart 1801ab66d1fSAlistair Popple /* Nvlink2 data */ 1811ab66d1fSAlistair Popple struct npu { 1821ab66d1fSAlistair Popple int index; 1831ab66d1fSAlistair Popple __be64 *mmio_atsd_regs[NV_NMMU_ATSD_REGS]; 1841ab66d1fSAlistair Popple unsigned int mmio_atsd_count; 1851ab66d1fSAlistair Popple 1861ab66d1fSAlistair Popple /* Bitmask for MMIO register usage */ 1871ab66d1fSAlistair Popple unsigned long mmio_atsd_usage; 1881ab66d1fSAlistair Popple } npu; 1891ab66d1fSAlistair Popple 1904361b034SIan Munsie #ifdef CONFIG_CXL_BASE 1914361b034SIan Munsie struct cxl_afu *cxl_afu; 1924361b034SIan Munsie #endif 19361305a96SBenjamin Herrenschmidt }; 19461305a96SBenjamin Herrenschmidt 19561305a96SBenjamin Herrenschmidt extern struct pci_ops pnv_pci_ops; 196da004c36SAlexey Kardashevskiy extern int pnv_tce_build(struct iommu_table *tbl, long index, long npages, 197da004c36SAlexey Kardashevskiy unsigned long uaddr, enum dma_data_direction direction, 19800085f1eSKrzysztof Kozlowski unsigned long attrs); 199da004c36SAlexey Kardashevskiy extern void pnv_tce_free(struct iommu_table *tbl, long index, long npages); 20005c6cfb9SAlexey Kardashevskiy extern int pnv_tce_xchg(struct iommu_table *tbl, long index, 20105c6cfb9SAlexey Kardashevskiy unsigned long *hpa, enum dma_data_direction *direction); 202da004c36SAlexey Kardashevskiy extern unsigned long pnv_tce_get(struct iommu_table *tbl, long index); 20361305a96SBenjamin Herrenschmidt 20493aef2a7SGavin Shan void pnv_pci_dump_phb_diag_data(struct pci_controller *hose, 20593aef2a7SGavin Shan unsigned char *log_buff); 2063532a741SGavin Shan int pnv_pci_cfg_read(struct pci_dn *pdn, 2079bf41be6SGavin Shan int where, int size, u32 *val); 2083532a741SGavin Shan int pnv_pci_cfg_write(struct pci_dn *pdn, 2099bf41be6SGavin Shan int where, int size, u32 val); 2100eaf4defSAlexey Kardashevskiy extern struct iommu_table *pnv_pci_table_alloc(int nid); 2110eaf4defSAlexey Kardashevskiy 2120eaf4defSAlexey Kardashevskiy extern long pnv_pci_link_table_and_group(int node, int num, 2130eaf4defSAlexey Kardashevskiy struct iommu_table *tbl, 2140eaf4defSAlexey Kardashevskiy struct iommu_table_group *table_group); 2150eaf4defSAlexey Kardashevskiy extern void pnv_pci_unlink_table_and_group(struct iommu_table *tbl, 2160eaf4defSAlexey Kardashevskiy struct iommu_table_group *table_group); 21761305a96SBenjamin Herrenschmidt extern void pnv_pci_setup_iommu_table(struct iommu_table *tbl, 21861305a96SBenjamin Herrenschmidt void *tce_mem, u64 tce_size, 2198fa5d454SAlexey Kardashevskiy u64 dma_offset, unsigned page_shift); 220184cd4a3SBenjamin Herrenschmidt extern void pnv_pci_init_ioda_hub(struct device_node *np); 221aa0c033fSGavin Shan extern void pnv_pci_init_ioda2_phb(struct device_node *np); 2225d2aa710SAlistair Popple extern void pnv_pci_init_npu_phb(struct device_node *np); 223d92a208dSGavin Shan extern void pnv_pci_reset_secondary_bus(struct pci_dev *dev); 224cadf364dSGavin Shan extern int pnv_eeh_phb_reset(struct pci_controller *hose, int option); 22573ed148aSBenjamin Herrenschmidt 22692ae0353SDaniel Axtens extern void pnv_pci_dma_dev_setup(struct pci_dev *pdev); 2271bc74f1cSGavin Shan extern void pnv_pci_dma_bus_setup(struct pci_bus *bus); 22892ae0353SDaniel Axtens extern int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type); 22992ae0353SDaniel Axtens extern void pnv_teardown_msi_irqs(struct pci_dev *pdev); 230f456834aSIan Munsie extern struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev); 231f456834aSIan Munsie extern void pnv_set_msi_irq_chip(struct pnv_phb *phb, unsigned int virq); 2324361b034SIan Munsie extern bool pnv_pci_enable_device_hook(struct pci_dev *dev); 23392ae0353SDaniel Axtens 2347d623e42SAlexey Kardashevskiy extern void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level, 2357d623e42SAlexey Kardashevskiy const char *fmt, ...); 2367d623e42SAlexey Kardashevskiy #define pe_err(pe, fmt, ...) \ 2377d623e42SAlexey Kardashevskiy pe_level_printk(pe, KERN_ERR, fmt, ##__VA_ARGS__) 2387d623e42SAlexey Kardashevskiy #define pe_warn(pe, fmt, ...) \ 2397d623e42SAlexey Kardashevskiy pe_level_printk(pe, KERN_WARNING, fmt, ##__VA_ARGS__) 2407d623e42SAlexey Kardashevskiy #define pe_info(pe, fmt, ...) \ 2417d623e42SAlexey Kardashevskiy pe_level_printk(pe, KERN_INFO, fmt, ##__VA_ARGS__) 2427d623e42SAlexey Kardashevskiy 2435d2aa710SAlistair Popple /* Nvlink functions */ 244f9f83456SAlexey Kardashevskiy extern void pnv_npu_try_dma_set_bypass(struct pci_dev *gpdev, bool bypass); 2456b3d12a9SAlistair Popple extern void pnv_pci_ioda2_tce_invalidate_entire(struct pnv_phb *phb, bool rm); 246b5cb9ab1SAlexey Kardashevskiy extern struct pnv_ioda_pe *pnv_pci_npu_setup_iommu(struct pnv_ioda_pe *npe); 247b5cb9ab1SAlexey Kardashevskiy extern long pnv_npu_set_window(struct pnv_ioda_pe *npe, int num, 248b5cb9ab1SAlexey Kardashevskiy struct iommu_table *tbl); 249b5cb9ab1SAlexey Kardashevskiy extern long pnv_npu_unset_window(struct pnv_ioda_pe *npe, int num); 250b5cb9ab1SAlexey Kardashevskiy extern void pnv_npu_take_ownership(struct pnv_ioda_pe *npe); 251b5cb9ab1SAlexey Kardashevskiy extern void pnv_npu_release_ownership(struct pnv_ioda_pe *npe); 2521ab66d1fSAlistair Popple extern int pnv_npu2_init(struct pnv_phb *phb); 2534361b034SIan Munsie 2544361b034SIan Munsie /* cxl functions */ 2554361b034SIan Munsie extern bool pnv_cxl_enable_device_hook(struct pci_dev *dev); 2564361b034SIan Munsie extern void pnv_cxl_disable_device(struct pci_dev *dev); 257a2f67d5eSIan Munsie extern int pnv_cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type); 258a2f67d5eSIan Munsie extern void pnv_cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev); 2594361b034SIan Munsie 2604361b034SIan Munsie 2614361b034SIan Munsie /* phb ops (cxl switches these when enabling the kernel api on the phb) */ 2624361b034SIan Munsie extern const struct pci_controller_ops pnv_cxl_cx4_ioda_controller_ops; 2634361b034SIan Munsie 26461305a96SBenjamin Herrenschmidt #endif /* __POWERNV_PCI_H */ 265