161305a96SBenjamin Herrenschmidt #ifndef __POWERNV_PCI_H 261305a96SBenjamin Herrenschmidt #define __POWERNV_PCI_H 361305a96SBenjamin Herrenschmidt 4f456834aSIan Munsie #include <linux/iommu.h> 5f456834aSIan Munsie #include <asm/iommu.h> 6f456834aSIan Munsie #include <asm/msi_bitmap.h> 7f456834aSIan Munsie 861305a96SBenjamin Herrenschmidt struct pci_dn; 961305a96SBenjamin Herrenschmidt 1061305a96SBenjamin Herrenschmidt enum pnv_phb_type { 112de50e96SRussell Currey PNV_PHB_IODA1 = 0, 122de50e96SRussell Currey PNV_PHB_IODA2 = 1, 132de50e96SRussell Currey PNV_PHB_NPU = 2, 1461305a96SBenjamin Herrenschmidt }; 1561305a96SBenjamin Herrenschmidt 16cee72d5bSBenjamin Herrenschmidt /* Precise PHB model for error management */ 17cee72d5bSBenjamin Herrenschmidt enum pnv_phb_model { 18cee72d5bSBenjamin Herrenschmidt PNV_PHB_MODEL_UNKNOWN, 19cee72d5bSBenjamin Herrenschmidt PNV_PHB_MODEL_P7IOC, 20aa0c033fSGavin Shan PNV_PHB_MODEL_PHB3, 215d2aa710SAlistair Popple PNV_PHB_MODEL_NPU, 22cee72d5bSBenjamin Herrenschmidt }; 23cee72d5bSBenjamin Herrenschmidt 245c9d6d75SGavin Shan #define PNV_PCI_DIAG_BUF_SIZE 8192 257ebdf956SGavin Shan #define PNV_IODA_PE_DEV (1 << 0) /* PE has single PCI device */ 267ebdf956SGavin Shan #define PNV_IODA_PE_BUS (1 << 1) /* PE has primary PCI bus */ 277ebdf956SGavin Shan #define PNV_IODA_PE_BUS_ALL (1 << 2) /* PE has subordinate buses */ 28262af557SGuo Chao #define PNV_IODA_PE_MASTER (1 << 3) /* Master PE in compound case */ 29262af557SGuo Chao #define PNV_IODA_PE_SLAVE (1 << 4) /* Slave PE in compound case */ 30781a868fSWei Yang #define PNV_IODA_PE_VF (1 << 5) /* PE for one VF */ 31cee72d5bSBenjamin Herrenschmidt 32184cd4a3SBenjamin Herrenschmidt /* Data associated with a PE, including IOMMU tracking etc.. */ 334cce9550SGavin Shan struct pnv_phb; 34184cd4a3SBenjamin Herrenschmidt struct pnv_ioda_pe { 357ebdf956SGavin Shan unsigned long flags; 364cce9550SGavin Shan struct pnv_phb *phb; 37c5f7700bSGavin Shan int device_count; 387ebdf956SGavin Shan 39184cd4a3SBenjamin Herrenschmidt /* A PE can be associated with a single device or an 40184cd4a3SBenjamin Herrenschmidt * entire bus (& children). In the former case, pdev 41184cd4a3SBenjamin Herrenschmidt * is populated, in the later case, pbus is. 42184cd4a3SBenjamin Herrenschmidt */ 43781a868fSWei Yang #ifdef CONFIG_PCI_IOV 44781a868fSWei Yang struct pci_dev *parent_dev; 45781a868fSWei Yang #endif 46184cd4a3SBenjamin Herrenschmidt struct pci_dev *pdev; 47184cd4a3SBenjamin Herrenschmidt struct pci_bus *pbus; 48184cd4a3SBenjamin Herrenschmidt 49184cd4a3SBenjamin Herrenschmidt /* Effective RID (device RID for a device PE and base bus 50184cd4a3SBenjamin Herrenschmidt * RID with devfn 0 for a bus PE) 51184cd4a3SBenjamin Herrenschmidt */ 52184cd4a3SBenjamin Herrenschmidt unsigned int rid; 53184cd4a3SBenjamin Herrenschmidt 54184cd4a3SBenjamin Herrenschmidt /* PE number */ 55184cd4a3SBenjamin Herrenschmidt unsigned int pe_number; 56184cd4a3SBenjamin Herrenschmidt 57184cd4a3SBenjamin Herrenschmidt /* "Base" iommu table, ie, 4K TCEs, 32-bit DMA */ 58b348aa65SAlexey Kardashevskiy struct iommu_table_group table_group; 59184cd4a3SBenjamin Herrenschmidt 60cd15b048SBenjamin Herrenschmidt /* 64-bit TCE bypass region */ 61cd15b048SBenjamin Herrenschmidt bool tce_bypass_enabled; 62cd15b048SBenjamin Herrenschmidt uint64_t tce_bypass_base; 63184cd4a3SBenjamin Herrenschmidt 64184cd4a3SBenjamin Herrenschmidt /* MSIs. MVE index is identical for for 32 and 64 bit MSI 65184cd4a3SBenjamin Herrenschmidt * and -1 if not supported. (It's actually identical to the 66184cd4a3SBenjamin Herrenschmidt * PE number) 67184cd4a3SBenjamin Herrenschmidt */ 68184cd4a3SBenjamin Herrenschmidt int mve_number; 69184cd4a3SBenjamin Herrenschmidt 70262af557SGuo Chao /* PEs in compound case */ 71262af557SGuo Chao struct pnv_ioda_pe *master; 72262af557SGuo Chao struct list_head slaves; 73262af557SGuo Chao 74184cd4a3SBenjamin Herrenschmidt /* Link in list of PE#s */ 757ebdf956SGavin Shan struct list_head list; 76184cd4a3SBenjamin Herrenschmidt }; 77184cd4a3SBenjamin Herrenschmidt 78f5bc6b70SGavin Shan #define PNV_PHB_FLAG_EEH (1 << 0) 794361b034SIan Munsie #define PNV_PHB_FLAG_CXL (1 << 1) /* Real PHB supporting the cxl kernel API */ 80f5bc6b70SGavin Shan 8161305a96SBenjamin Herrenschmidt struct pnv_phb { 8261305a96SBenjamin Herrenschmidt struct pci_controller *hose; 8361305a96SBenjamin Herrenschmidt enum pnv_phb_type type; 84cee72d5bSBenjamin Herrenschmidt enum pnv_phb_model model; 858747f363SGavin Shan u64 hub_id; 8661305a96SBenjamin Herrenschmidt u64 opal_id; 87f5bc6b70SGavin Shan int flags; 8861305a96SBenjamin Herrenschmidt void __iomem *regs; 89fd141d1aSBenjamin Herrenschmidt u64 regs_phys; 90db1266c8SGavin Shan int initialized; 9161305a96SBenjamin Herrenschmidt spinlock_t lock; 9261305a96SBenjamin Herrenschmidt 9337c367f2SGavin Shan #ifdef CONFIG_DEBUG_FS 947f52a526SGavin Shan int has_dbgfs; 9537c367f2SGavin Shan struct dentry *dbgfs; 9637c367f2SGavin Shan #endif 9737c367f2SGavin Shan 98c1a2562aSBenjamin Herrenschmidt #ifdef CONFIG_PCI_MSI 99c1a2562aSBenjamin Herrenschmidt unsigned int msi_base; 100c1a2562aSBenjamin Herrenschmidt unsigned int msi32_support; 101fb1b55d6SGavin Shan struct msi_bitmap msi_bmp; 102c1a2562aSBenjamin Herrenschmidt #endif 103c1a2562aSBenjamin Herrenschmidt int (*msi_setup)(struct pnv_phb *phb, struct pci_dev *dev, 104137436c9SGavin Shan unsigned int hwirq, unsigned int virq, 105137436c9SGavin Shan unsigned int is_64, struct msi_msg *msg); 10661305a96SBenjamin Herrenschmidt void (*dma_dev_setup)(struct pnv_phb *phb, struct pci_dev *pdev); 10761305a96SBenjamin Herrenschmidt void (*fixup_phb)(struct pci_controller *hose); 108262af557SGuo Chao int (*init_m64)(struct pnv_phb *phb); 10996a2f92bSGavin Shan void (*reserve_m64_pe)(struct pci_bus *bus, 11096a2f92bSGavin Shan unsigned long *pe_bitmap, bool all); 1111e916772SGavin Shan struct pnv_ioda_pe *(*pick_m64_pe)(struct pci_bus *bus, bool all); 11249dec922SGavin Shan int (*get_pe_state)(struct pnv_phb *phb, int pe_no); 11349dec922SGavin Shan void (*freeze_pe)(struct pnv_phb *phb, int pe_no); 11449dec922SGavin Shan int (*unfreeze_pe)(struct pnv_phb *phb, int pe_no, int opt); 11561305a96SBenjamin Herrenschmidt 116184cd4a3SBenjamin Herrenschmidt struct { 117184cd4a3SBenjamin Herrenschmidt /* Global bridge info */ 11892b8f137SGavin Shan unsigned int total_pe_num; 11992b8f137SGavin Shan unsigned int reserved_pe_idx; 12063803c39SGavin Shan unsigned int root_pe_idx; 12163803c39SGavin Shan bool root_pe_populated; 122262af557SGuo Chao 123262af557SGuo Chao /* 32-bit MMIO window */ 124184cd4a3SBenjamin Herrenschmidt unsigned int m32_size; 125184cd4a3SBenjamin Herrenschmidt unsigned int m32_segsize; 126184cd4a3SBenjamin Herrenschmidt unsigned int m32_pci_base; 127262af557SGuo Chao 128262af557SGuo Chao /* 64-bit MMIO window */ 129262af557SGuo Chao unsigned int m64_bar_idx; 130262af557SGuo Chao unsigned long m64_size; 131262af557SGuo Chao unsigned long m64_segsize; 132262af557SGuo Chao unsigned long m64_base; 133262af557SGuo Chao unsigned long m64_bar_alloc; 134262af557SGuo Chao 135262af557SGuo Chao /* IO ports */ 136184cd4a3SBenjamin Herrenschmidt unsigned int io_size; 137184cd4a3SBenjamin Herrenschmidt unsigned int io_segsize; 138184cd4a3SBenjamin Herrenschmidt unsigned int io_pci_base; 139184cd4a3SBenjamin Herrenschmidt 14013ce7598SGavin Shan /* PE allocation */ 141781a868fSWei Yang struct mutex pe_alloc_mutex; 14213ce7598SGavin Shan unsigned long *pe_alloc; 14313ce7598SGavin Shan struct pnv_ioda_pe *pe_array; 144184cd4a3SBenjamin Herrenschmidt 145184cd4a3SBenjamin Herrenschmidt /* M32 & IO segment maps */ 14693289d8cSGavin Shan unsigned int *m64_segmap; 147184cd4a3SBenjamin Herrenschmidt unsigned int *m32_segmap; 148184cd4a3SBenjamin Herrenschmidt unsigned int *io_segmap; 149184cd4a3SBenjamin Herrenschmidt 1502b923ed1SGavin Shan /* DMA32 segment maps - IODA1 only */ 1512b923ed1SGavin Shan unsigned int dma32_count; 1522b923ed1SGavin Shan unsigned int *dma32_segmap; 1532b923ed1SGavin Shan 154137436c9SGavin Shan /* IRQ chip */ 155137436c9SGavin Shan int irq_chip_init; 156137436c9SGavin Shan struct irq_chip irq_chip; 157137436c9SGavin Shan 1587ebdf956SGavin Shan /* Sorted list of used PE's based 1597ebdf956SGavin Shan * on the sequence of creation 1607ebdf956SGavin Shan */ 1617ebdf956SGavin Shan struct list_head pe_list; 162781a868fSWei Yang struct mutex pe_list_mutex; 1637ebdf956SGavin Shan 164c127562aSGavin Shan /* Reverse map of PEs, indexed by {bus, devfn} */ 165c127562aSGavin Shan unsigned int pe_rmap[0x10000]; 166184cd4a3SBenjamin Herrenschmidt } ioda; 167cee72d5bSBenjamin Herrenschmidt 168ca1de5deSBrian W Hart /* PHB and hub status structure */ 169cee72d5bSBenjamin Herrenschmidt union { 170cee72d5bSBenjamin Herrenschmidt unsigned char blob[PNV_PCI_DIAG_BUF_SIZE]; 171cee72d5bSBenjamin Herrenschmidt struct OpalIoP7IOCPhbErrorData p7ioc; 17293aef2a7SGavin Shan struct OpalIoPhb3ErrorData phb3; 173ca1de5deSBrian W Hart struct OpalIoP7IOCErrorData hub_diag; 174cee72d5bSBenjamin Herrenschmidt } diag; 175ca1de5deSBrian W Hart 1764361b034SIan Munsie #ifdef CONFIG_CXL_BASE 1774361b034SIan Munsie struct cxl_afu *cxl_afu; 1784361b034SIan Munsie #endif 17961305a96SBenjamin Herrenschmidt }; 18061305a96SBenjamin Herrenschmidt 18161305a96SBenjamin Herrenschmidt extern struct pci_ops pnv_pci_ops; 182da004c36SAlexey Kardashevskiy extern int pnv_tce_build(struct iommu_table *tbl, long index, long npages, 183da004c36SAlexey Kardashevskiy unsigned long uaddr, enum dma_data_direction direction, 18400085f1eSKrzysztof Kozlowski unsigned long attrs); 185da004c36SAlexey Kardashevskiy extern void pnv_tce_free(struct iommu_table *tbl, long index, long npages); 18605c6cfb9SAlexey Kardashevskiy extern int pnv_tce_xchg(struct iommu_table *tbl, long index, 18705c6cfb9SAlexey Kardashevskiy unsigned long *hpa, enum dma_data_direction *direction); 188da004c36SAlexey Kardashevskiy extern unsigned long pnv_tce_get(struct iommu_table *tbl, long index); 18961305a96SBenjamin Herrenschmidt 19093aef2a7SGavin Shan void pnv_pci_dump_phb_diag_data(struct pci_controller *hose, 19193aef2a7SGavin Shan unsigned char *log_buff); 1923532a741SGavin Shan int pnv_pci_cfg_read(struct pci_dn *pdn, 1939bf41be6SGavin Shan int where, int size, u32 *val); 1943532a741SGavin Shan int pnv_pci_cfg_write(struct pci_dn *pdn, 1959bf41be6SGavin Shan int where, int size, u32 val); 1960eaf4defSAlexey Kardashevskiy extern struct iommu_table *pnv_pci_table_alloc(int nid); 1970eaf4defSAlexey Kardashevskiy 1980eaf4defSAlexey Kardashevskiy extern long pnv_pci_link_table_and_group(int node, int num, 1990eaf4defSAlexey Kardashevskiy struct iommu_table *tbl, 2000eaf4defSAlexey Kardashevskiy struct iommu_table_group *table_group); 2010eaf4defSAlexey Kardashevskiy extern void pnv_pci_unlink_table_and_group(struct iommu_table *tbl, 2020eaf4defSAlexey Kardashevskiy struct iommu_table_group *table_group); 20361305a96SBenjamin Herrenschmidt extern void pnv_pci_setup_iommu_table(struct iommu_table *tbl, 20461305a96SBenjamin Herrenschmidt void *tce_mem, u64 tce_size, 2058fa5d454SAlexey Kardashevskiy u64 dma_offset, unsigned page_shift); 206184cd4a3SBenjamin Herrenschmidt extern void pnv_pci_init_ioda_hub(struct device_node *np); 207aa0c033fSGavin Shan extern void pnv_pci_init_ioda2_phb(struct device_node *np); 2085d2aa710SAlistair Popple extern void pnv_pci_init_npu_phb(struct device_node *np); 209d92a208dSGavin Shan extern void pnv_pci_reset_secondary_bus(struct pci_dev *dev); 210cadf364dSGavin Shan extern int pnv_eeh_phb_reset(struct pci_controller *hose, int option); 21173ed148aSBenjamin Herrenschmidt 21292ae0353SDaniel Axtens extern void pnv_pci_dma_dev_setup(struct pci_dev *pdev); 2131bc74f1cSGavin Shan extern void pnv_pci_dma_bus_setup(struct pci_bus *bus); 21492ae0353SDaniel Axtens extern int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type); 21592ae0353SDaniel Axtens extern void pnv_teardown_msi_irqs(struct pci_dev *pdev); 216f456834aSIan Munsie extern struct pnv_ioda_pe *pnv_ioda_get_pe(struct pci_dev *dev); 217f456834aSIan Munsie extern void pnv_set_msi_irq_chip(struct pnv_phb *phb, unsigned int virq); 2184361b034SIan Munsie extern bool pnv_pci_enable_device_hook(struct pci_dev *dev); 21992ae0353SDaniel Axtens 2207d623e42SAlexey Kardashevskiy extern void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level, 2217d623e42SAlexey Kardashevskiy const char *fmt, ...); 2227d623e42SAlexey Kardashevskiy #define pe_err(pe, fmt, ...) \ 2237d623e42SAlexey Kardashevskiy pe_level_printk(pe, KERN_ERR, fmt, ##__VA_ARGS__) 2247d623e42SAlexey Kardashevskiy #define pe_warn(pe, fmt, ...) \ 2257d623e42SAlexey Kardashevskiy pe_level_printk(pe, KERN_WARNING, fmt, ##__VA_ARGS__) 2267d623e42SAlexey Kardashevskiy #define pe_info(pe, fmt, ...) \ 2277d623e42SAlexey Kardashevskiy pe_level_printk(pe, KERN_INFO, fmt, ##__VA_ARGS__) 2287d623e42SAlexey Kardashevskiy 2295d2aa710SAlistair Popple /* Nvlink functions */ 230f9f83456SAlexey Kardashevskiy extern void pnv_npu_try_dma_set_bypass(struct pci_dev *gpdev, bool bypass); 231a34ab7c3SBenjamin Herrenschmidt extern void pnv_pci_phb3_tce_invalidate_entire(struct pnv_phb *phb, bool rm); 232b5cb9ab1SAlexey Kardashevskiy extern struct pnv_ioda_pe *pnv_pci_npu_setup_iommu(struct pnv_ioda_pe *npe); 233b5cb9ab1SAlexey Kardashevskiy extern long pnv_npu_set_window(struct pnv_ioda_pe *npe, int num, 234b5cb9ab1SAlexey Kardashevskiy struct iommu_table *tbl); 235b5cb9ab1SAlexey Kardashevskiy extern long pnv_npu_unset_window(struct pnv_ioda_pe *npe, int num); 236b5cb9ab1SAlexey Kardashevskiy extern void pnv_npu_take_ownership(struct pnv_ioda_pe *npe); 237b5cb9ab1SAlexey Kardashevskiy extern void pnv_npu_release_ownership(struct pnv_ioda_pe *npe); 2385d2aa710SAlistair Popple 2394361b034SIan Munsie 2404361b034SIan Munsie /* cxl functions */ 2414361b034SIan Munsie extern bool pnv_cxl_enable_device_hook(struct pci_dev *dev); 2424361b034SIan Munsie extern void pnv_cxl_disable_device(struct pci_dev *dev); 243a2f67d5eSIan Munsie extern int pnv_cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type); 244a2f67d5eSIan Munsie extern void pnv_cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev); 2454361b034SIan Munsie 2464361b034SIan Munsie 2474361b034SIan Munsie /* phb ops (cxl switches these when enabling the kernel api on the phb) */ 2484361b034SIan Munsie extern const struct pci_controller_ops pnv_cxl_cx4_ioda_controller_ops; 2494361b034SIan Munsie 25061305a96SBenjamin Herrenschmidt #endif /* __POWERNV_PCI_H */ 251