1 /* 2 * This file implements an irqchip for OPAL events. Whenever there is 3 * an interrupt that is handled by OPAL we get passed a list of events 4 * that Linux needs to do something about. These basically look like 5 * interrupts to Linux so we implement an irqchip to handle them. 6 * 7 * Copyright Alistair Popple, IBM Corporation 2014. 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 */ 14 #include <linux/bitops.h> 15 #include <linux/irq.h> 16 #include <linux/irqchip.h> 17 #include <linux/irqdomain.h> 18 #include <linux/interrupt.h> 19 #include <linux/module.h> 20 #include <linux/of.h> 21 #include <linux/platform_device.h> 22 #include <linux/kthread.h> 23 #include <linux/delay.h> 24 #include <linux/slab.h> 25 26 #include <asm/machdep.h> 27 #include <asm/opal.h> 28 29 #include "powernv.h" 30 31 /* Maximum number of events supported by OPAL firmware */ 32 #define MAX_NUM_EVENTS 64 33 34 struct opal_event_irqchip { 35 struct irq_chip irqchip; 36 struct irq_domain *domain; 37 unsigned long mask; 38 }; 39 static struct opal_event_irqchip opal_event_irqchip; 40 static u64 last_outstanding_events; 41 static unsigned int opal_irq_count; 42 static unsigned int *opal_irqs; 43 44 void opal_handle_events(void) 45 { 46 __be64 events = 0; 47 u64 e; 48 49 e = READ_ONCE(last_outstanding_events) & opal_event_irqchip.mask; 50 again: 51 while (e) { 52 int virq, hwirq; 53 54 hwirq = fls64(e) - 1; 55 e &= ~BIT_ULL(hwirq); 56 57 local_irq_disable(); 58 virq = irq_find_mapping(opal_event_irqchip.domain, hwirq); 59 if (virq) { 60 irq_enter(); 61 generic_handle_irq(virq); 62 irq_exit(); 63 } 64 local_irq_enable(); 65 66 cond_resched(); 67 } 68 last_outstanding_events = 0; 69 if (opal_poll_events(&events) != OPAL_SUCCESS) 70 return; 71 e = be64_to_cpu(events) & opal_event_irqchip.mask; 72 if (e) 73 goto again; 74 } 75 76 bool opal_have_pending_events(void) 77 { 78 if (last_outstanding_events & opal_event_irqchip.mask) 79 return true; 80 return false; 81 } 82 83 static void opal_event_mask(struct irq_data *d) 84 { 85 clear_bit(d->hwirq, &opal_event_irqchip.mask); 86 } 87 88 static void opal_event_unmask(struct irq_data *d) 89 { 90 set_bit(d->hwirq, &opal_event_irqchip.mask); 91 if (opal_have_pending_events()) 92 opal_wake_poller(); 93 } 94 95 static int opal_event_set_type(struct irq_data *d, unsigned int flow_type) 96 { 97 /* 98 * For now we only support level triggered events. The irq 99 * handler will be called continuously until the event has 100 * been cleared in OPAL. 101 */ 102 if (flow_type != IRQ_TYPE_LEVEL_HIGH) 103 return -EINVAL; 104 105 return 0; 106 } 107 108 static struct opal_event_irqchip opal_event_irqchip = { 109 .irqchip = { 110 .name = "OPAL EVT", 111 .irq_mask = opal_event_mask, 112 .irq_unmask = opal_event_unmask, 113 .irq_set_type = opal_event_set_type, 114 }, 115 .mask = 0, 116 }; 117 118 static int opal_event_map(struct irq_domain *d, unsigned int irq, 119 irq_hw_number_t hwirq) 120 { 121 irq_set_chip_data(irq, &opal_event_irqchip); 122 irq_set_chip_and_handler(irq, &opal_event_irqchip.irqchip, 123 handle_level_irq); 124 125 return 0; 126 } 127 128 static irqreturn_t opal_interrupt(int irq, void *data) 129 { 130 __be64 events; 131 132 opal_handle_interrupt(virq_to_hw(irq), &events); 133 last_outstanding_events = be64_to_cpu(events); 134 if (opal_have_pending_events()) 135 opal_wake_poller(); 136 137 return IRQ_HANDLED; 138 } 139 140 static int opal_event_match(struct irq_domain *h, struct device_node *node, 141 enum irq_domain_bus_token bus_token) 142 { 143 return irq_domain_get_of_node(h) == node; 144 } 145 146 static int opal_event_xlate(struct irq_domain *h, struct device_node *np, 147 const u32 *intspec, unsigned int intsize, 148 irq_hw_number_t *out_hwirq, unsigned int *out_flags) 149 { 150 *out_hwirq = intspec[0]; 151 *out_flags = IRQ_TYPE_LEVEL_HIGH; 152 153 return 0; 154 } 155 156 static const struct irq_domain_ops opal_event_domain_ops = { 157 .match = opal_event_match, 158 .map = opal_event_map, 159 .xlate = opal_event_xlate, 160 }; 161 162 void opal_event_shutdown(void) 163 { 164 unsigned int i; 165 166 /* First free interrupts, which will also mask them */ 167 for (i = 0; i < opal_irq_count; i++) { 168 if (!opal_irqs[i]) 169 continue; 170 171 if (in_interrupt() || irqs_disabled()) 172 disable_irq_nosync(opal_irqs[i]); 173 else 174 free_irq(opal_irqs[i], NULL); 175 176 opal_irqs[i] = 0; 177 } 178 } 179 180 int __init opal_event_init(void) 181 { 182 struct device_node *dn, *opal_node; 183 const char **names; 184 u32 *irqs; 185 int i, rc; 186 187 opal_node = of_find_node_by_path("/ibm,opal"); 188 if (!opal_node) { 189 pr_warn("opal: Node not found\n"); 190 return -ENODEV; 191 } 192 193 /* If dn is NULL it means the domain won't be linked to a DT 194 * node so therefore irq_of_parse_and_map(...) wont work. But 195 * that shouldn't be problem because if we're running a 196 * version of skiboot that doesn't have the dn then the 197 * devices won't have the correct properties and will have to 198 * fall back to the legacy method (opal_event_request(...)) 199 * anyway. */ 200 dn = of_find_compatible_node(NULL, NULL, "ibm,opal-event"); 201 opal_event_irqchip.domain = irq_domain_add_linear(dn, MAX_NUM_EVENTS, 202 &opal_event_domain_ops, &opal_event_irqchip); 203 of_node_put(dn); 204 if (!opal_event_irqchip.domain) { 205 pr_warn("opal: Unable to create irq domain\n"); 206 rc = -ENOMEM; 207 goto out; 208 } 209 210 /* Get opal-interrupts property and names if present */ 211 rc = of_property_count_u32_elems(opal_node, "opal-interrupts"); 212 if (rc < 0) 213 goto out; 214 215 opal_irq_count = rc; 216 pr_debug("Found %d interrupts reserved for OPAL\n", opal_irq_count); 217 218 irqs = kcalloc(opal_irq_count, sizeof(*irqs), GFP_KERNEL); 219 names = kcalloc(opal_irq_count, sizeof(*names), GFP_KERNEL); 220 opal_irqs = kcalloc(opal_irq_count, sizeof(*opal_irqs), GFP_KERNEL); 221 222 if (WARN_ON(!irqs || !names || !opal_irqs)) 223 goto out_free; 224 225 rc = of_property_read_u32_array(opal_node, "opal-interrupts", 226 irqs, opal_irq_count); 227 if (rc < 0) { 228 pr_err("Error %d reading opal-interrupts array\n", rc); 229 goto out_free; 230 } 231 232 /* It's not an error for the names to be missing */ 233 of_property_read_string_array(opal_node, "opal-interrupts-names", 234 names, opal_irq_count); 235 236 /* Install interrupt handlers */ 237 for (i = 0; i < opal_irq_count; i++) { 238 unsigned int virq; 239 char *name; 240 241 /* Get hardware and virtual IRQ */ 242 virq = irq_create_mapping(NULL, irqs[i]); 243 if (!virq) { 244 pr_warn("Failed to map irq 0x%x\n", irqs[i]); 245 continue; 246 } 247 248 if (names[i] && strlen(names[i])) 249 name = kasprintf(GFP_KERNEL, "opal-%s", names[i]); 250 else 251 name = kasprintf(GFP_KERNEL, "opal"); 252 253 /* Install interrupt handler */ 254 rc = request_irq(virq, opal_interrupt, IRQF_TRIGGER_LOW, 255 name, NULL); 256 if (rc) { 257 irq_dispose_mapping(virq); 258 pr_warn("Error %d requesting irq %d (0x%x)\n", 259 rc, virq, irqs[i]); 260 continue; 261 } 262 263 /* Cache IRQ */ 264 opal_irqs[i] = virq; 265 } 266 267 out_free: 268 kfree(irqs); 269 kfree(names); 270 out: 271 of_node_put(opal_node); 272 return rc; 273 } 274 machine_arch_initcall(powernv, opal_event_init); 275 276 /** 277 * opal_event_request(unsigned int opal_event_nr) - Request an event 278 * @opal_event_nr: the opal event number to request 279 * 280 * This routine can be used to find the linux virq number which can 281 * then be passed to request_irq to assign a handler for a particular 282 * opal event. This should only be used by legacy devices which don't 283 * have proper device tree bindings. Most devices should use 284 * irq_of_parse_and_map() instead. 285 */ 286 int opal_event_request(unsigned int opal_event_nr) 287 { 288 if (WARN_ON_ONCE(!opal_event_irqchip.domain)) 289 return 0; 290 291 return irq_create_mapping(opal_event_irqchip.domain, opal_event_nr); 292 } 293 EXPORT_SYMBOL(opal_event_request); 294