1d405a98cSShreyas B. Prabhu /* 2d405a98cSShreyas B. Prabhu * PowerNV cpuidle code 3d405a98cSShreyas B. Prabhu * 4d405a98cSShreyas B. Prabhu * Copyright 2015 IBM Corp. 5d405a98cSShreyas B. Prabhu * 6d405a98cSShreyas B. Prabhu * This program is free software; you can redistribute it and/or 7d405a98cSShreyas B. Prabhu * modify it under the terms of the GNU General Public License 8d405a98cSShreyas B. Prabhu * as published by the Free Software Foundation; either version 9d405a98cSShreyas B. Prabhu * 2 of the License, or (at your option) any later version. 10d405a98cSShreyas B. Prabhu */ 11d405a98cSShreyas B. Prabhu 12d405a98cSShreyas B. Prabhu #include <linux/types.h> 13d405a98cSShreyas B. Prabhu #include <linux/mm.h> 14d405a98cSShreyas B. Prabhu #include <linux/slab.h> 15d405a98cSShreyas B. Prabhu #include <linux/of.h> 16d405a98cSShreyas B. Prabhu 17d405a98cSShreyas B. Prabhu #include <asm/firmware.h> 18d405a98cSShreyas B. Prabhu #include <asm/opal.h> 19d405a98cSShreyas B. Prabhu #include <asm/cputhreads.h> 20d405a98cSShreyas B. Prabhu #include <asm/cpuidle.h> 21d405a98cSShreyas B. Prabhu #include <asm/code-patching.h> 22d405a98cSShreyas B. Prabhu #include <asm/smp.h> 23d405a98cSShreyas B. Prabhu 24d405a98cSShreyas B. Prabhu #include "powernv.h" 25d405a98cSShreyas B. Prabhu #include "subcore.h" 26d405a98cSShreyas B. Prabhu 27d405a98cSShreyas B. Prabhu static u32 supported_cpuidle_states; 28d405a98cSShreyas B. Prabhu 29d405a98cSShreyas B. Prabhu int pnv_save_sprs_for_winkle(void) 30d405a98cSShreyas B. Prabhu { 31d405a98cSShreyas B. Prabhu int cpu; 32d405a98cSShreyas B. Prabhu int rc; 33d405a98cSShreyas B. Prabhu 34d405a98cSShreyas B. Prabhu /* 35d405a98cSShreyas B. Prabhu * hid0, hid1, hid4, hid5, hmeer and lpcr values are symmetric accross 36d405a98cSShreyas B. Prabhu * all cpus at boot. Get these reg values of current cpu and use the 37d405a98cSShreyas B. Prabhu * same accross all cpus. 38d405a98cSShreyas B. Prabhu */ 39d405a98cSShreyas B. Prabhu uint64_t lpcr_val = mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1; 40d405a98cSShreyas B. Prabhu uint64_t hid0_val = mfspr(SPRN_HID0); 41d405a98cSShreyas B. Prabhu uint64_t hid1_val = mfspr(SPRN_HID1); 42d405a98cSShreyas B. Prabhu uint64_t hid4_val = mfspr(SPRN_HID4); 43d405a98cSShreyas B. Prabhu uint64_t hid5_val = mfspr(SPRN_HID5); 44d405a98cSShreyas B. Prabhu uint64_t hmeer_val = mfspr(SPRN_HMEER); 45d405a98cSShreyas B. Prabhu 46d405a98cSShreyas B. Prabhu for_each_possible_cpu(cpu) { 47d405a98cSShreyas B. Prabhu uint64_t pir = get_hard_smp_processor_id(cpu); 48d405a98cSShreyas B. Prabhu uint64_t hsprg0_val = (uint64_t)&paca[cpu]; 49d405a98cSShreyas B. Prabhu 50d405a98cSShreyas B. Prabhu /* 51d405a98cSShreyas B. Prabhu * HSPRG0 is used to store the cpu's pointer to paca. Hence last 52d405a98cSShreyas B. Prabhu * 3 bits are guaranteed to be 0. Program slw to restore HSPRG0 53d405a98cSShreyas B. Prabhu * with 63rd bit set, so that when a thread wakes up at 0x100 we 54d405a98cSShreyas B. Prabhu * can use this bit to distinguish between fastsleep and 55d405a98cSShreyas B. Prabhu * deep winkle. 56d405a98cSShreyas B. Prabhu */ 57d405a98cSShreyas B. Prabhu hsprg0_val |= 1; 58d405a98cSShreyas B. Prabhu 59d405a98cSShreyas B. Prabhu rc = opal_slw_set_reg(pir, SPRN_HSPRG0, hsprg0_val); 60d405a98cSShreyas B. Prabhu if (rc != 0) 61d405a98cSShreyas B. Prabhu return rc; 62d405a98cSShreyas B. Prabhu 63d405a98cSShreyas B. Prabhu rc = opal_slw_set_reg(pir, SPRN_LPCR, lpcr_val); 64d405a98cSShreyas B. Prabhu if (rc != 0) 65d405a98cSShreyas B. Prabhu return rc; 66d405a98cSShreyas B. Prabhu 67d405a98cSShreyas B. Prabhu /* HIDs are per core registers */ 68d405a98cSShreyas B. Prabhu if (cpu_thread_in_core(cpu) == 0) { 69d405a98cSShreyas B. Prabhu 70d405a98cSShreyas B. Prabhu rc = opal_slw_set_reg(pir, SPRN_HMEER, hmeer_val); 71d405a98cSShreyas B. Prabhu if (rc != 0) 72d405a98cSShreyas B. Prabhu return rc; 73d405a98cSShreyas B. Prabhu 74d405a98cSShreyas B. Prabhu rc = opal_slw_set_reg(pir, SPRN_HID0, hid0_val); 75d405a98cSShreyas B. Prabhu if (rc != 0) 76d405a98cSShreyas B. Prabhu return rc; 77d405a98cSShreyas B. Prabhu 78d405a98cSShreyas B. Prabhu rc = opal_slw_set_reg(pir, SPRN_HID1, hid1_val); 79d405a98cSShreyas B. Prabhu if (rc != 0) 80d405a98cSShreyas B. Prabhu return rc; 81d405a98cSShreyas B. Prabhu 82d405a98cSShreyas B. Prabhu rc = opal_slw_set_reg(pir, SPRN_HID4, hid4_val); 83d405a98cSShreyas B. Prabhu if (rc != 0) 84d405a98cSShreyas B. Prabhu return rc; 85d405a98cSShreyas B. Prabhu 86d405a98cSShreyas B. Prabhu rc = opal_slw_set_reg(pir, SPRN_HID5, hid5_val); 87d405a98cSShreyas B. Prabhu if (rc != 0) 88d405a98cSShreyas B. Prabhu return rc; 89d405a98cSShreyas B. Prabhu } 90d405a98cSShreyas B. Prabhu } 91d405a98cSShreyas B. Prabhu 92d405a98cSShreyas B. Prabhu return 0; 93d405a98cSShreyas B. Prabhu } 94d405a98cSShreyas B. Prabhu 95d405a98cSShreyas B. Prabhu static void pnv_alloc_idle_core_states(void) 96d405a98cSShreyas B. Prabhu { 97d405a98cSShreyas B. Prabhu int i, j; 98d405a98cSShreyas B. Prabhu int nr_cores = cpu_nr_cores(); 99d405a98cSShreyas B. Prabhu u32 *core_idle_state; 100d405a98cSShreyas B. Prabhu 101d405a98cSShreyas B. Prabhu /* 102d405a98cSShreyas B. Prabhu * core_idle_state - First 8 bits track the idle state of each thread 103d405a98cSShreyas B. Prabhu * of the core. The 8th bit is the lock bit. Initially all thread bits 104d405a98cSShreyas B. Prabhu * are set. They are cleared when the thread enters deep idle state 105d405a98cSShreyas B. Prabhu * like sleep and winkle. Initially the lock bit is cleared. 106d405a98cSShreyas B. Prabhu * The lock bit has 2 purposes 107d405a98cSShreyas B. Prabhu * a. While the first thread is restoring core state, it prevents 108d405a98cSShreyas B. Prabhu * other threads in the core from switching to process context. 109d405a98cSShreyas B. Prabhu * b. While the last thread in the core is saving the core state, it 110d405a98cSShreyas B. Prabhu * prevents a different thread from waking up. 111d405a98cSShreyas B. Prabhu */ 112d405a98cSShreyas B. Prabhu for (i = 0; i < nr_cores; i++) { 113d405a98cSShreyas B. Prabhu int first_cpu = i * threads_per_core; 114d405a98cSShreyas B. Prabhu int node = cpu_to_node(first_cpu); 115d405a98cSShreyas B. Prabhu 116d405a98cSShreyas B. Prabhu core_idle_state = kmalloc_node(sizeof(u32), GFP_KERNEL, node); 117d405a98cSShreyas B. Prabhu *core_idle_state = PNV_CORE_IDLE_THREAD_BITS; 118d405a98cSShreyas B. Prabhu 119d405a98cSShreyas B. Prabhu for (j = 0; j < threads_per_core; j++) { 120d405a98cSShreyas B. Prabhu int cpu = first_cpu + j; 121d405a98cSShreyas B. Prabhu 122d405a98cSShreyas B. Prabhu paca[cpu].core_idle_state_ptr = core_idle_state; 123d405a98cSShreyas B. Prabhu paca[cpu].thread_idle_state = PNV_THREAD_RUNNING; 124d405a98cSShreyas B. Prabhu paca[cpu].thread_mask = 1 << j; 125d405a98cSShreyas B. Prabhu } 126d405a98cSShreyas B. Prabhu } 127d405a98cSShreyas B. Prabhu 128d405a98cSShreyas B. Prabhu update_subcore_sibling_mask(); 129d405a98cSShreyas B. Prabhu 130d405a98cSShreyas B. Prabhu if (supported_cpuidle_states & OPAL_PM_WINKLE_ENABLED) 131d405a98cSShreyas B. Prabhu pnv_save_sprs_for_winkle(); 132d405a98cSShreyas B. Prabhu } 133d405a98cSShreyas B. Prabhu 134d405a98cSShreyas B. Prabhu u32 pnv_get_supported_cpuidle_states(void) 135d405a98cSShreyas B. Prabhu { 136d405a98cSShreyas B. Prabhu return supported_cpuidle_states; 137d405a98cSShreyas B. Prabhu } 138d405a98cSShreyas B. Prabhu EXPORT_SYMBOL_GPL(pnv_get_supported_cpuidle_states); 139d405a98cSShreyas B. Prabhu 140d405a98cSShreyas B. Prabhu static int __init pnv_init_idle_states(void) 141d405a98cSShreyas B. Prabhu { 142d405a98cSShreyas B. Prabhu struct device_node *power_mgt; 143d405a98cSShreyas B. Prabhu int dt_idle_states; 144d405a98cSShreyas B. Prabhu u32 *flags; 145d405a98cSShreyas B. Prabhu int i; 146d405a98cSShreyas B. Prabhu 147d405a98cSShreyas B. Prabhu supported_cpuidle_states = 0; 148d405a98cSShreyas B. Prabhu 149d405a98cSShreyas B. Prabhu if (cpuidle_disable != IDLE_NO_OVERRIDE) 150d405a98cSShreyas B. Prabhu goto out; 151d405a98cSShreyas B. Prabhu 152d405a98cSShreyas B. Prabhu if (!firmware_has_feature(FW_FEATURE_OPALv3)) 153d405a98cSShreyas B. Prabhu goto out; 154d405a98cSShreyas B. Prabhu 155d405a98cSShreyas B. Prabhu power_mgt = of_find_node_by_path("/ibm,opal/power-mgt"); 156d405a98cSShreyas B. Prabhu if (!power_mgt) { 157d405a98cSShreyas B. Prabhu pr_warn("opal: PowerMgmt Node not found\n"); 158d405a98cSShreyas B. Prabhu goto out; 159d405a98cSShreyas B. Prabhu } 160d405a98cSShreyas B. Prabhu dt_idle_states = of_property_count_u32_elems(power_mgt, 161d405a98cSShreyas B. Prabhu "ibm,cpu-idle-state-flags"); 162d405a98cSShreyas B. Prabhu if (dt_idle_states < 0) { 163d405a98cSShreyas B. Prabhu pr_warn("cpuidle-powernv: no idle states found in the DT\n"); 164d405a98cSShreyas B. Prabhu goto out; 165d405a98cSShreyas B. Prabhu } 166d405a98cSShreyas B. Prabhu 167d405a98cSShreyas B. Prabhu flags = kzalloc(sizeof(*flags) * dt_idle_states, GFP_KERNEL); 168d405a98cSShreyas B. Prabhu if (of_property_read_u32_array(power_mgt, 169d405a98cSShreyas B. Prabhu "ibm,cpu-idle-state-flags", flags, dt_idle_states)) { 170d405a98cSShreyas B. Prabhu pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-flags in DT\n"); 171d405a98cSShreyas B. Prabhu goto out_free; 172d405a98cSShreyas B. Prabhu } 173d405a98cSShreyas B. Prabhu 174d405a98cSShreyas B. Prabhu for (i = 0; i < dt_idle_states; i++) 175d405a98cSShreyas B. Prabhu supported_cpuidle_states |= flags[i]; 176d405a98cSShreyas B. Prabhu 177d405a98cSShreyas B. Prabhu if (!(supported_cpuidle_states & OPAL_PM_SLEEP_ENABLED_ER1)) { 178d405a98cSShreyas B. Prabhu patch_instruction( 179d405a98cSShreyas B. Prabhu (unsigned int *)pnv_fastsleep_workaround_at_entry, 180d405a98cSShreyas B. Prabhu PPC_INST_NOP); 181d405a98cSShreyas B. Prabhu patch_instruction( 182d405a98cSShreyas B. Prabhu (unsigned int *)pnv_fastsleep_workaround_at_exit, 183d405a98cSShreyas B. Prabhu PPC_INST_NOP); 184d405a98cSShreyas B. Prabhu } 185d405a98cSShreyas B. Prabhu pnv_alloc_idle_core_states(); 186d405a98cSShreyas B. Prabhu out_free: 187d405a98cSShreyas B. Prabhu kfree(flags); 188d405a98cSShreyas B. Prabhu out: 189d405a98cSShreyas B. Prabhu return 0; 190d405a98cSShreyas B. Prabhu } 191d405a98cSShreyas B. Prabhu 192d405a98cSShreyas B. Prabhu subsys_initcall(pnv_init_idle_states); 193