1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Support for periodic interrupts (100 per second) and for getting 4 * the current time from the RTC on Power Macintoshes. 5 * 6 * We use the decrementer register for our periodic interrupts. 7 * 8 * Paul Mackerras August 1996. 9 * Copyright (C) 1996 Paul Mackerras. 10 * Copyright (C) 2003-2005 Benjamin Herrenschmidt. 11 * 12 */ 13 #include <linux/errno.h> 14 #include <linux/sched.h> 15 #include <linux/kernel.h> 16 #include <linux/param.h> 17 #include <linux/string.h> 18 #include <linux/mm.h> 19 #include <linux/init.h> 20 #include <linux/time.h> 21 #include <linux/adb.h> 22 #include <linux/cuda.h> 23 #include <linux/pmu.h> 24 #include <linux/interrupt.h> 25 #include <linux/hardirq.h> 26 #include <linux/rtc.h> 27 28 #include <asm/sections.h> 29 #include <asm/prom.h> 30 #include <asm/io.h> 31 #include <asm/pgtable.h> 32 #include <asm/machdep.h> 33 #include <asm/time.h> 34 #include <asm/nvram.h> 35 #include <asm/smu.h> 36 37 #undef DEBUG 38 39 #ifdef DEBUG 40 #define DBG(x...) printk(x) 41 #else 42 #define DBG(x...) 43 #endif 44 45 /* Apparently the RTC stores seconds since 1 Jan 1904 */ 46 #define RTC_OFFSET 2082844800 47 48 /* 49 * Calibrate the decrementer frequency with the VIA timer 1. 50 */ 51 #define VIA_TIMER_FREQ_6 4700000 /* time 1 frequency * 6 */ 52 53 /* VIA registers */ 54 #define RS 0x200 /* skip between registers */ 55 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */ 56 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */ 57 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */ 58 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */ 59 #define ACR (11*RS) /* Auxiliary control register */ 60 #define IFR (13*RS) /* Interrupt flag register */ 61 62 /* Bits in ACR */ 63 #define T1MODE 0xc0 /* Timer 1 mode */ 64 #define T1MODE_CONT 0x40 /* continuous interrupts */ 65 66 /* Bits in IFR and IER */ 67 #define T1_INT 0x40 /* Timer 1 interrupt */ 68 69 long __init pmac_time_init(void) 70 { 71 s32 delta = 0; 72 #ifdef CONFIG_NVRAM 73 int dst; 74 75 delta = ((s32)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x9)) << 16; 76 delta |= ((s32)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0xa)) << 8; 77 delta |= pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0xb); 78 if (delta & 0x00800000UL) 79 delta |= 0xFF000000UL; 80 dst = ((pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x8) & 0x80) != 0); 81 printk("GMT Delta read from XPRAM: %d minutes, DST: %s\n", delta/60, 82 dst ? "on" : "off"); 83 #endif 84 return delta; 85 } 86 87 #ifdef CONFIG_ADB_CUDA 88 static time64_t cuda_get_time(void) 89 { 90 struct adb_request req; 91 time64_t now; 92 93 if (cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_GET_TIME) < 0) 94 return 0; 95 while (!req.complete) 96 cuda_poll(); 97 if (req.reply_len != 7) 98 printk(KERN_ERR "cuda_get_time: got %d byte reply\n", 99 req.reply_len); 100 now = (req.reply[3] << 24) + (req.reply[4] << 16) 101 + (req.reply[5] << 8) + req.reply[6]; 102 return now - RTC_OFFSET; 103 } 104 105 #define cuda_get_rtc_time(tm) rtc_time64_to_tm(cuda_get_time(), (tm)) 106 107 static int cuda_set_rtc_time(struct rtc_time *tm) 108 { 109 time64_t nowtime; 110 struct adb_request req; 111 112 nowtime = rtc_tm_to_time64(tm) + RTC_OFFSET; 113 if (cuda_request(&req, NULL, 6, CUDA_PACKET, CUDA_SET_TIME, 114 nowtime >> 24, nowtime >> 16, nowtime >> 8, 115 nowtime) < 0) 116 return -ENXIO; 117 while (!req.complete) 118 cuda_poll(); 119 if ((req.reply_len != 3) && (req.reply_len != 7)) 120 printk(KERN_ERR "cuda_set_rtc_time: got %d byte reply\n", 121 req.reply_len); 122 return 0; 123 } 124 125 #else 126 #define cuda_get_time() 0 127 #define cuda_get_rtc_time(tm) 128 #define cuda_set_rtc_time(tm) 0 129 #endif 130 131 #ifdef CONFIG_ADB_PMU 132 static time64_t pmu_get_time(void) 133 { 134 struct adb_request req; 135 time64_t now; 136 137 if (pmu_request(&req, NULL, 1, PMU_READ_RTC) < 0) 138 return 0; 139 pmu_wait_complete(&req); 140 if (req.reply_len != 4) 141 printk(KERN_ERR "pmu_get_time: got %d byte reply from PMU\n", 142 req.reply_len); 143 now = (req.reply[0] << 24) + (req.reply[1] << 16) 144 + (req.reply[2] << 8) + req.reply[3]; 145 return now - RTC_OFFSET; 146 } 147 148 #define pmu_get_rtc_time(tm) rtc_time64_to_tm(pmu_get_time(), (tm)) 149 150 static int pmu_set_rtc_time(struct rtc_time *tm) 151 { 152 time64_t nowtime; 153 struct adb_request req; 154 155 nowtime = rtc_tm_to_time64(tm) + RTC_OFFSET; 156 if (pmu_request(&req, NULL, 5, PMU_SET_RTC, nowtime >> 24, 157 nowtime >> 16, nowtime >> 8, nowtime) < 0) 158 return -ENXIO; 159 pmu_wait_complete(&req); 160 if (req.reply_len != 0) 161 printk(KERN_ERR "pmu_set_rtc_time: %d byte reply from PMU\n", 162 req.reply_len); 163 return 0; 164 } 165 166 #else 167 #define pmu_get_time() 0 168 #define pmu_get_rtc_time(tm) 169 #define pmu_set_rtc_time(tm) 0 170 #endif 171 172 #ifdef CONFIG_PMAC_SMU 173 static time64_t smu_get_time(void) 174 { 175 struct rtc_time tm; 176 177 if (smu_get_rtc_time(&tm, 1)) 178 return 0; 179 return rtc_tm_to_time64(&tm); 180 } 181 182 #else 183 #define smu_get_time() 0 184 #define smu_get_rtc_time(tm, spin) 185 #define smu_set_rtc_time(tm, spin) 0 186 #endif 187 188 /* Can't be __init, it's called when suspending and resuming */ 189 time64_t pmac_get_boot_time(void) 190 { 191 /* Get the time from the RTC, used only at boot time */ 192 switch (sys_ctrler) { 193 case SYS_CTRLER_CUDA: 194 return cuda_get_time(); 195 case SYS_CTRLER_PMU: 196 return pmu_get_time(); 197 case SYS_CTRLER_SMU: 198 return smu_get_time(); 199 default: 200 return 0; 201 } 202 } 203 204 void pmac_get_rtc_time(struct rtc_time *tm) 205 { 206 /* Get the time from the RTC, used only at boot time */ 207 switch (sys_ctrler) { 208 case SYS_CTRLER_CUDA: 209 cuda_get_rtc_time(tm); 210 break; 211 case SYS_CTRLER_PMU: 212 pmu_get_rtc_time(tm); 213 break; 214 case SYS_CTRLER_SMU: 215 smu_get_rtc_time(tm, 1); 216 break; 217 default: 218 ; 219 } 220 } 221 222 int pmac_set_rtc_time(struct rtc_time *tm) 223 { 224 switch (sys_ctrler) { 225 case SYS_CTRLER_CUDA: 226 return cuda_set_rtc_time(tm); 227 case SYS_CTRLER_PMU: 228 return pmu_set_rtc_time(tm); 229 case SYS_CTRLER_SMU: 230 return smu_set_rtc_time(tm, 1); 231 default: 232 return -ENODEV; 233 } 234 } 235 236 #ifdef CONFIG_PPC32 237 /* 238 * Calibrate the decrementer register using VIA timer 1. 239 * This is used both on powermacs and CHRP machines. 240 */ 241 int __init via_calibrate_decr(void) 242 { 243 struct device_node *vias; 244 volatile unsigned char __iomem *via; 245 int count = VIA_TIMER_FREQ_6 / 100; 246 unsigned int dstart, dend; 247 struct resource rsrc; 248 249 vias = of_find_node_by_name(NULL, "via-cuda"); 250 if (vias == NULL) 251 vias = of_find_node_by_name(NULL, "via-pmu"); 252 if (vias == NULL) 253 vias = of_find_node_by_name(NULL, "via"); 254 if (vias == NULL || of_address_to_resource(vias, 0, &rsrc)) { 255 of_node_put(vias); 256 return 0; 257 } 258 of_node_put(vias); 259 via = ioremap(rsrc.start, resource_size(&rsrc)); 260 if (via == NULL) { 261 printk(KERN_ERR "Failed to map VIA for timer calibration !\n"); 262 return 0; 263 } 264 265 /* set timer 1 for continuous interrupts */ 266 out_8(&via[ACR], (via[ACR] & ~T1MODE) | T1MODE_CONT); 267 /* set the counter to a small value */ 268 out_8(&via[T1CH], 2); 269 /* set the latch to `count' */ 270 out_8(&via[T1LL], count); 271 out_8(&via[T1LH], count >> 8); 272 /* wait until it hits 0 */ 273 while ((in_8(&via[IFR]) & T1_INT) == 0) 274 ; 275 dstart = get_dec(); 276 /* clear the interrupt & wait until it hits 0 again */ 277 in_8(&via[T1CL]); 278 while ((in_8(&via[IFR]) & T1_INT) == 0) 279 ; 280 dend = get_dec(); 281 282 ppc_tb_freq = (dstart - dend) * 100 / 6; 283 284 iounmap(via); 285 286 return 1; 287 } 288 #endif 289 290 /* 291 * Query the OF and get the decr frequency. 292 */ 293 void __init pmac_calibrate_decr(void) 294 { 295 generic_calibrate_decr(); 296 297 #ifdef CONFIG_PPC32 298 /* We assume MacRISC2 machines have correct device-tree 299 * calibration. That's better since the VIA itself seems 300 * to be slightly off. --BenH 301 */ 302 if (!of_machine_is_compatible("MacRISC2") && 303 !of_machine_is_compatible("MacRISC3") && 304 !of_machine_is_compatible("MacRISC4")) 305 if (via_calibrate_decr()) 306 return; 307 308 /* Special case: QuickSilver G4s seem to have a badly calibrated 309 * timebase-frequency in OF, VIA is much better on these. We should 310 * probably implement calibration based on the KL timer on these 311 * machines anyway... -BenH 312 */ 313 if (of_machine_is_compatible("PowerMac3,5")) 314 if (via_calibrate_decr()) 315 return; 316 #endif 317 } 318