1 /*
2  * Support for periodic interrupts (100 per second) and for getting
3  * the current time from the RTC on Power Macintoshes.
4  *
5  * We use the decrementer register for our periodic interrupts.
6  *
7  * Paul Mackerras	August 1996.
8  * Copyright (C) 1996 Paul Mackerras.
9  * Copyright (C) 2003-2005 Benjamin Herrenschmidt.
10  *
11  */
12 #include <linux/errno.h>
13 #include <linux/sched.h>
14 #include <linux/kernel.h>
15 #include <linux/param.h>
16 #include <linux/string.h>
17 #include <linux/mm.h>
18 #include <linux/init.h>
19 #include <linux/time.h>
20 #include <linux/adb.h>
21 #include <linux/cuda.h>
22 #include <linux/pmu.h>
23 #include <linux/interrupt.h>
24 #include <linux/hardirq.h>
25 #include <linux/rtc.h>
26 
27 #include <asm/sections.h>
28 #include <asm/prom.h>
29 #include <asm/system.h>
30 #include <asm/io.h>
31 #include <asm/pgtable.h>
32 #include <asm/machdep.h>
33 #include <asm/time.h>
34 #include <asm/nvram.h>
35 #include <asm/smu.h>
36 
37 #undef DEBUG
38 
39 #ifdef DEBUG
40 #define DBG(x...) printk(x)
41 #else
42 #define DBG(x...)
43 #endif
44 
45 /* Apparently the RTC stores seconds since 1 Jan 1904 */
46 #define RTC_OFFSET	2082844800
47 
48 /*
49  * Calibrate the decrementer frequency with the VIA timer 1.
50  */
51 #define VIA_TIMER_FREQ_6	4700000	/* time 1 frequency * 6 */
52 
53 /* VIA registers */
54 #define RS		0x200		/* skip between registers */
55 #define T1CL		(4*RS)		/* Timer 1 ctr/latch (low 8 bits) */
56 #define T1CH		(5*RS)		/* Timer 1 counter (high 8 bits) */
57 #define T1LL		(6*RS)		/* Timer 1 latch (low 8 bits) */
58 #define T1LH		(7*RS)		/* Timer 1 latch (high 8 bits) */
59 #define ACR		(11*RS)		/* Auxiliary control register */
60 #define IFR		(13*RS)		/* Interrupt flag register */
61 
62 /* Bits in ACR */
63 #define T1MODE		0xc0		/* Timer 1 mode */
64 #define T1MODE_CONT	0x40		/*  continuous interrupts */
65 
66 /* Bits in IFR and IER */
67 #define T1_INT		0x40		/* Timer 1 interrupt */
68 
69 long __init pmac_time_init(void)
70 {
71 	s32 delta = 0;
72 #ifdef CONFIG_NVRAM
73 	int dst;
74 
75 	delta = ((s32)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x9)) << 16;
76 	delta |= ((s32)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0xa)) << 8;
77 	delta |= pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0xb);
78 	if (delta & 0x00800000UL)
79 		delta |= 0xFF000000UL;
80 	dst = ((pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x8) & 0x80) != 0);
81 	printk("GMT Delta read from XPRAM: %d minutes, DST: %s\n", delta/60,
82 		dst ? "on" : "off");
83 #endif
84 	return delta;
85 }
86 
87 #if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU)
88 static void to_rtc_time(unsigned long now, struct rtc_time *tm)
89 {
90 	to_tm(now, tm);
91 	tm->tm_year -= 1900;
92 	tm->tm_mon -= 1;
93 }
94 #endif
95 
96 static unsigned long from_rtc_time(struct rtc_time *tm)
97 {
98 	return mktime(tm->tm_year+1900, tm->tm_mon+1, tm->tm_mday,
99 		      tm->tm_hour, tm->tm_min, tm->tm_sec);
100 }
101 
102 #ifdef CONFIG_ADB_CUDA
103 static unsigned long cuda_get_time(void)
104 {
105 	struct adb_request req;
106 	unsigned int now;
107 
108 	if (cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_GET_TIME) < 0)
109 		return 0;
110 	while (!req.complete)
111 		cuda_poll();
112 	if (req.reply_len != 7)
113 		printk(KERN_ERR "cuda_get_time: got %d byte reply\n",
114 		       req.reply_len);
115 	now = (req.reply[3] << 24) + (req.reply[4] << 16)
116 		+ (req.reply[5] << 8) + req.reply[6];
117 	return ((unsigned long)now) - RTC_OFFSET;
118 }
119 
120 #define cuda_get_rtc_time(tm)	to_rtc_time(cuda_get_time(), (tm))
121 
122 static int cuda_set_rtc_time(struct rtc_time *tm)
123 {
124 	unsigned int nowtime;
125 	struct adb_request req;
126 
127 	nowtime = from_rtc_time(tm) + RTC_OFFSET;
128 	if (cuda_request(&req, NULL, 6, CUDA_PACKET, CUDA_SET_TIME,
129 			 nowtime >> 24, nowtime >> 16, nowtime >> 8,
130 			 nowtime) < 0)
131 		return -ENXIO;
132 	while (!req.complete)
133 		cuda_poll();
134 	if ((req.reply_len != 3) && (req.reply_len != 7))
135 		printk(KERN_ERR "cuda_set_rtc_time: got %d byte reply\n",
136 		       req.reply_len);
137 	return 0;
138 }
139 
140 #else
141 #define cuda_get_time()		0
142 #define cuda_get_rtc_time(tm)
143 #define cuda_set_rtc_time(tm)	0
144 #endif
145 
146 #ifdef CONFIG_ADB_PMU
147 static unsigned long pmu_get_time(void)
148 {
149 	struct adb_request req;
150 	unsigned int now;
151 
152 	if (pmu_request(&req, NULL, 1, PMU_READ_RTC) < 0)
153 		return 0;
154 	pmu_wait_complete(&req);
155 	if (req.reply_len != 4)
156 		printk(KERN_ERR "pmu_get_time: got %d byte reply from PMU\n",
157 		       req.reply_len);
158 	now = (req.reply[0] << 24) + (req.reply[1] << 16)
159 		+ (req.reply[2] << 8) + req.reply[3];
160 	return ((unsigned long)now) - RTC_OFFSET;
161 }
162 
163 #define pmu_get_rtc_time(tm)	to_rtc_time(pmu_get_time(), (tm))
164 
165 static int pmu_set_rtc_time(struct rtc_time *tm)
166 {
167 	unsigned int nowtime;
168 	struct adb_request req;
169 
170 	nowtime = from_rtc_time(tm) + RTC_OFFSET;
171 	if (pmu_request(&req, NULL, 5, PMU_SET_RTC, nowtime >> 24,
172 			nowtime >> 16, nowtime >> 8, nowtime) < 0)
173 		return -ENXIO;
174 	pmu_wait_complete(&req);
175 	if (req.reply_len != 0)
176 		printk(KERN_ERR "pmu_set_rtc_time: %d byte reply from PMU\n",
177 		       req.reply_len);
178 	return 0;
179 }
180 
181 #else
182 #define pmu_get_time()		0
183 #define pmu_get_rtc_time(tm)
184 #define pmu_set_rtc_time(tm)	0
185 #endif
186 
187 #ifdef CONFIG_PMAC_SMU
188 static unsigned long smu_get_time(void)
189 {
190 	struct rtc_time tm;
191 
192 	if (smu_get_rtc_time(&tm, 1))
193 		return 0;
194 	return from_rtc_time(&tm);
195 }
196 
197 #else
198 #define smu_get_time()			0
199 #define smu_get_rtc_time(tm, spin)
200 #define smu_set_rtc_time(tm, spin)	0
201 #endif
202 
203 /* Can't be __init, it's called when suspending and resuming */
204 unsigned long pmac_get_boot_time(void)
205 {
206 	/* Get the time from the RTC, used only at boot time */
207 	switch (sys_ctrler) {
208 	case SYS_CTRLER_CUDA:
209 		return cuda_get_time();
210 	case SYS_CTRLER_PMU:
211 		return pmu_get_time();
212 	case SYS_CTRLER_SMU:
213 		return smu_get_time();
214 	default:
215 		return 0;
216 	}
217 }
218 
219 void pmac_get_rtc_time(struct rtc_time *tm)
220 {
221 	/* Get the time from the RTC, used only at boot time */
222 	switch (sys_ctrler) {
223 	case SYS_CTRLER_CUDA:
224 		cuda_get_rtc_time(tm);
225 		break;
226 	case SYS_CTRLER_PMU:
227 		pmu_get_rtc_time(tm);
228 		break;
229 	case SYS_CTRLER_SMU:
230 		smu_get_rtc_time(tm, 1);
231 		break;
232 	default:
233 		;
234 	}
235 }
236 
237 int pmac_set_rtc_time(struct rtc_time *tm)
238 {
239 	switch (sys_ctrler) {
240 	case SYS_CTRLER_CUDA:
241 		return cuda_set_rtc_time(tm);
242 	case SYS_CTRLER_PMU:
243 		return pmu_set_rtc_time(tm);
244 	case SYS_CTRLER_SMU:
245 		return smu_set_rtc_time(tm, 1);
246 	default:
247 		return -ENODEV;
248 	}
249 }
250 
251 #ifdef CONFIG_PPC32
252 /*
253  * Calibrate the decrementer register using VIA timer 1.
254  * This is used both on powermacs and CHRP machines.
255  */
256 int __init via_calibrate_decr(void)
257 {
258 	struct device_node *vias;
259 	volatile unsigned char __iomem *via;
260 	int count = VIA_TIMER_FREQ_6 / 100;
261 	unsigned int dstart, dend;
262 	struct resource rsrc;
263 
264 	vias = of_find_node_by_name(NULL, "via-cuda");
265 	if (vias == 0)
266 		vias = of_find_node_by_name(NULL, "via-pmu");
267 	if (vias == 0)
268 		vias = of_find_node_by_name(NULL, "via");
269 	if (vias == 0 || of_address_to_resource(vias, 0, &rsrc))
270 		return 0;
271 	via = ioremap(rsrc.start, rsrc.end - rsrc.start + 1);
272 	if (via == NULL) {
273 		printk(KERN_ERR "Failed to map VIA for timer calibration !\n");
274 		return 0;
275 	}
276 
277 	/* set timer 1 for continuous interrupts */
278 	out_8(&via[ACR], (via[ACR] & ~T1MODE) | T1MODE_CONT);
279 	/* set the counter to a small value */
280 	out_8(&via[T1CH], 2);
281 	/* set the latch to `count' */
282 	out_8(&via[T1LL], count);
283 	out_8(&via[T1LH], count >> 8);
284 	/* wait until it hits 0 */
285 	while ((in_8(&via[IFR]) & T1_INT) == 0)
286 		;
287 	dstart = get_dec();
288 	/* clear the interrupt & wait until it hits 0 again */
289 	in_8(&via[T1CL]);
290 	while ((in_8(&via[IFR]) & T1_INT) == 0)
291 		;
292 	dend = get_dec();
293 
294 	ppc_tb_freq = (dstart - dend) * 100 / 6;
295 
296 	iounmap(via);
297 
298 	return 1;
299 }
300 #endif
301 
302 /*
303  * Query the OF and get the decr frequency.
304  */
305 void __init pmac_calibrate_decr(void)
306 {
307 	generic_calibrate_decr();
308 
309 #ifdef CONFIG_PPC32
310 	/* We assume MacRISC2 machines have correct device-tree
311 	 * calibration. That's better since the VIA itself seems
312 	 * to be slightly off. --BenH
313 	 */
314 	if (!machine_is_compatible("MacRISC2") &&
315 	    !machine_is_compatible("MacRISC3") &&
316 	    !machine_is_compatible("MacRISC4"))
317 		if (via_calibrate_decr())
318 			return;
319 
320 	/* Special case: QuickSilver G4s seem to have a badly calibrated
321 	 * timebase-frequency in OF, VIA is much better on these. We should
322 	 * probably implement calibration based on the KL timer on these
323 	 * machines anyway... -BenH
324 	 */
325 	if (machine_is_compatible("PowerMac3,5"))
326 		if (via_calibrate_decr())
327 			return;
328 #endif
329 }
330