1 /* 2 * Powermac setup and early boot code plus other random bits. 3 * 4 * PowerPC version 5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 6 * 7 * Adapted for Power Macintosh by Paul Mackerras 8 * Copyright (C) 1996 Paul Mackerras (paulus@samba.org) 9 * 10 * Derived from "arch/alpha/kernel/setup.c" 11 * Copyright (C) 1995 Linus Torvalds 12 * 13 * Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org) 14 * 15 * This program is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License 17 * as published by the Free Software Foundation; either version 18 * 2 of the License, or (at your option) any later version. 19 * 20 */ 21 22 /* 23 * bootup setup stuff.. 24 */ 25 26 #include <linux/init.h> 27 #include <linux/errno.h> 28 #include <linux/sched.h> 29 #include <linux/kernel.h> 30 #include <linux/mm.h> 31 #include <linux/stddef.h> 32 #include <linux/unistd.h> 33 #include <linux/ptrace.h> 34 #include <linux/slab.h> 35 #include <linux/user.h> 36 #include <linux/a.out.h> 37 #include <linux/tty.h> 38 #include <linux/string.h> 39 #include <linux/delay.h> 40 #include <linux/ioport.h> 41 #include <linux/major.h> 42 #include <linux/initrd.h> 43 #include <linux/vt_kern.h> 44 #include <linux/console.h> 45 #include <linux/pci.h> 46 #include <linux/adb.h> 47 #include <linux/cuda.h> 48 #include <linux/pmu.h> 49 #include <linux/irq.h> 50 #include <linux/seq_file.h> 51 #include <linux/root_dev.h> 52 #include <linux/bitops.h> 53 #include <linux/suspend.h> 54 #include <linux/of_device.h> 55 #include <linux/of_platform.h> 56 57 #include <asm/reg.h> 58 #include <asm/sections.h> 59 #include <asm/prom.h> 60 #include <asm/system.h> 61 #include <asm/pgtable.h> 62 #include <asm/io.h> 63 #include <asm/kexec.h> 64 #include <asm/pci-bridge.h> 65 #include <asm/ohare.h> 66 #include <asm/mediabay.h> 67 #include <asm/machdep.h> 68 #include <asm/dma.h> 69 #include <asm/cputable.h> 70 #include <asm/btext.h> 71 #include <asm/pmac_feature.h> 72 #include <asm/time.h> 73 #include <asm/mmu_context.h> 74 #include <asm/iommu.h> 75 #include <asm/smu.h> 76 #include <asm/pmc.h> 77 #include <asm/lmb.h> 78 #include <asm/udbg.h> 79 80 #include "pmac.h" 81 82 #undef SHOW_GATWICK_IRQS 83 84 int ppc_override_l2cr = 0; 85 int ppc_override_l2cr_value; 86 int has_l2cache = 0; 87 88 int pmac_newworld; 89 90 static int current_root_goodness = -1; 91 92 extern struct machdep_calls pmac_md; 93 94 #define DEFAULT_ROOT_DEVICE Root_SDA1 /* sda1 - slightly silly choice */ 95 96 #ifdef CONFIG_PPC64 97 int sccdbg; 98 #endif 99 100 extern void zs_kgdb_hook(int tty_num); 101 102 sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN; 103 EXPORT_SYMBOL(sys_ctrler); 104 105 #ifdef CONFIG_PMAC_SMU 106 unsigned long smu_cmdbuf_abs; 107 EXPORT_SYMBOL(smu_cmdbuf_abs); 108 #endif 109 110 #ifdef CONFIG_SMP 111 extern struct smp_ops_t psurge_smp_ops; 112 extern struct smp_ops_t core99_smp_ops; 113 #endif /* CONFIG_SMP */ 114 115 static void pmac_show_cpuinfo(struct seq_file *m) 116 { 117 struct device_node *np; 118 const char *pp; 119 int plen; 120 int mbmodel; 121 unsigned int mbflags; 122 char* mbname; 123 124 mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, 125 PMAC_MB_INFO_MODEL, 0); 126 mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, 127 PMAC_MB_INFO_FLAGS, 0); 128 if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME, 129 (long) &mbname) != 0) 130 mbname = "Unknown"; 131 132 /* find motherboard type */ 133 seq_printf(m, "machine\t\t: "); 134 np = of_find_node_by_path("/"); 135 if (np != NULL) { 136 pp = of_get_property(np, "model", NULL); 137 if (pp != NULL) 138 seq_printf(m, "%s\n", pp); 139 else 140 seq_printf(m, "PowerMac\n"); 141 pp = of_get_property(np, "compatible", &plen); 142 if (pp != NULL) { 143 seq_printf(m, "motherboard\t:"); 144 while (plen > 0) { 145 int l = strlen(pp) + 1; 146 seq_printf(m, " %s", pp); 147 plen -= l; 148 pp += l; 149 } 150 seq_printf(m, "\n"); 151 } 152 of_node_put(np); 153 } else 154 seq_printf(m, "PowerMac\n"); 155 156 /* print parsed model */ 157 seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname); 158 seq_printf(m, "pmac flags\t: %08x\n", mbflags); 159 160 /* find l2 cache info */ 161 np = of_find_node_by_name(NULL, "l2-cache"); 162 if (np == NULL) 163 np = of_find_node_by_type(NULL, "cache"); 164 if (np != NULL) { 165 const unsigned int *ic = 166 of_get_property(np, "i-cache-size", NULL); 167 const unsigned int *dc = 168 of_get_property(np, "d-cache-size", NULL); 169 seq_printf(m, "L2 cache\t:"); 170 has_l2cache = 1; 171 if (of_get_property(np, "cache-unified", NULL) != 0 && dc) { 172 seq_printf(m, " %dK unified", *dc / 1024); 173 } else { 174 if (ic) 175 seq_printf(m, " %dK instruction", *ic / 1024); 176 if (dc) 177 seq_printf(m, "%s %dK data", 178 (ic? " +": ""), *dc / 1024); 179 } 180 pp = of_get_property(np, "ram-type", NULL); 181 if (pp) 182 seq_printf(m, " %s", pp); 183 seq_printf(m, "\n"); 184 of_node_put(np); 185 } 186 187 /* Indicate newworld/oldworld */ 188 seq_printf(m, "pmac-generation\t: %s\n", 189 pmac_newworld ? "NewWorld" : "OldWorld"); 190 } 191 192 #ifndef CONFIG_ADB_CUDA 193 int find_via_cuda(void) 194 { 195 struct device_node *dn = of_find_node_by_name(NULL, "via-cuda"); 196 197 if (!dn) 198 return 0; 199 of_node_put(dn); 200 printk("WARNING ! Your machine is CUDA-based but your kernel\n"); 201 printk(" wasn't compiled with CONFIG_ADB_CUDA option !\n"); 202 return 0; 203 } 204 #endif 205 206 #ifndef CONFIG_ADB_PMU 207 int find_via_pmu(void) 208 { 209 struct device_node *dn = of_find_node_by_name(NULL, "via-pmu"); 210 211 if (!dn) 212 return 0; 213 of_node_put(dn); 214 printk("WARNING ! Your machine is PMU-based but your kernel\n"); 215 printk(" wasn't compiled with CONFIG_ADB_PMU option !\n"); 216 return 0; 217 } 218 #endif 219 220 #ifndef CONFIG_PMAC_SMU 221 int smu_init(void) 222 { 223 /* should check and warn if SMU is present */ 224 return 0; 225 } 226 #endif 227 228 #ifdef CONFIG_PPC32 229 static volatile u32 *sysctrl_regs; 230 231 static void __init ohare_init(void) 232 { 233 struct device_node *dn; 234 235 /* this area has the CPU identification register 236 and some registers used by smp boards */ 237 sysctrl_regs = (volatile u32 *) ioremap(0xf8000000, 0x1000); 238 239 /* 240 * Turn on the L2 cache. 241 * We assume that we have a PSX memory controller iff 242 * we have an ohare I/O controller. 243 */ 244 dn = of_find_node_by_name(NULL, "ohare"); 245 if (dn) { 246 of_node_put(dn); 247 if (((sysctrl_regs[2] >> 24) & 0xf) >= 3) { 248 if (sysctrl_regs[4] & 0x10) 249 sysctrl_regs[4] |= 0x04000020; 250 else 251 sysctrl_regs[4] |= 0x04000000; 252 if(has_l2cache) 253 printk(KERN_INFO "Level 2 cache enabled\n"); 254 } 255 } 256 } 257 258 static void __init l2cr_init(void) 259 { 260 /* Checks "l2cr-value" property in the registry */ 261 if (cpu_has_feature(CPU_FTR_L2CR)) { 262 struct device_node *np = of_find_node_by_name(NULL, "cpus"); 263 if (np == 0) 264 np = of_find_node_by_type(NULL, "cpu"); 265 if (np != 0) { 266 const unsigned int *l2cr = 267 of_get_property(np, "l2cr-value", NULL); 268 if (l2cr != 0) { 269 ppc_override_l2cr = 1; 270 ppc_override_l2cr_value = *l2cr; 271 _set_L2CR(0); 272 _set_L2CR(ppc_override_l2cr_value); 273 } 274 of_node_put(np); 275 } 276 } 277 278 if (ppc_override_l2cr) 279 printk(KERN_INFO "L2CR overridden (0x%x), " 280 "backside cache is %s\n", 281 ppc_override_l2cr_value, 282 (ppc_override_l2cr_value & 0x80000000) 283 ? "enabled" : "disabled"); 284 } 285 #endif 286 287 static void __init pmac_setup_arch(void) 288 { 289 struct device_node *cpu, *ic; 290 const int *fp; 291 unsigned long pvr; 292 293 pvr = PVR_VER(mfspr(SPRN_PVR)); 294 295 /* Set loops_per_jiffy to a half-way reasonable value, 296 for use until calibrate_delay gets called. */ 297 loops_per_jiffy = 50000000 / HZ; 298 cpu = of_find_node_by_type(NULL, "cpu"); 299 if (cpu != NULL) { 300 fp = of_get_property(cpu, "clock-frequency", NULL); 301 if (fp != NULL) { 302 if (pvr >= 0x30 && pvr < 0x80) 303 /* PPC970 etc. */ 304 loops_per_jiffy = *fp / (3 * HZ); 305 else if (pvr == 4 || pvr >= 8) 306 /* 604, G3, G4 etc. */ 307 loops_per_jiffy = *fp / HZ; 308 else 309 /* 601, 603, etc. */ 310 loops_per_jiffy = *fp / (2 * HZ); 311 } 312 of_node_put(cpu); 313 } 314 315 /* See if newworld or oldworld */ 316 for (ic = NULL; (ic = of_find_all_nodes(ic)) != NULL; ) 317 if (of_get_property(ic, "interrupt-controller", NULL)) 318 break; 319 if (ic) { 320 pmac_newworld = 1; 321 of_node_put(ic); 322 } 323 324 /* Lookup PCI hosts */ 325 pmac_pci_init(); 326 327 #ifdef CONFIG_PPC32 328 ohare_init(); 329 l2cr_init(); 330 #endif /* CONFIG_PPC32 */ 331 332 #ifdef CONFIG_KGDB 333 zs_kgdb_hook(0); 334 #endif 335 336 find_via_cuda(); 337 find_via_pmu(); 338 smu_init(); 339 340 #if defined(CONFIG_NVRAM) || defined(CONFIG_PPC64) 341 pmac_nvram_init(); 342 #endif 343 344 #ifdef CONFIG_PPC32 345 #ifdef CONFIG_BLK_DEV_INITRD 346 if (initrd_start) 347 ROOT_DEV = Root_RAM0; 348 else 349 #endif 350 ROOT_DEV = DEFAULT_ROOT_DEVICE; 351 #endif 352 353 #ifdef CONFIG_SMP 354 /* Check for Core99 */ 355 ic = of_find_node_by_name(NULL, "uni-n"); 356 if (!ic) 357 ic = of_find_node_by_name(NULL, "u3"); 358 if (!ic) 359 ic = of_find_node_by_name(NULL, "u4"); 360 if (ic) { 361 of_node_put(ic); 362 smp_ops = &core99_smp_ops; 363 } 364 #ifdef CONFIG_PPC32 365 else { 366 /* 367 * We have to set bits in cpu_possible_map here since the 368 * secondary CPU(s) aren't in the device tree, and 369 * setup_per_cpu_areas only allocates per-cpu data for 370 * CPUs in the cpu_possible_map. 371 */ 372 int cpu; 373 374 for (cpu = 1; cpu < 4 && cpu < NR_CPUS; ++cpu) 375 cpu_set(cpu, cpu_possible_map); 376 smp_ops = &psurge_smp_ops; 377 } 378 #endif 379 #endif /* CONFIG_SMP */ 380 381 #ifdef CONFIG_ADB 382 if (strstr(cmd_line, "adb_sync")) { 383 extern int __adb_probe_sync; 384 __adb_probe_sync = 1; 385 } 386 #endif /* CONFIG_ADB */ 387 } 388 389 #ifdef CONFIG_SCSI 390 void note_scsi_host(struct device_node *node, void *host) 391 { 392 } 393 EXPORT_SYMBOL(note_scsi_host); 394 #endif 395 396 static int initializing = 1; 397 398 static int pmac_late_init(void) 399 { 400 initializing = 0; 401 /* this is udbg (which is __init) and we can later use it during 402 * cpu hotplug (in smp_core99_kick_cpu) */ 403 ppc_md.progress = NULL; 404 return 0; 405 } 406 machine_late_initcall(powermac, pmac_late_init); 407 408 /* 409 * This is __init_refok because we check for "initializing" before 410 * touching any of the __init sensitive things and "initializing" 411 * will be false after __init time. This can't be __init because it 412 * can be called whenever a disk is first accessed. 413 */ 414 void __init_refok note_bootable_part(dev_t dev, int part, int goodness) 415 { 416 char *p; 417 418 if (!initializing) 419 return; 420 if ((goodness <= current_root_goodness) && 421 ROOT_DEV != DEFAULT_ROOT_DEVICE) 422 return; 423 p = strstr(boot_command_line, "root="); 424 if (p != NULL && (p == boot_command_line || p[-1] == ' ')) 425 return; 426 427 ROOT_DEV = dev + part; 428 current_root_goodness = goodness; 429 } 430 431 #ifdef CONFIG_ADB_CUDA 432 static void cuda_restart(void) 433 { 434 struct adb_request req; 435 436 cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_RESET_SYSTEM); 437 for (;;) 438 cuda_poll(); 439 } 440 441 static void cuda_shutdown(void) 442 { 443 struct adb_request req; 444 445 cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_POWERDOWN); 446 for (;;) 447 cuda_poll(); 448 } 449 450 #else 451 #define cuda_restart() 452 #define cuda_shutdown() 453 #endif 454 455 #ifndef CONFIG_ADB_PMU 456 #define pmu_restart() 457 #define pmu_shutdown() 458 #endif 459 460 #ifndef CONFIG_PMAC_SMU 461 #define smu_restart() 462 #define smu_shutdown() 463 #endif 464 465 static void pmac_restart(char *cmd) 466 { 467 switch (sys_ctrler) { 468 case SYS_CTRLER_CUDA: 469 cuda_restart(); 470 break; 471 case SYS_CTRLER_PMU: 472 pmu_restart(); 473 break; 474 case SYS_CTRLER_SMU: 475 smu_restart(); 476 break; 477 default: ; 478 } 479 } 480 481 static void pmac_power_off(void) 482 { 483 switch (sys_ctrler) { 484 case SYS_CTRLER_CUDA: 485 cuda_shutdown(); 486 break; 487 case SYS_CTRLER_PMU: 488 pmu_shutdown(); 489 break; 490 case SYS_CTRLER_SMU: 491 smu_shutdown(); 492 break; 493 default: ; 494 } 495 } 496 497 static void 498 pmac_halt(void) 499 { 500 pmac_power_off(); 501 } 502 503 /* 504 * Early initialization. 505 */ 506 static void __init pmac_init_early(void) 507 { 508 /* Enable early btext debug if requested */ 509 if (strstr(cmd_line, "btextdbg")) { 510 udbg_adb_init_early(); 511 register_early_udbg_console(); 512 } 513 514 /* Probe motherboard chipset */ 515 pmac_feature_init(); 516 517 /* Initialize debug stuff */ 518 udbg_scc_init(!!strstr(cmd_line, "sccdbg")); 519 udbg_adb_init(!!strstr(cmd_line, "btextdbg")); 520 521 #ifdef CONFIG_PPC64 522 iommu_init_early_dart(); 523 #endif 524 } 525 526 static int __init pmac_declare_of_platform_devices(void) 527 { 528 struct device_node *np; 529 530 if (machine_is(chrp)) 531 return -1; 532 533 np = of_find_node_by_name(NULL, "valkyrie"); 534 if (np) 535 of_platform_device_create(np, "valkyrie", NULL); 536 np = of_find_node_by_name(NULL, "platinum"); 537 if (np) 538 of_platform_device_create(np, "platinum", NULL); 539 np = of_find_node_by_type(NULL, "smu"); 540 if (np) { 541 of_platform_device_create(np, "smu", NULL); 542 of_node_put(np); 543 } 544 545 return 0; 546 } 547 machine_device_initcall(powermac, pmac_declare_of_platform_devices); 548 549 /* 550 * Called very early, MMU is off, device-tree isn't unflattened 551 */ 552 static int __init pmac_probe(void) 553 { 554 unsigned long root = of_get_flat_dt_root(); 555 556 if (!of_flat_dt_is_compatible(root, "Power Macintosh") && 557 !of_flat_dt_is_compatible(root, "MacRISC")) 558 return 0; 559 560 #ifdef CONFIG_PPC64 561 /* 562 * On U3, the DART (iommu) must be allocated now since it 563 * has an impact on htab_initialize (due to the large page it 564 * occupies having to be broken up so the DART itself is not 565 * part of the cacheable linar mapping 566 */ 567 alloc_dart_table(); 568 569 hpte_init_native(); 570 #endif 571 572 #ifdef CONFIG_PPC32 573 /* isa_io_base gets set in pmac_pci_init */ 574 ISA_DMA_THRESHOLD = ~0L; 575 DMA_MODE_READ = 1; 576 DMA_MODE_WRITE = 2; 577 578 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) 579 #ifdef CONFIG_BLK_DEV_IDE_PMAC 580 ppc_ide_md.ide_init_hwif = pmac_ide_init_hwif_ports; 581 ppc_ide_md.default_io_base = pmac_ide_get_base; 582 #endif /* CONFIG_BLK_DEV_IDE_PMAC */ 583 #endif /* defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) */ 584 585 #endif /* CONFIG_PPC32 */ 586 587 #ifdef CONFIG_PMAC_SMU 588 /* 589 * SMU based G5s need some memory below 2Gb, at least the current 590 * driver needs that. We have to allocate it now. We allocate 4k 591 * (1 small page) for now. 592 */ 593 smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL); 594 #endif /* CONFIG_PMAC_SMU */ 595 596 return 1; 597 } 598 599 #ifdef CONFIG_PPC64 600 /* Move that to pci.c */ 601 static int pmac_pci_probe_mode(struct pci_bus *bus) 602 { 603 struct device_node *node = bus->sysdata; 604 605 /* We need to use normal PCI probing for the AGP bus, 606 * since the device for the AGP bridge isn't in the tree. 607 * Same for the PCIe host on U4 and the HT host bridge. 608 */ 609 if (bus->self == NULL && (of_device_is_compatible(node, "u3-agp") || 610 of_device_is_compatible(node, "u4-pcie") || 611 of_device_is_compatible(node, "u3-ht"))) 612 return PCI_PROBE_NORMAL; 613 return PCI_PROBE_DEVTREE; 614 } 615 616 #ifdef CONFIG_HOTPLUG_CPU 617 /* access per cpu vars from generic smp.c */ 618 DECLARE_PER_CPU(int, cpu_state); 619 620 static void pmac_cpu_die(void) 621 { 622 /* 623 * turn off as much as possible, we'll be 624 * kicked out as this will only be invoked 625 * on core99 platforms for now ... 626 */ 627 628 printk(KERN_INFO "CPU#%d offline\n", smp_processor_id()); 629 __get_cpu_var(cpu_state) = CPU_DEAD; 630 smp_wmb(); 631 632 /* 633 * during the path that leads here preemption is disabled, 634 * reenable it now so that when coming up preempt count is 635 * zero correctly 636 */ 637 preempt_enable(); 638 639 /* 640 * hard-disable interrupts for the non-NAP case, the NAP code 641 * needs to re-enable interrupts (but soft-disables them) 642 */ 643 hard_irq_disable(); 644 645 while (1) { 646 /* let's not take timer interrupts too often ... */ 647 set_dec(0x7fffffff); 648 649 /* should always be true at this point */ 650 if (cpu_has_feature(CPU_FTR_CAN_NAP)) 651 power4_cpu_offline_powersave(); 652 else { 653 HMT_low(); 654 HMT_very_low(); 655 } 656 } 657 } 658 #endif /* CONFIG_HOTPLUG_CPU */ 659 660 #endif /* CONFIG_PPC64 */ 661 662 define_machine(powermac) { 663 .name = "PowerMac", 664 .probe = pmac_probe, 665 .setup_arch = pmac_setup_arch, 666 .init_early = pmac_init_early, 667 .show_cpuinfo = pmac_show_cpuinfo, 668 .init_IRQ = pmac_pic_init, 669 .get_irq = NULL, /* changed later */ 670 .pci_irq_fixup = pmac_pci_irq_fixup, 671 .restart = pmac_restart, 672 .power_off = pmac_power_off, 673 .halt = pmac_halt, 674 .time_init = pmac_time_init, 675 .get_boot_time = pmac_get_boot_time, 676 .set_rtc_time = pmac_set_rtc_time, 677 .get_rtc_time = pmac_get_rtc_time, 678 .calibrate_decr = pmac_calibrate_decr, 679 .feature_call = pmac_do_feature_call, 680 .progress = udbg_progress, 681 #ifdef CONFIG_PPC64 682 .pci_probe_mode = pmac_pci_probe_mode, 683 .power_save = power4_idle, 684 .enable_pmcs = power4_enable_pmcs, 685 #ifdef CONFIG_KEXEC 686 .machine_kexec = default_machine_kexec, 687 .machine_kexec_prepare = default_machine_kexec_prepare, 688 .machine_crash_shutdown = default_machine_crash_shutdown, 689 #endif 690 #endif /* CONFIG_PPC64 */ 691 #ifdef CONFIG_PPC32 692 .pcibios_enable_device_hook = pmac_pci_enable_device_hook, 693 .pcibios_after_init = pmac_pcibios_after_init, 694 .phys_mem_access_prot = pci_phys_mem_access_prot, 695 #endif 696 #if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64) 697 .cpu_die = pmac_cpu_die, 698 #endif 699 }; 700