1 /* 2 * Powermac setup and early boot code plus other random bits. 3 * 4 * PowerPC version 5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 6 * 7 * Adapted for Power Macintosh by Paul Mackerras 8 * Copyright (C) 1996 Paul Mackerras (paulus@samba.org) 9 * 10 * Derived from "arch/alpha/kernel/setup.c" 11 * Copyright (C) 1995 Linus Torvalds 12 * 13 * Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org) 14 * 15 * This program is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License 17 * as published by the Free Software Foundation; either version 18 * 2 of the License, or (at your option) any later version. 19 * 20 */ 21 22 /* 23 * bootup setup stuff.. 24 */ 25 26 #include <linux/init.h> 27 #include <linux/errno.h> 28 #include <linux/sched.h> 29 #include <linux/kernel.h> 30 #include <linux/mm.h> 31 #include <linux/stddef.h> 32 #include <linux/unistd.h> 33 #include <linux/ptrace.h> 34 #include <linux/slab.h> 35 #include <linux/user.h> 36 #include <linux/a.out.h> 37 #include <linux/tty.h> 38 #include <linux/string.h> 39 #include <linux/delay.h> 40 #include <linux/ioport.h> 41 #include <linux/major.h> 42 #include <linux/initrd.h> 43 #include <linux/vt_kern.h> 44 #include <linux/console.h> 45 #include <linux/pci.h> 46 #include <linux/adb.h> 47 #include <linux/cuda.h> 48 #include <linux/pmu.h> 49 #include <linux/irq.h> 50 #include <linux/seq_file.h> 51 #include <linux/root_dev.h> 52 #include <linux/bitops.h> 53 #include <linux/suspend.h> 54 55 #include <asm/reg.h> 56 #include <asm/sections.h> 57 #include <asm/prom.h> 58 #include <asm/system.h> 59 #include <asm/pgtable.h> 60 #include <asm/io.h> 61 #include <asm/kexec.h> 62 #include <asm/pci-bridge.h> 63 #include <asm/ohare.h> 64 #include <asm/mediabay.h> 65 #include <asm/machdep.h> 66 #include <asm/dma.h> 67 #include <asm/cputable.h> 68 #include <asm/btext.h> 69 #include <asm/pmac_feature.h> 70 #include <asm/time.h> 71 #include <asm/of_device.h> 72 #include <asm/of_platform.h> 73 #include <asm/mmu_context.h> 74 #include <asm/iommu.h> 75 #include <asm/smu.h> 76 #include <asm/pmc.h> 77 #include <asm/lmb.h> 78 #include <asm/udbg.h> 79 80 #include "pmac.h" 81 82 #undef SHOW_GATWICK_IRQS 83 84 int ppc_override_l2cr = 0; 85 int ppc_override_l2cr_value; 86 int has_l2cache = 0; 87 88 int pmac_newworld; 89 90 static int current_root_goodness = -1; 91 92 extern struct machdep_calls pmac_md; 93 94 #define DEFAULT_ROOT_DEVICE Root_SDA1 /* sda1 - slightly silly choice */ 95 96 #ifdef CONFIG_PPC64 97 #include <asm/udbg.h> 98 int sccdbg; 99 #endif 100 101 extern void zs_kgdb_hook(int tty_num); 102 103 sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN; 104 EXPORT_SYMBOL(sys_ctrler); 105 106 #ifdef CONFIG_PMAC_SMU 107 unsigned long smu_cmdbuf_abs; 108 EXPORT_SYMBOL(smu_cmdbuf_abs); 109 #endif 110 111 #ifdef CONFIG_SMP 112 extern struct smp_ops_t psurge_smp_ops; 113 extern struct smp_ops_t core99_smp_ops; 114 #endif /* CONFIG_SMP */ 115 116 static void pmac_show_cpuinfo(struct seq_file *m) 117 { 118 struct device_node *np; 119 const char *pp; 120 int plen; 121 int mbmodel; 122 unsigned int mbflags; 123 char* mbname; 124 125 mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, 126 PMAC_MB_INFO_MODEL, 0); 127 mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, 128 PMAC_MB_INFO_FLAGS, 0); 129 if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME, 130 (long) &mbname) != 0) 131 mbname = "Unknown"; 132 133 /* find motherboard type */ 134 seq_printf(m, "machine\t\t: "); 135 np = of_find_node_by_path("/"); 136 if (np != NULL) { 137 pp = of_get_property(np, "model", NULL); 138 if (pp != NULL) 139 seq_printf(m, "%s\n", pp); 140 else 141 seq_printf(m, "PowerMac\n"); 142 pp = of_get_property(np, "compatible", &plen); 143 if (pp != NULL) { 144 seq_printf(m, "motherboard\t:"); 145 while (plen > 0) { 146 int l = strlen(pp) + 1; 147 seq_printf(m, " %s", pp); 148 plen -= l; 149 pp += l; 150 } 151 seq_printf(m, "\n"); 152 } 153 of_node_put(np); 154 } else 155 seq_printf(m, "PowerMac\n"); 156 157 /* print parsed model */ 158 seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname); 159 seq_printf(m, "pmac flags\t: %08x\n", mbflags); 160 161 /* find l2 cache info */ 162 np = of_find_node_by_name(NULL, "l2-cache"); 163 if (np == NULL) 164 np = of_find_node_by_type(NULL, "cache"); 165 if (np != NULL) { 166 const unsigned int *ic = 167 of_get_property(np, "i-cache-size", NULL); 168 const unsigned int *dc = 169 of_get_property(np, "d-cache-size", NULL); 170 seq_printf(m, "L2 cache\t:"); 171 has_l2cache = 1; 172 if (of_get_property(np, "cache-unified", NULL) != 0 && dc) { 173 seq_printf(m, " %dK unified", *dc / 1024); 174 } else { 175 if (ic) 176 seq_printf(m, " %dK instruction", *ic / 1024); 177 if (dc) 178 seq_printf(m, "%s %dK data", 179 (ic? " +": ""), *dc / 1024); 180 } 181 pp = of_get_property(np, "ram-type", NULL); 182 if (pp) 183 seq_printf(m, " %s", pp); 184 seq_printf(m, "\n"); 185 of_node_put(np); 186 } 187 188 /* Indicate newworld/oldworld */ 189 seq_printf(m, "pmac-generation\t: %s\n", 190 pmac_newworld ? "NewWorld" : "OldWorld"); 191 } 192 193 #ifndef CONFIG_ADB_CUDA 194 int find_via_cuda(void) 195 { 196 struct device_node *dn = of_find_node_by_name(NULL, "via-cuda"); 197 198 if (!dn) 199 return 0; 200 of_node_put(dn); 201 printk("WARNING ! Your machine is CUDA-based but your kernel\n"); 202 printk(" wasn't compiled with CONFIG_ADB_CUDA option !\n"); 203 return 0; 204 } 205 #endif 206 207 #ifndef CONFIG_ADB_PMU 208 int find_via_pmu(void) 209 { 210 struct device_node *dn = of_find_node_by_name(NULL, "via-pmu"); 211 212 if (!dn) 213 return 0; 214 of_node_put(dn); 215 printk("WARNING ! Your machine is PMU-based but your kernel\n"); 216 printk(" wasn't compiled with CONFIG_ADB_PMU option !\n"); 217 return 0; 218 } 219 #endif 220 221 #ifndef CONFIG_PMAC_SMU 222 int smu_init(void) 223 { 224 /* should check and warn if SMU is present */ 225 return 0; 226 } 227 #endif 228 229 #ifdef CONFIG_PPC32 230 static volatile u32 *sysctrl_regs; 231 232 static void __init ohare_init(void) 233 { 234 struct device_node *dn; 235 236 /* this area has the CPU identification register 237 and some registers used by smp boards */ 238 sysctrl_regs = (volatile u32 *) ioremap(0xf8000000, 0x1000); 239 240 /* 241 * Turn on the L2 cache. 242 * We assume that we have a PSX memory controller iff 243 * we have an ohare I/O controller. 244 */ 245 dn = of_find_node_by_name(NULL, "ohare"); 246 if (dn) { 247 of_node_put(dn); 248 if (((sysctrl_regs[2] >> 24) & 0xf) >= 3) { 249 if (sysctrl_regs[4] & 0x10) 250 sysctrl_regs[4] |= 0x04000020; 251 else 252 sysctrl_regs[4] |= 0x04000000; 253 if(has_l2cache) 254 printk(KERN_INFO "Level 2 cache enabled\n"); 255 } 256 } 257 } 258 259 static void __init l2cr_init(void) 260 { 261 /* Checks "l2cr-value" property in the registry */ 262 if (cpu_has_feature(CPU_FTR_L2CR)) { 263 struct device_node *np = of_find_node_by_name(NULL, "cpus"); 264 if (np == 0) 265 np = of_find_node_by_type(NULL, "cpu"); 266 if (np != 0) { 267 const unsigned int *l2cr = 268 of_get_property(np, "l2cr-value", NULL); 269 if (l2cr != 0) { 270 ppc_override_l2cr = 1; 271 ppc_override_l2cr_value = *l2cr; 272 _set_L2CR(0); 273 _set_L2CR(ppc_override_l2cr_value); 274 } 275 of_node_put(np); 276 } 277 } 278 279 if (ppc_override_l2cr) 280 printk(KERN_INFO "L2CR overridden (0x%x), " 281 "backside cache is %s\n", 282 ppc_override_l2cr_value, 283 (ppc_override_l2cr_value & 0x80000000) 284 ? "enabled" : "disabled"); 285 } 286 #endif 287 288 static void __init pmac_setup_arch(void) 289 { 290 struct device_node *cpu, *ic; 291 const int *fp; 292 unsigned long pvr; 293 294 pvr = PVR_VER(mfspr(SPRN_PVR)); 295 296 /* Set loops_per_jiffy to a half-way reasonable value, 297 for use until calibrate_delay gets called. */ 298 loops_per_jiffy = 50000000 / HZ; 299 cpu = of_find_node_by_type(NULL, "cpu"); 300 if (cpu != NULL) { 301 fp = of_get_property(cpu, "clock-frequency", NULL); 302 if (fp != NULL) { 303 if (pvr >= 0x30 && pvr < 0x80) 304 /* PPC970 etc. */ 305 loops_per_jiffy = *fp / (3 * HZ); 306 else if (pvr == 4 || pvr >= 8) 307 /* 604, G3, G4 etc. */ 308 loops_per_jiffy = *fp / HZ; 309 else 310 /* 601, 603, etc. */ 311 loops_per_jiffy = *fp / (2 * HZ); 312 } 313 of_node_put(cpu); 314 } 315 316 /* See if newworld or oldworld */ 317 for (ic = NULL; (ic = of_find_all_nodes(ic)) != NULL; ) 318 if (of_get_property(ic, "interrupt-controller", NULL)) 319 break; 320 if (ic) { 321 pmac_newworld = 1; 322 of_node_put(ic); 323 } 324 325 /* Lookup PCI hosts */ 326 pmac_pci_init(); 327 328 #ifdef CONFIG_PPC32 329 ohare_init(); 330 l2cr_init(); 331 #endif /* CONFIG_PPC32 */ 332 333 #ifdef CONFIG_KGDB 334 zs_kgdb_hook(0); 335 #endif 336 337 find_via_cuda(); 338 find_via_pmu(); 339 smu_init(); 340 341 #if defined(CONFIG_NVRAM) || defined(CONFIG_PPC64) 342 pmac_nvram_init(); 343 #endif 344 345 #ifdef CONFIG_PPC32 346 #ifdef CONFIG_BLK_DEV_INITRD 347 if (initrd_start) 348 ROOT_DEV = Root_RAM0; 349 else 350 #endif 351 ROOT_DEV = DEFAULT_ROOT_DEVICE; 352 #endif 353 354 #ifdef CONFIG_SMP 355 /* Check for Core99 */ 356 ic = of_find_node_by_name(NULL, "uni-n"); 357 if (!ic) 358 ic = of_find_node_by_name(NULL, "u3"); 359 if (!ic) 360 ic = of_find_node_by_name(NULL, "u4"); 361 if (ic) { 362 of_node_put(ic); 363 smp_ops = &core99_smp_ops; 364 } 365 #ifdef CONFIG_PPC32 366 else { 367 /* 368 * We have to set bits in cpu_possible_map here since the 369 * secondary CPU(s) aren't in the device tree, and 370 * setup_per_cpu_areas only allocates per-cpu data for 371 * CPUs in the cpu_possible_map. 372 */ 373 int cpu; 374 375 for (cpu = 1; cpu < 4 && cpu < NR_CPUS; ++cpu) 376 cpu_set(cpu, cpu_possible_map); 377 smp_ops = &psurge_smp_ops; 378 } 379 #endif 380 #endif /* CONFIG_SMP */ 381 382 #ifdef CONFIG_ADB 383 if (strstr(cmd_line, "adb_sync")) { 384 extern int __adb_probe_sync; 385 __adb_probe_sync = 1; 386 } 387 #endif /* CONFIG_ADB */ 388 } 389 390 char *bootpath; 391 char *bootdevice; 392 void *boot_host; 393 int boot_target; 394 int boot_part; 395 static dev_t boot_dev; 396 397 #ifdef CONFIG_SCSI 398 void note_scsi_host(struct device_node *node, void *host) 399 { 400 int l; 401 char *p; 402 403 l = strlen(node->full_name); 404 if (bootpath != NULL && bootdevice != NULL 405 && strncmp(node->full_name, bootdevice, l) == 0 406 && (bootdevice[l] == '/' || bootdevice[l] == 0)) { 407 boot_host = host; 408 /* 409 * There's a bug in OF 1.0.5. (Why am I not surprised.) 410 * If you pass a path like scsi/sd@1:0 to canon, it returns 411 * something like /bandit@F2000000/gc@10/53c94@10000/sd@0,0 412 * That is, the scsi target number doesn't get preserved. 413 * So we pick the target number out of bootpath and use that. 414 */ 415 p = strstr(bootpath, "/sd@"); 416 if (p != NULL) { 417 p += 4; 418 boot_target = simple_strtoul(p, NULL, 10); 419 p = strchr(p, ':'); 420 if (p != NULL) 421 boot_part = simple_strtoul(p + 1, NULL, 10); 422 } 423 } 424 } 425 EXPORT_SYMBOL(note_scsi_host); 426 #endif 427 428 #if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC) 429 static dev_t __init find_ide_boot(void) 430 { 431 char *p; 432 int n; 433 dev_t __init pmac_find_ide_boot(char *bootdevice, int n); 434 435 if (bootdevice == NULL) 436 return 0; 437 p = strrchr(bootdevice, '/'); 438 if (p == NULL) 439 return 0; 440 n = p - bootdevice; 441 442 return pmac_find_ide_boot(bootdevice, n); 443 } 444 #endif /* CONFIG_BLK_DEV_IDE && CONFIG_BLK_DEV_IDE_PMAC */ 445 446 static void __init find_boot_device(void) 447 { 448 #if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC) 449 boot_dev = find_ide_boot(); 450 #endif 451 } 452 453 static int initializing = 1; 454 455 static int pmac_late_init(void) 456 { 457 if (!machine_is(powermac)) 458 return -ENODEV; 459 460 initializing = 0; 461 /* this is udbg (which is __init) and we can later use it during 462 * cpu hotplug (in smp_core99_kick_cpu) */ 463 ppc_md.progress = NULL; 464 return 0; 465 } 466 467 late_initcall(pmac_late_init); 468 469 /* can't be __init - can be called whenever a disk is first accessed */ 470 void note_bootable_part(dev_t dev, int part, int goodness) 471 { 472 static int found_boot = 0; 473 char *p; 474 475 if (!initializing) 476 return; 477 if ((goodness <= current_root_goodness) && 478 ROOT_DEV != DEFAULT_ROOT_DEVICE) 479 return; 480 p = strstr(boot_command_line, "root="); 481 if (p != NULL && (p == boot_command_line || p[-1] == ' ')) 482 return; 483 484 if (!found_boot) { 485 find_boot_device(); 486 found_boot = 1; 487 } 488 if (!boot_dev || dev == boot_dev) { 489 ROOT_DEV = dev + part; 490 boot_dev = 0; 491 current_root_goodness = goodness; 492 } 493 } 494 495 #ifdef CONFIG_ADB_CUDA 496 static void cuda_restart(void) 497 { 498 struct adb_request req; 499 500 cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_RESET_SYSTEM); 501 for (;;) 502 cuda_poll(); 503 } 504 505 static void cuda_shutdown(void) 506 { 507 struct adb_request req; 508 509 cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_POWERDOWN); 510 for (;;) 511 cuda_poll(); 512 } 513 514 #else 515 #define cuda_restart() 516 #define cuda_shutdown() 517 #endif 518 519 #ifndef CONFIG_ADB_PMU 520 #define pmu_restart() 521 #define pmu_shutdown() 522 #endif 523 524 #ifndef CONFIG_PMAC_SMU 525 #define smu_restart() 526 #define smu_shutdown() 527 #endif 528 529 static void pmac_restart(char *cmd) 530 { 531 switch (sys_ctrler) { 532 case SYS_CTRLER_CUDA: 533 cuda_restart(); 534 break; 535 case SYS_CTRLER_PMU: 536 pmu_restart(); 537 break; 538 case SYS_CTRLER_SMU: 539 smu_restart(); 540 break; 541 default: ; 542 } 543 } 544 545 static void pmac_power_off(void) 546 { 547 switch (sys_ctrler) { 548 case SYS_CTRLER_CUDA: 549 cuda_shutdown(); 550 break; 551 case SYS_CTRLER_PMU: 552 pmu_shutdown(); 553 break; 554 case SYS_CTRLER_SMU: 555 smu_shutdown(); 556 break; 557 default: ; 558 } 559 } 560 561 static void 562 pmac_halt(void) 563 { 564 pmac_power_off(); 565 } 566 567 /* 568 * Early initialization. 569 */ 570 static void __init pmac_init_early(void) 571 { 572 /* Enable early btext debug if requested */ 573 if (strstr(cmd_line, "btextdbg")) { 574 udbg_adb_init_early(); 575 register_early_udbg_console(); 576 } 577 578 /* Probe motherboard chipset */ 579 pmac_feature_init(); 580 581 /* Initialize debug stuff */ 582 udbg_scc_init(!!strstr(cmd_line, "sccdbg")); 583 udbg_adb_init(!!strstr(cmd_line, "btextdbg")); 584 585 #ifdef CONFIG_PPC64 586 iommu_init_early_dart(); 587 #endif 588 } 589 590 static int __init pmac_declare_of_platform_devices(void) 591 { 592 struct device_node *np; 593 594 if (machine_is(chrp)) 595 return -1; 596 597 if (!machine_is(powermac)) 598 return 0; 599 600 np = of_find_node_by_name(NULL, "valkyrie"); 601 if (np) 602 of_platform_device_create(np, "valkyrie", NULL); 603 np = of_find_node_by_name(NULL, "platinum"); 604 if (np) 605 of_platform_device_create(np, "platinum", NULL); 606 np = of_find_node_by_type(NULL, "smu"); 607 if (np) { 608 of_platform_device_create(np, "smu", NULL); 609 of_node_put(np); 610 } 611 612 return 0; 613 } 614 615 device_initcall(pmac_declare_of_platform_devices); 616 617 /* 618 * Called very early, MMU is off, device-tree isn't unflattened 619 */ 620 static int __init pmac_probe(void) 621 { 622 unsigned long root = of_get_flat_dt_root(); 623 624 if (!of_flat_dt_is_compatible(root, "Power Macintosh") && 625 !of_flat_dt_is_compatible(root, "MacRISC")) 626 return 0; 627 628 #ifdef CONFIG_PPC64 629 /* 630 * On U3, the DART (iommu) must be allocated now since it 631 * has an impact on htab_initialize (due to the large page it 632 * occupies having to be broken up so the DART itself is not 633 * part of the cacheable linar mapping 634 */ 635 alloc_dart_table(); 636 637 hpte_init_native(); 638 #endif 639 640 #ifdef CONFIG_PPC32 641 /* isa_io_base gets set in pmac_pci_init */ 642 ISA_DMA_THRESHOLD = ~0L; 643 DMA_MODE_READ = 1; 644 DMA_MODE_WRITE = 2; 645 646 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) 647 #ifdef CONFIG_BLK_DEV_IDE_PMAC 648 ppc_ide_md.ide_init_hwif = pmac_ide_init_hwif_ports; 649 ppc_ide_md.default_io_base = pmac_ide_get_base; 650 #endif /* CONFIG_BLK_DEV_IDE_PMAC */ 651 #endif /* defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) */ 652 653 #endif /* CONFIG_PPC32 */ 654 655 #ifdef CONFIG_PMAC_SMU 656 /* 657 * SMU based G5s need some memory below 2Gb, at least the current 658 * driver needs that. We have to allocate it now. We allocate 4k 659 * (1 small page) for now. 660 */ 661 smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL); 662 #endif /* CONFIG_PMAC_SMU */ 663 664 return 1; 665 } 666 667 #ifdef CONFIG_PPC64 668 /* Move that to pci.c */ 669 static int pmac_pci_probe_mode(struct pci_bus *bus) 670 { 671 struct device_node *node = bus->sysdata; 672 673 /* We need to use normal PCI probing for the AGP bus, 674 * since the device for the AGP bridge isn't in the tree. 675 */ 676 if (bus->self == NULL && (of_device_is_compatible(node, "u3-agp") || 677 of_device_is_compatible(node, "u4-pcie"))) 678 return PCI_PROBE_NORMAL; 679 return PCI_PROBE_DEVTREE; 680 } 681 682 #ifdef CONFIG_HOTPLUG_CPU 683 /* access per cpu vars from generic smp.c */ 684 DECLARE_PER_CPU(int, cpu_state); 685 686 static void pmac_cpu_die(void) 687 { 688 /* 689 * turn off as much as possible, we'll be 690 * kicked out as this will only be invoked 691 * on core99 platforms for now ... 692 */ 693 694 printk(KERN_INFO "CPU#%d offline\n", smp_processor_id()); 695 __get_cpu_var(cpu_state) = CPU_DEAD; 696 smp_wmb(); 697 698 /* 699 * during the path that leads here preemption is disabled, 700 * reenable it now so that when coming up preempt count is 701 * zero correctly 702 */ 703 preempt_enable(); 704 705 /* 706 * hard-disable interrupts for the non-NAP case, the NAP code 707 * needs to re-enable interrupts (but soft-disables them) 708 */ 709 hard_irq_disable(); 710 711 while (1) { 712 /* let's not take timer interrupts too often ... */ 713 set_dec(0x7fffffff); 714 715 /* should always be true at this point */ 716 if (cpu_has_feature(CPU_FTR_CAN_NAP)) 717 power4_cpu_offline_powersave(); 718 else { 719 HMT_low(); 720 HMT_very_low(); 721 } 722 } 723 } 724 #endif /* CONFIG_HOTPLUG_CPU */ 725 726 #endif /* CONFIG_PPC64 */ 727 728 define_machine(powermac) { 729 .name = "PowerMac", 730 .probe = pmac_probe, 731 .setup_arch = pmac_setup_arch, 732 .init_early = pmac_init_early, 733 .show_cpuinfo = pmac_show_cpuinfo, 734 .init_IRQ = pmac_pic_init, 735 .get_irq = NULL, /* changed later */ 736 .pci_irq_fixup = pmac_pci_irq_fixup, 737 .restart = pmac_restart, 738 .power_off = pmac_power_off, 739 .halt = pmac_halt, 740 .time_init = pmac_time_init, 741 .get_boot_time = pmac_get_boot_time, 742 .set_rtc_time = pmac_set_rtc_time, 743 .get_rtc_time = pmac_get_rtc_time, 744 .calibrate_decr = pmac_calibrate_decr, 745 .feature_call = pmac_do_feature_call, 746 .progress = udbg_progress, 747 #ifdef CONFIG_PPC64 748 .pci_probe_mode = pmac_pci_probe_mode, 749 .power_save = power4_idle, 750 .enable_pmcs = power4_enable_pmcs, 751 #ifdef CONFIG_KEXEC 752 .machine_kexec = default_machine_kexec, 753 .machine_kexec_prepare = default_machine_kexec_prepare, 754 .machine_crash_shutdown = default_machine_crash_shutdown, 755 #endif 756 #endif /* CONFIG_PPC64 */ 757 #ifdef CONFIG_PPC32 758 .pcibios_enable_device_hook = pmac_pci_enable_device_hook, 759 .pcibios_after_init = pmac_pcibios_after_init, 760 .phys_mem_access_prot = pci_phys_mem_access_prot, 761 #endif 762 #if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64) 763 .cpu_die = pmac_cpu_die, 764 #endif 765 }; 766