1 /*
2  * arch/powerpc/platforms/powermac/low_i2c.c
3  *
4  *  Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org)
5  *
6  *  This program is free software; you can redistribute it and/or
7  *  modify it under the terms of the GNU General Public License
8  *  as published by the Free Software Foundation; either version
9  *  2 of the License, or (at your option) any later version.
10  *
11  * The linux i2c layer isn't completely suitable for our needs for various
12  * reasons ranging from too late initialisation to semantics not perfectly
13  * matching some requirements of the apple platform functions etc...
14  *
15  * This file thus provides a simple low level unified i2c interface for
16  * powermac that covers the various types of i2c busses used in Apple machines.
17  * For now, keywest, PMU and SMU, though we could add Cuda, or other bit
18  * banging busses found on older chipsets in earlier machines if we ever need
19  * one of them.
20  *
21  * The drivers in this file are synchronous/blocking. In addition, the
22  * keywest one is fairly slow due to the use of msleep instead of interrupts
23  * as the interrupt is currently used by i2c-keywest. In the long run, we
24  * might want to get rid of those high-level interfaces to linux i2c layer
25  * either completely (converting all drivers) or replacing them all with a
26  * single stub driver on top of this one. Once done, the interrupt will be
27  * available for our use.
28  */
29 
30 #undef DEBUG
31 #undef DEBUG_LOW
32 
33 #include <linux/types.h>
34 #include <linux/sched.h>
35 #include <linux/init.h>
36 #include <linux/export.h>
37 #include <linux/adb.h>
38 #include <linux/pmu.h>
39 #include <linux/delay.h>
40 #include <linux/completion.h>
41 #include <linux/platform_device.h>
42 #include <linux/interrupt.h>
43 #include <linux/timer.h>
44 #include <linux/mutex.h>
45 #include <linux/i2c.h>
46 #include <linux/slab.h>
47 #include <asm/keylargo.h>
48 #include <asm/uninorth.h>
49 #include <asm/io.h>
50 #include <asm/prom.h>
51 #include <asm/machdep.h>
52 #include <asm/smu.h>
53 #include <asm/pmac_pfunc.h>
54 #include <asm/pmac_low_i2c.h>
55 
56 #ifdef DEBUG
57 #define DBG(x...) do {\
58 		printk(KERN_DEBUG "low_i2c:" x);	\
59 	} while(0)
60 #else
61 #define DBG(x...)
62 #endif
63 
64 #ifdef DEBUG_LOW
65 #define DBG_LOW(x...) do {\
66 		printk(KERN_DEBUG "low_i2c:" x);	\
67 	} while(0)
68 #else
69 #define DBG_LOW(x...)
70 #endif
71 
72 
73 static int pmac_i2c_force_poll = 1;
74 
75 /*
76  * A bus structure. Each bus in the system has such a structure associated.
77  */
78 struct pmac_i2c_bus
79 {
80 	struct list_head	link;
81 	struct device_node	*controller;
82 	struct device_node	*busnode;
83 	int			type;
84 	int			flags;
85 	struct i2c_adapter	adapter;
86 	void			*hostdata;
87 	int			channel;	/* some hosts have multiple */
88 	int			mode;		/* current mode */
89 	struct mutex		mutex;
90 	int			opened;
91 	int			polled;		/* open mode */
92 	struct platform_device	*platform_dev;
93 	struct lock_class_key   lock_key;
94 
95 	/* ops */
96 	int (*open)(struct pmac_i2c_bus *bus);
97 	void (*close)(struct pmac_i2c_bus *bus);
98 	int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
99 		    u32 subaddr, u8 *data, int len);
100 };
101 
102 static LIST_HEAD(pmac_i2c_busses);
103 
104 /*
105  * Keywest implementation
106  */
107 
108 struct pmac_i2c_host_kw
109 {
110 	struct mutex		mutex;		/* Access mutex for use by
111 						 * i2c-keywest */
112 	void __iomem		*base;		/* register base address */
113 	int			bsteps;		/* register stepping */
114 	int			speed;		/* speed */
115 	int			irq;
116 	u8			*data;
117 	unsigned		len;
118 	int			state;
119 	int			rw;
120 	int			polled;
121 	int			result;
122 	struct completion	complete;
123 	spinlock_t		lock;
124 	struct timer_list	timeout_timer;
125 };
126 
127 /* Register indices */
128 typedef enum {
129 	reg_mode = 0,
130 	reg_control,
131 	reg_status,
132 	reg_isr,
133 	reg_ier,
134 	reg_addr,
135 	reg_subaddr,
136 	reg_data
137 } reg_t;
138 
139 /* The Tumbler audio equalizer can be really slow sometimes */
140 #define KW_POLL_TIMEOUT		(2*HZ)
141 
142 /* Mode register */
143 #define KW_I2C_MODE_100KHZ	0x00
144 #define KW_I2C_MODE_50KHZ	0x01
145 #define KW_I2C_MODE_25KHZ	0x02
146 #define KW_I2C_MODE_DUMB	0x00
147 #define KW_I2C_MODE_STANDARD	0x04
148 #define KW_I2C_MODE_STANDARDSUB	0x08
149 #define KW_I2C_MODE_COMBINED	0x0C
150 #define KW_I2C_MODE_MODE_MASK	0x0C
151 #define KW_I2C_MODE_CHAN_MASK	0xF0
152 
153 /* Control register */
154 #define KW_I2C_CTL_AAK		0x01
155 #define KW_I2C_CTL_XADDR	0x02
156 #define KW_I2C_CTL_STOP		0x04
157 #define KW_I2C_CTL_START	0x08
158 
159 /* Status register */
160 #define KW_I2C_STAT_BUSY	0x01
161 #define KW_I2C_STAT_LAST_AAK	0x02
162 #define KW_I2C_STAT_LAST_RW	0x04
163 #define KW_I2C_STAT_SDA		0x08
164 #define KW_I2C_STAT_SCL		0x10
165 
166 /* IER & ISR registers */
167 #define KW_I2C_IRQ_DATA		0x01
168 #define KW_I2C_IRQ_ADDR		0x02
169 #define KW_I2C_IRQ_STOP		0x04
170 #define KW_I2C_IRQ_START	0x08
171 #define KW_I2C_IRQ_MASK		0x0F
172 
173 /* State machine states */
174 enum {
175 	state_idle,
176 	state_addr,
177 	state_read,
178 	state_write,
179 	state_stop,
180 	state_dead
181 };
182 
183 #define WRONG_STATE(name) do {\
184 		printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \
185 		       "(isr: %02x)\n",	\
186 		       name, __kw_state_names[host->state], isr); \
187 	} while(0)
188 
189 static const char *__kw_state_names[] = {
190 	"state_idle",
191 	"state_addr",
192 	"state_read",
193 	"state_write",
194 	"state_stop",
195 	"state_dead"
196 };
197 
198 static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg)
199 {
200 	return readb(host->base + (((unsigned int)reg) << host->bsteps));
201 }
202 
203 static inline void __kw_write_reg(struct pmac_i2c_host_kw *host,
204 				  reg_t reg, u8 val)
205 {
206 	writeb(val, host->base + (((unsigned)reg) << host->bsteps));
207 	(void)__kw_read_reg(host, reg_subaddr);
208 }
209 
210 #define kw_write_reg(reg, val)	__kw_write_reg(host, reg, val)
211 #define kw_read_reg(reg)	__kw_read_reg(host, reg)
212 
213 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
214 {
215 	int i, j;
216 	u8 isr;
217 
218 	for (i = 0; i < 1000; i++) {
219 		isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
220 		if (isr != 0)
221 			return isr;
222 
223 		/* This code is used with the timebase frozen, we cannot rely
224 		 * on udelay nor schedule when in polled mode !
225 		 * For now, just use a bogus loop....
226 		 */
227 		if (host->polled) {
228 			for (j = 1; j < 100000; j++)
229 				mb();
230 		} else
231 			msleep(1);
232 	}
233 	return isr;
234 }
235 
236 static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result)
237 {
238 	kw_write_reg(reg_control, KW_I2C_CTL_STOP);
239 	host->state = state_stop;
240 	host->result = result;
241 }
242 
243 
244 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
245 {
246 	u8 ack;
247 
248 	DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
249 		__kw_state_names[host->state], isr);
250 
251 	if (host->state == state_idle) {
252 		printk(KERN_WARNING "low_i2c: Keywest got an out of state"
253 		       " interrupt, ignoring\n");
254 		kw_write_reg(reg_isr, isr);
255 		return;
256 	}
257 
258 	if (isr == 0) {
259 		printk(KERN_WARNING "low_i2c: Timeout in i2c transfer"
260 		       " on keywest !\n");
261 		if (host->state != state_stop) {
262 			kw_i2c_do_stop(host, -EIO);
263 			return;
264 		}
265 		ack = kw_read_reg(reg_status);
266 		if (ack & KW_I2C_STAT_BUSY)
267 			kw_write_reg(reg_status, 0);
268 		host->state = state_idle;
269 		kw_write_reg(reg_ier, 0x00);
270 		if (!host->polled)
271 			complete(&host->complete);
272 		return;
273 	}
274 
275 	if (isr & KW_I2C_IRQ_ADDR) {
276 		ack = kw_read_reg(reg_status);
277 		if (host->state != state_addr) {
278 			WRONG_STATE("KW_I2C_IRQ_ADDR");
279 			kw_i2c_do_stop(host, -EIO);
280 		}
281 		if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
282 			host->result = -ENXIO;
283 			host->state = state_stop;
284 			DBG_LOW("KW: NAK on address\n");
285 		} else {
286 			if (host->len == 0)
287 				kw_i2c_do_stop(host, 0);
288 			else if (host->rw) {
289 				host->state = state_read;
290 				if (host->len > 1)
291 					kw_write_reg(reg_control,
292 						     KW_I2C_CTL_AAK);
293 			} else {
294 				host->state = state_write;
295 				kw_write_reg(reg_data, *(host->data++));
296 				host->len--;
297 			}
298 		}
299 		kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
300 	}
301 
302 	if (isr & KW_I2C_IRQ_DATA) {
303 		if (host->state == state_read) {
304 			*(host->data++) = kw_read_reg(reg_data);
305 			host->len--;
306 			kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
307 			if (host->len == 0)
308 				host->state = state_stop;
309 			else if (host->len == 1)
310 				kw_write_reg(reg_control, 0);
311 		} else if (host->state == state_write) {
312 			ack = kw_read_reg(reg_status);
313 			if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
314 				DBG_LOW("KW: nack on data write\n");
315 				host->result = -EFBIG;
316 				host->state = state_stop;
317 			} else if (host->len) {
318 				kw_write_reg(reg_data, *(host->data++));
319 				host->len--;
320 			} else
321 				kw_i2c_do_stop(host, 0);
322 		} else {
323 			WRONG_STATE("KW_I2C_IRQ_DATA");
324 			if (host->state != state_stop)
325 				kw_i2c_do_stop(host, -EIO);
326 		}
327 		kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
328 	}
329 
330 	if (isr & KW_I2C_IRQ_STOP) {
331 		kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
332 		if (host->state != state_stop) {
333 			WRONG_STATE("KW_I2C_IRQ_STOP");
334 			host->result = -EIO;
335 		}
336 		host->state = state_idle;
337 		if (!host->polled)
338 			complete(&host->complete);
339 	}
340 
341 	/* Below should only happen in manual mode which we don't use ... */
342 	if (isr & KW_I2C_IRQ_START)
343 		kw_write_reg(reg_isr, KW_I2C_IRQ_START);
344 
345 }
346 
347 /* Interrupt handler */
348 static irqreturn_t kw_i2c_irq(int irq, void *dev_id)
349 {
350 	struct pmac_i2c_host_kw *host = dev_id;
351 	unsigned long flags;
352 
353 	spin_lock_irqsave(&host->lock, flags);
354 	del_timer(&host->timeout_timer);
355 	kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
356 	if (host->state != state_idle) {
357 		host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
358 		add_timer(&host->timeout_timer);
359 	}
360 	spin_unlock_irqrestore(&host->lock, flags);
361 	return IRQ_HANDLED;
362 }
363 
364 static void kw_i2c_timeout(struct timer_list *t)
365 {
366 	struct pmac_i2c_host_kw *host = from_timer(host, t, timeout_timer);
367 	unsigned long flags;
368 
369 	spin_lock_irqsave(&host->lock, flags);
370 
371 	/*
372 	 * If the timer is pending, that means we raced with the
373 	 * irq, in which case we just return
374 	 */
375 	if (timer_pending(&host->timeout_timer))
376 		goto skip;
377 
378 	kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
379 	if (host->state != state_idle) {
380 		host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
381 		add_timer(&host->timeout_timer);
382 	}
383  skip:
384 	spin_unlock_irqrestore(&host->lock, flags);
385 }
386 
387 static int kw_i2c_open(struct pmac_i2c_bus *bus)
388 {
389 	struct pmac_i2c_host_kw *host = bus->hostdata;
390 	mutex_lock(&host->mutex);
391 	return 0;
392 }
393 
394 static void kw_i2c_close(struct pmac_i2c_bus *bus)
395 {
396 	struct pmac_i2c_host_kw *host = bus->hostdata;
397 	mutex_unlock(&host->mutex);
398 }
399 
400 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
401 		       u32 subaddr, u8 *data, int len)
402 {
403 	struct pmac_i2c_host_kw *host = bus->hostdata;
404 	u8 mode_reg = host->speed;
405 	int use_irq = host->irq && !bus->polled;
406 
407 	/* Setup mode & subaddress if any */
408 	switch(bus->mode) {
409 	case pmac_i2c_mode_dumb:
410 		return -EINVAL;
411 	case pmac_i2c_mode_std:
412 		mode_reg |= KW_I2C_MODE_STANDARD;
413 		if (subsize != 0)
414 			return -EINVAL;
415 		break;
416 	case pmac_i2c_mode_stdsub:
417 		mode_reg |= KW_I2C_MODE_STANDARDSUB;
418 		if (subsize != 1)
419 			return -EINVAL;
420 		break;
421 	case pmac_i2c_mode_combined:
422 		mode_reg |= KW_I2C_MODE_COMBINED;
423 		if (subsize != 1)
424 			return -EINVAL;
425 		break;
426 	}
427 
428 	/* Setup channel & clear pending irqs */
429 	kw_write_reg(reg_isr, kw_read_reg(reg_isr));
430 	kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
431 	kw_write_reg(reg_status, 0);
432 
433 	/* Set up address and r/w bit, strip possible stale bus number from
434 	 * address top bits
435 	 */
436 	kw_write_reg(reg_addr, addrdir & 0xff);
437 
438 	/* Set up the sub address */
439 	if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
440 	    || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
441 		kw_write_reg(reg_subaddr, subaddr);
442 
443 	/* Prepare for async operations */
444 	host->data = data;
445 	host->len = len;
446 	host->state = state_addr;
447 	host->result = 0;
448 	host->rw = (addrdir & 1);
449 	host->polled = bus->polled;
450 
451 	/* Enable interrupt if not using polled mode and interrupt is
452 	 * available
453 	 */
454 	if (use_irq) {
455 		/* Clear completion */
456 		reinit_completion(&host->complete);
457 		/* Ack stale interrupts */
458 		kw_write_reg(reg_isr, kw_read_reg(reg_isr));
459 		/* Arm timeout */
460 		host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
461 		add_timer(&host->timeout_timer);
462 		/* Enable emission */
463 		kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
464 	}
465 
466 	/* Start sending address */
467 	kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
468 
469 	/* Wait for completion */
470 	if (use_irq)
471 		wait_for_completion(&host->complete);
472 	else {
473 		while(host->state != state_idle) {
474 			unsigned long flags;
475 
476 			u8 isr = kw_i2c_wait_interrupt(host);
477 			spin_lock_irqsave(&host->lock, flags);
478 			kw_i2c_handle_interrupt(host, isr);
479 			spin_unlock_irqrestore(&host->lock, flags);
480 		}
481 	}
482 
483 	/* Disable emission */
484 	kw_write_reg(reg_ier, 0);
485 
486 	return host->result;
487 }
488 
489 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
490 {
491 	struct pmac_i2c_host_kw *host;
492 	const u32		*psteps, *prate, *addrp;
493 	u32			steps;
494 
495 	host = kzalloc(sizeof(*host), GFP_KERNEL);
496 	if (host == NULL) {
497 		printk(KERN_ERR "low_i2c: Can't allocate host for %pOF\n",
498 		       np);
499 		return NULL;
500 	}
501 
502 	/* Apple is kind enough to provide a valid AAPL,address property
503 	 * on all i2c keywest nodes so far ... we would have to fallback
504 	 * to macio parsing if that wasn't the case
505 	 */
506 	addrp = of_get_property(np, "AAPL,address", NULL);
507 	if (addrp == NULL) {
508 		printk(KERN_ERR "low_i2c: Can't find address for %pOF\n",
509 		       np);
510 		kfree(host);
511 		return NULL;
512 	}
513 	mutex_init(&host->mutex);
514 	init_completion(&host->complete);
515 	spin_lock_init(&host->lock);
516 	timer_setup(&host->timeout_timer, kw_i2c_timeout, 0);
517 
518 	psteps = of_get_property(np, "AAPL,address-step", NULL);
519 	steps = psteps ? (*psteps) : 0x10;
520 	for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
521 		steps >>= 1;
522 	/* Select interface rate */
523 	host->speed = KW_I2C_MODE_25KHZ;
524 	prate = of_get_property(np, "AAPL,i2c-rate", NULL);
525 	if (prate) switch(*prate) {
526 	case 100:
527 		host->speed = KW_I2C_MODE_100KHZ;
528 		break;
529 	case 50:
530 		host->speed = KW_I2C_MODE_50KHZ;
531 		break;
532 	case 25:
533 		host->speed = KW_I2C_MODE_25KHZ;
534 		break;
535 	}
536 	host->irq = irq_of_parse_and_map(np, 0);
537 	if (!host->irq)
538 		printk(KERN_WARNING
539 		       "low_i2c: Failed to map interrupt for %pOF\n",
540 		       np);
541 
542 	host->base = ioremap((*addrp), 0x1000);
543 	if (host->base == NULL) {
544 		printk(KERN_ERR "low_i2c: Can't map registers for %pOF\n",
545 		       np);
546 		kfree(host);
547 		return NULL;
548 	}
549 
550 	/* Make sure IRQ is disabled */
551 	kw_write_reg(reg_ier, 0);
552 
553 	/* Request chip interrupt. We set IRQF_NO_SUSPEND because we don't
554 	 * want that interrupt disabled between the 2 passes of driver
555 	 * suspend or we'll have issues running the pfuncs
556 	 */
557 	if (request_irq(host->irq, kw_i2c_irq, IRQF_NO_SUSPEND,
558 			"keywest i2c", host))
559 		host->irq = 0;
560 
561 	printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %pOF\n",
562 	       *addrp, host->irq, np);
563 
564 	return host;
565 }
566 
567 
568 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host,
569 			      struct device_node *controller,
570 			      struct device_node *busnode,
571 			      int channel)
572 {
573 	struct pmac_i2c_bus *bus;
574 
575 	bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL);
576 	if (bus == NULL)
577 		return;
578 
579 	bus->controller = of_node_get(controller);
580 	bus->busnode = of_node_get(busnode);
581 	bus->type = pmac_i2c_bus_keywest;
582 	bus->hostdata = host;
583 	bus->channel = channel;
584 	bus->mode = pmac_i2c_mode_std;
585 	bus->open = kw_i2c_open;
586 	bus->close = kw_i2c_close;
587 	bus->xfer = kw_i2c_xfer;
588 	mutex_init(&bus->mutex);
589 	lockdep_set_class(&bus->mutex, &bus->lock_key);
590 	if (controller == busnode)
591 		bus->flags = pmac_i2c_multibus;
592 	list_add(&bus->link, &pmac_i2c_busses);
593 
594 	printk(KERN_INFO " channel %d bus %s\n", channel,
595 	       (controller == busnode) ? "<multibus>" : busnode->full_name);
596 }
597 
598 static void __init kw_i2c_probe(void)
599 {
600 	struct device_node *np, *child, *parent;
601 
602 	/* Probe keywest-i2c busses */
603 	for_each_compatible_node(np, "i2c","keywest-i2c") {
604 		struct pmac_i2c_host_kw *host;
605 		int multibus;
606 
607 		/* Found one, init a host structure */
608 		host = kw_i2c_host_init(np);
609 		if (host == NULL)
610 			continue;
611 
612 		/* Now check if we have a multibus setup (old style) or if we
613 		 * have proper bus nodes. Note that the "new" way (proper bus
614 		 * nodes) might cause us to not create some busses that are
615 		 * kept hidden in the device-tree. In the future, we might
616 		 * want to work around that by creating busses without a node
617 		 * but not for now
618 		 */
619 		child = of_get_next_child(np, NULL);
620 		multibus = !child || strcmp(child->name, "i2c-bus");
621 		of_node_put(child);
622 
623 		/* For a multibus setup, we get the bus count based on the
624 		 * parent type
625 		 */
626 		if (multibus) {
627 			int chans, i;
628 
629 			parent = of_get_parent(np);
630 			if (parent == NULL)
631 				continue;
632 			chans = parent->name[0] == 'u' ? 2 : 1;
633 			for (i = 0; i < chans; i++)
634 				kw_i2c_add(host, np, np, i);
635 		} else {
636 			for (child = NULL;
637 			     (child = of_get_next_child(np, child)) != NULL;) {
638 				const u32 *reg = of_get_property(child,
639 						"reg", NULL);
640 				if (reg == NULL)
641 					continue;
642 				kw_i2c_add(host, np, child, *reg);
643 			}
644 		}
645 	}
646 }
647 
648 
649 /*
650  *
651  * PMU implementation
652  *
653  */
654 
655 #ifdef CONFIG_ADB_PMU
656 
657 /*
658  * i2c command block to the PMU
659  */
660 struct pmu_i2c_hdr {
661 	u8	bus;
662 	u8	mode;
663 	u8	bus2;
664 	u8	address;
665 	u8	sub_addr;
666 	u8	comb_addr;
667 	u8	count;
668 	u8	data[];
669 };
670 
671 static void pmu_i2c_complete(struct adb_request *req)
672 {
673 	complete(req->arg);
674 }
675 
676 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
677 			u32 subaddr, u8 *data, int len)
678 {
679 	struct adb_request *req = bus->hostdata;
680 	struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1];
681 	struct completion comp;
682 	int read = addrdir & 1;
683 	int retry;
684 	int rc = 0;
685 
686 	/* For now, limit ourselves to 16 bytes transfers */
687 	if (len > 16)
688 		return -EINVAL;
689 
690 	init_completion(&comp);
691 
692 	for (retry = 0; retry < 16; retry++) {
693 		memset(req, 0, sizeof(struct adb_request));
694 		hdr->bus = bus->channel;
695 		hdr->count = len;
696 
697 		switch(bus->mode) {
698 		case pmac_i2c_mode_std:
699 			if (subsize != 0)
700 				return -EINVAL;
701 			hdr->address = addrdir;
702 			hdr->mode = PMU_I2C_MODE_SIMPLE;
703 			break;
704 		case pmac_i2c_mode_stdsub:
705 		case pmac_i2c_mode_combined:
706 			if (subsize != 1)
707 				return -EINVAL;
708 			hdr->address = addrdir & 0xfe;
709 			hdr->comb_addr = addrdir;
710 			hdr->sub_addr = subaddr;
711 			if (bus->mode == pmac_i2c_mode_stdsub)
712 				hdr->mode = PMU_I2C_MODE_STDSUB;
713 			else
714 				hdr->mode = PMU_I2C_MODE_COMBINED;
715 			break;
716 		default:
717 			return -EINVAL;
718 		}
719 
720 		reinit_completion(&comp);
721 		req->data[0] = PMU_I2C_CMD;
722 		req->reply[0] = 0xff;
723 		req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
724 		req->done = pmu_i2c_complete;
725 		req->arg = &comp;
726 		if (!read && len) {
727 			memcpy(hdr->data, data, len);
728 			req->nbytes += len;
729 		}
730 		rc = pmu_queue_request(req);
731 		if (rc)
732 			return rc;
733 		wait_for_completion(&comp);
734 		if (req->reply[0] == PMU_I2C_STATUS_OK)
735 			break;
736 		msleep(15);
737 	}
738 	if (req->reply[0] != PMU_I2C_STATUS_OK)
739 		return -EIO;
740 
741 	for (retry = 0; retry < 16; retry++) {
742 		memset(req, 0, sizeof(struct adb_request));
743 
744 		/* I know that looks like a lot, slow as hell, but darwin
745 		 * does it so let's be on the safe side for now
746 		 */
747 		msleep(15);
748 
749 		hdr->bus = PMU_I2C_BUS_STATUS;
750 
751 		reinit_completion(&comp);
752 		req->data[0] = PMU_I2C_CMD;
753 		req->reply[0] = 0xff;
754 		req->nbytes = 2;
755 		req->done = pmu_i2c_complete;
756 		req->arg = &comp;
757 		rc = pmu_queue_request(req);
758 		if (rc)
759 			return rc;
760 		wait_for_completion(&comp);
761 
762 		if (req->reply[0] == PMU_I2C_STATUS_OK && !read)
763 			return 0;
764 		if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) {
765 			int rlen = req->reply_len - 1;
766 
767 			if (rlen != len) {
768 				printk(KERN_WARNING "low_i2c: PMU returned %d"
769 				       " bytes, expected %d !\n", rlen, len);
770 				return -EIO;
771 			}
772 			if (len)
773 				memcpy(data, &req->reply[1], len);
774 			return 0;
775 		}
776 	}
777 	return -EIO;
778 }
779 
780 static void __init pmu_i2c_probe(void)
781 {
782 	struct pmac_i2c_bus *bus;
783 	struct device_node *busnode;
784 	int channel, sz;
785 
786 	if (!pmu_present())
787 		return;
788 
789 	/* There might or might not be a "pmu-i2c" node, we use that
790 	 * or via-pmu itself, whatever we find. I haven't seen a machine
791 	 * with separate bus nodes, so we assume a multibus setup
792 	 */
793 	busnode = of_find_node_by_name(NULL, "pmu-i2c");
794 	if (busnode == NULL)
795 		busnode = of_find_node_by_name(NULL, "via-pmu");
796 	if (busnode == NULL)
797 		return;
798 
799 	printk(KERN_INFO "PMU i2c %pOF\n", busnode);
800 
801 	/*
802 	 * We add bus 1 and 2 only for now, bus 0 is "special"
803 	 */
804 	for (channel = 1; channel <= 2; channel++) {
805 		sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request);
806 		bus = kzalloc(sz, GFP_KERNEL);
807 		if (bus == NULL)
808 			return;
809 
810 		bus->controller = busnode;
811 		bus->busnode = busnode;
812 		bus->type = pmac_i2c_bus_pmu;
813 		bus->channel = channel;
814 		bus->mode = pmac_i2c_mode_std;
815 		bus->hostdata = bus + 1;
816 		bus->xfer = pmu_i2c_xfer;
817 		mutex_init(&bus->mutex);
818 		lockdep_set_class(&bus->mutex, &bus->lock_key);
819 		bus->flags = pmac_i2c_multibus;
820 		list_add(&bus->link, &pmac_i2c_busses);
821 
822 		printk(KERN_INFO " channel %d bus <multibus>\n", channel);
823 	}
824 }
825 
826 #endif /* CONFIG_ADB_PMU */
827 
828 
829 /*
830  *
831  * SMU implementation
832  *
833  */
834 
835 #ifdef CONFIG_PMAC_SMU
836 
837 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc)
838 {
839 	complete(misc);
840 }
841 
842 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
843 			u32 subaddr, u8 *data, int len)
844 {
845 	struct smu_i2c_cmd *cmd = bus->hostdata;
846 	struct completion comp;
847 	int read = addrdir & 1;
848 	int rc = 0;
849 
850 	if ((read && len > SMU_I2C_READ_MAX) ||
851 	    ((!read) && len > SMU_I2C_WRITE_MAX))
852 		return -EINVAL;
853 
854 	memset(cmd, 0, sizeof(struct smu_i2c_cmd));
855 	cmd->info.bus = bus->channel;
856 	cmd->info.devaddr = addrdir;
857 	cmd->info.datalen = len;
858 
859 	switch(bus->mode) {
860 	case pmac_i2c_mode_std:
861 		if (subsize != 0)
862 			return -EINVAL;
863 		cmd->info.type = SMU_I2C_TRANSFER_SIMPLE;
864 		break;
865 	case pmac_i2c_mode_stdsub:
866 	case pmac_i2c_mode_combined:
867 		if (subsize > 3 || subsize < 1)
868 			return -EINVAL;
869 		cmd->info.sublen = subsize;
870 		/* that's big-endian only but heh ! */
871 		memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize),
872 		       subsize);
873 		if (bus->mode == pmac_i2c_mode_stdsub)
874 			cmd->info.type = SMU_I2C_TRANSFER_STDSUB;
875 		else
876 			cmd->info.type = SMU_I2C_TRANSFER_COMBINED;
877 		break;
878 	default:
879 		return -EINVAL;
880 	}
881 	if (!read && len)
882 		memcpy(cmd->info.data, data, len);
883 
884 	init_completion(&comp);
885 	cmd->done = smu_i2c_complete;
886 	cmd->misc = &comp;
887 	rc = smu_queue_i2c(cmd);
888 	if (rc < 0)
889 		return rc;
890 	wait_for_completion(&comp);
891 	rc = cmd->status;
892 
893 	if (read && len)
894 		memcpy(data, cmd->info.data, len);
895 	return rc < 0 ? rc : 0;
896 }
897 
898 static void __init smu_i2c_probe(void)
899 {
900 	struct device_node *controller, *busnode;
901 	struct pmac_i2c_bus *bus;
902 	const u32 *reg;
903 	int sz;
904 
905 	if (!smu_present())
906 		return;
907 
908 	controller = of_find_node_by_name(NULL, "smu-i2c-control");
909 	if (controller == NULL)
910 		controller = of_find_node_by_name(NULL, "smu");
911 	if (controller == NULL)
912 		return;
913 
914 	printk(KERN_INFO "SMU i2c %pOF\n", controller);
915 
916 	/* Look for childs, note that they might not be of the right
917 	 * type as older device trees mix i2c busses and other things
918 	 * at the same level
919 	 */
920 	for (busnode = NULL;
921 	     (busnode = of_get_next_child(controller, busnode)) != NULL;) {
922 		if (strcmp(busnode->type, "i2c") &&
923 		    strcmp(busnode->type, "i2c-bus"))
924 			continue;
925 		reg = of_get_property(busnode, "reg", NULL);
926 		if (reg == NULL)
927 			continue;
928 
929 		sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd);
930 		bus = kzalloc(sz, GFP_KERNEL);
931 		if (bus == NULL)
932 			return;
933 
934 		bus->controller = controller;
935 		bus->busnode = of_node_get(busnode);
936 		bus->type = pmac_i2c_bus_smu;
937 		bus->channel = *reg;
938 		bus->mode = pmac_i2c_mode_std;
939 		bus->hostdata = bus + 1;
940 		bus->xfer = smu_i2c_xfer;
941 		mutex_init(&bus->mutex);
942 		lockdep_set_class(&bus->mutex, &bus->lock_key);
943 		bus->flags = 0;
944 		list_add(&bus->link, &pmac_i2c_busses);
945 
946 		printk(KERN_INFO " channel %x bus %pOF\n",
947 		       bus->channel, busnode);
948 	}
949 }
950 
951 #endif /* CONFIG_PMAC_SMU */
952 
953 /*
954  *
955  * Core code
956  *
957  */
958 
959 
960 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node)
961 {
962 	struct device_node *p = of_node_get(node);
963 	struct device_node *prev = NULL;
964 	struct pmac_i2c_bus *bus;
965 
966 	while(p) {
967 		list_for_each_entry(bus, &pmac_i2c_busses, link) {
968 			if (p == bus->busnode) {
969 				if (prev && bus->flags & pmac_i2c_multibus) {
970 					const u32 *reg;
971 					reg = of_get_property(prev, "reg",
972 								NULL);
973 					if (!reg)
974 						continue;
975 					if (((*reg) >> 8) != bus->channel)
976 						continue;
977 				}
978 				of_node_put(p);
979 				of_node_put(prev);
980 				return bus;
981 			}
982 		}
983 		of_node_put(prev);
984 		prev = p;
985 		p = of_get_parent(p);
986 	}
987 	return NULL;
988 }
989 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus);
990 
991 u8 pmac_i2c_get_dev_addr(struct device_node *device)
992 {
993 	const u32 *reg = of_get_property(device, "reg", NULL);
994 
995 	if (reg == NULL)
996 		return 0;
997 
998 	return (*reg) & 0xff;
999 }
1000 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr);
1001 
1002 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus)
1003 {
1004 	return bus->controller;
1005 }
1006 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller);
1007 
1008 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus)
1009 {
1010 	return bus->busnode;
1011 }
1012 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node);
1013 
1014 int pmac_i2c_get_type(struct pmac_i2c_bus *bus)
1015 {
1016 	return bus->type;
1017 }
1018 EXPORT_SYMBOL_GPL(pmac_i2c_get_type);
1019 
1020 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
1021 {
1022 	return bus->flags;
1023 }
1024 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
1025 
1026 int pmac_i2c_get_channel(struct pmac_i2c_bus *bus)
1027 {
1028 	return bus->channel;
1029 }
1030 EXPORT_SYMBOL_GPL(pmac_i2c_get_channel);
1031 
1032 
1033 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
1034 {
1035 	return &bus->adapter;
1036 }
1037 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
1038 
1039 struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter)
1040 {
1041 	struct pmac_i2c_bus *bus;
1042 
1043 	list_for_each_entry(bus, &pmac_i2c_busses, link)
1044 		if (&bus->adapter == adapter)
1045 			return bus;
1046 	return NULL;
1047 }
1048 EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus);
1049 
1050 int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter)
1051 {
1052 	struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev);
1053 
1054 	if (bus == NULL)
1055 		return 0;
1056 	return (&bus->adapter == adapter);
1057 }
1058 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter);
1059 
1060 int pmac_low_i2c_lock(struct device_node *np)
1061 {
1062 	struct pmac_i2c_bus *bus, *found = NULL;
1063 
1064 	list_for_each_entry(bus, &pmac_i2c_busses, link) {
1065 		if (np == bus->controller) {
1066 			found = bus;
1067 			break;
1068 		}
1069 	}
1070 	if (!found)
1071 		return -ENODEV;
1072 	return pmac_i2c_open(bus, 0);
1073 }
1074 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock);
1075 
1076 int pmac_low_i2c_unlock(struct device_node *np)
1077 {
1078 	struct pmac_i2c_bus *bus, *found = NULL;
1079 
1080 	list_for_each_entry(bus, &pmac_i2c_busses, link) {
1081 		if (np == bus->controller) {
1082 			found = bus;
1083 			break;
1084 		}
1085 	}
1086 	if (!found)
1087 		return -ENODEV;
1088 	pmac_i2c_close(bus);
1089 	return 0;
1090 }
1091 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock);
1092 
1093 
1094 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
1095 {
1096 	int rc;
1097 
1098 	mutex_lock(&bus->mutex);
1099 	bus->polled = polled || pmac_i2c_force_poll;
1100 	bus->opened = 1;
1101 	bus->mode = pmac_i2c_mode_std;
1102 	if (bus->open && (rc = bus->open(bus)) != 0) {
1103 		bus->opened = 0;
1104 		mutex_unlock(&bus->mutex);
1105 		return rc;
1106 	}
1107 	return 0;
1108 }
1109 EXPORT_SYMBOL_GPL(pmac_i2c_open);
1110 
1111 void pmac_i2c_close(struct pmac_i2c_bus *bus)
1112 {
1113 	WARN_ON(!bus->opened);
1114 	if (bus->close)
1115 		bus->close(bus);
1116 	bus->opened = 0;
1117 	mutex_unlock(&bus->mutex);
1118 }
1119 EXPORT_SYMBOL_GPL(pmac_i2c_close);
1120 
1121 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode)
1122 {
1123 	WARN_ON(!bus->opened);
1124 
1125 	/* Report me if you see the error below as there might be a new
1126 	 * "combined4" mode that I need to implement for the SMU bus
1127 	 */
1128 	if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) {
1129 		printk(KERN_ERR "low_i2c: Invalid mode %d requested on"
1130 		       " bus %pOF !\n", mode, bus->busnode);
1131 		return -EINVAL;
1132 	}
1133 	bus->mode = mode;
1134 
1135 	return 0;
1136 }
1137 EXPORT_SYMBOL_GPL(pmac_i2c_setmode);
1138 
1139 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
1140 		  u32 subaddr, u8 *data, int len)
1141 {
1142 	int rc;
1143 
1144 	WARN_ON(!bus->opened);
1145 
1146 	DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x,"
1147 	    " %d bytes, bus %pOF\n", bus->channel, addrdir, bus->mode, subsize,
1148 	    subaddr, len, bus->busnode);
1149 
1150 	rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len);
1151 
1152 #ifdef DEBUG
1153 	if (rc)
1154 		DBG("xfer error %d\n", rc);
1155 #endif
1156 	return rc;
1157 }
1158 EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
1159 
1160 /* some quirks for platform function decoding */
1161 enum {
1162 	pmac_i2c_quirk_invmask = 0x00000001u,
1163 	pmac_i2c_quirk_skip = 0x00000002u,
1164 };
1165 
1166 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
1167 					      int quirks))
1168 {
1169 	struct pmac_i2c_bus *bus;
1170 	struct device_node *np;
1171 	static struct whitelist_ent {
1172 		char *name;
1173 		char *compatible;
1174 		int quirks;
1175 	} whitelist[] = {
1176 		/* XXX Study device-tree's & apple drivers are get the quirks
1177 		 * right !
1178 		 */
1179 		/* Workaround: It seems that running the clockspreading
1180 		 * properties on the eMac will cause lockups during boot.
1181 		 * The machine seems to work fine without that. So for now,
1182 		 * let's make sure i2c-hwclock doesn't match about "imic"
1183 		 * clocks and we'll figure out if we really need to do
1184 		 * something special about those later.
1185 		 */
1186 		{ "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
1187 		{ "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
1188 		{ "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
1189 		{ "i2c-cpu-voltage", NULL, 0},
1190 		{  "temp-monitor", NULL, 0 },
1191 		{  "supply-monitor", NULL, 0 },
1192 		{ NULL, NULL, 0 },
1193 	};
1194 
1195 	/* Only some devices need to have platform functions instanciated
1196 	 * here. For now, we have a table. Others, like 9554 i2c GPIOs used
1197 	 * on Xserve, if we ever do a driver for them, will use their own
1198 	 * platform function instance
1199 	 */
1200 	list_for_each_entry(bus, &pmac_i2c_busses, link) {
1201 		for (np = NULL;
1202 		     (np = of_get_next_child(bus->busnode, np)) != NULL;) {
1203 			struct whitelist_ent *p;
1204 			/* If multibus, check if device is on that bus */
1205 			if (bus->flags & pmac_i2c_multibus)
1206 				if (bus != pmac_i2c_find_bus(np))
1207 					continue;
1208 			for (p = whitelist; p->name != NULL; p++) {
1209 				if (strcmp(np->name, p->name))
1210 					continue;
1211 				if (p->compatible &&
1212 				    !of_device_is_compatible(np, p->compatible))
1213 					continue;
1214 				if (p->quirks & pmac_i2c_quirk_skip)
1215 					break;
1216 				callback(np, p->quirks);
1217 				break;
1218 			}
1219 		}
1220 	}
1221 }
1222 
1223 #define MAX_I2C_DATA	64
1224 
1225 struct pmac_i2c_pf_inst
1226 {
1227 	struct pmac_i2c_bus	*bus;
1228 	u8			addr;
1229 	u8			buffer[MAX_I2C_DATA];
1230 	u8			scratch[MAX_I2C_DATA];
1231 	int			bytes;
1232 	int			quirks;
1233 };
1234 
1235 static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args)
1236 {
1237 	struct pmac_i2c_pf_inst *inst;
1238 	struct pmac_i2c_bus	*bus;
1239 
1240 	bus = pmac_i2c_find_bus(func->node);
1241 	if (bus == NULL) {
1242 		printk(KERN_ERR "low_i2c: Can't find bus for %pOF (pfunc)\n",
1243 		       func->node);
1244 		return NULL;
1245 	}
1246 	if (pmac_i2c_open(bus, 0)) {
1247 		printk(KERN_ERR "low_i2c: Can't open i2c bus for %pOF (pfunc)\n",
1248 		       func->node);
1249 		return NULL;
1250 	}
1251 
1252 	/* XXX might need GFP_ATOMIC when called during the suspend process,
1253 	 * but then, there are already lots of issues with suspending when
1254 	 * near OOM that need to be resolved, the allocator itself should
1255 	 * probably make GFP_NOIO implicit during suspend
1256 	 */
1257 	inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL);
1258 	if (inst == NULL) {
1259 		pmac_i2c_close(bus);
1260 		return NULL;
1261 	}
1262 	inst->bus = bus;
1263 	inst->addr = pmac_i2c_get_dev_addr(func->node);
1264 	inst->quirks = (int)(long)func->driver_data;
1265 	return inst;
1266 }
1267 
1268 static void pmac_i2c_do_end(struct pmf_function *func, void *instdata)
1269 {
1270 	struct pmac_i2c_pf_inst *inst = instdata;
1271 
1272 	if (inst == NULL)
1273 		return;
1274 	pmac_i2c_close(inst->bus);
1275 	kfree(inst);
1276 }
1277 
1278 static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len)
1279 {
1280 	struct pmac_i2c_pf_inst *inst = instdata;
1281 
1282 	inst->bytes = len;
1283 	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0,
1284 			     inst->buffer, len);
1285 }
1286 
1287 static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data)
1288 {
1289 	struct pmac_i2c_pf_inst *inst = instdata;
1290 
1291 	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1292 			     (u8 *)data, len);
1293 }
1294 
1295 /* This function is used to do the masking & OR'ing for the "rmw" type
1296  * callbacks. Ze should apply the mask and OR in the values in the
1297  * buffer before writing back. The problem is that it seems that
1298  * various darwin drivers implement the mask/or differently, thus
1299  * we need to check the quirks first
1300  */
1301 static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst,
1302 				  u32 len, const u8 *mask, const u8 *val)
1303 {
1304 	int i;
1305 
1306 	if (inst->quirks & pmac_i2c_quirk_invmask) {
1307 		for (i = 0; i < len; i ++)
1308 			inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i];
1309 	} else {
1310 		for (i = 0; i < len; i ++)
1311 			inst->scratch[i] = (inst->buffer[i] & ~mask[i])
1312 				| (val[i] & mask[i]);
1313 	}
1314 }
1315 
1316 static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen,
1317 			   u32 totallen, const u8 *maskdata,
1318 			   const u8 *valuedata)
1319 {
1320 	struct pmac_i2c_pf_inst *inst = instdata;
1321 
1322 	if (masklen > inst->bytes || valuelen > inst->bytes ||
1323 	    totallen > inst->bytes || valuelen > masklen)
1324 		return -EINVAL;
1325 
1326 	pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1327 
1328 	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1329 			     inst->scratch, totallen);
1330 }
1331 
1332 static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len)
1333 {
1334 	struct pmac_i2c_pf_inst *inst = instdata;
1335 
1336 	inst->bytes = len;
1337 	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr,
1338 			     inst->buffer, len);
1339 }
1340 
1341 static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len,
1342 				     const u8 *data)
1343 {
1344 	struct pmac_i2c_pf_inst *inst = instdata;
1345 
1346 	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1347 			     subaddr, (u8 *)data, len);
1348 }
1349 
1350 static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode)
1351 {
1352 	struct pmac_i2c_pf_inst *inst = instdata;
1353 
1354 	return pmac_i2c_setmode(inst->bus, mode);
1355 }
1356 
1357 static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen,
1358 			       u32 valuelen, u32 totallen, const u8 *maskdata,
1359 			       const u8 *valuedata)
1360 {
1361 	struct pmac_i2c_pf_inst *inst = instdata;
1362 
1363 	if (masklen > inst->bytes || valuelen > inst->bytes ||
1364 	    totallen > inst->bytes || valuelen > masklen)
1365 		return -EINVAL;
1366 
1367 	pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1368 
1369 	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1370 			     subaddr, inst->scratch, totallen);
1371 }
1372 
1373 static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len,
1374 				     const u8 *maskdata,
1375 				     const u8 *valuedata)
1376 {
1377 	struct pmac_i2c_pf_inst *inst = instdata;
1378 	int i, match;
1379 
1380 	/* Get return value pointer, it's assumed to be a u32 */
1381 	if (!args || !args->count || !args->u[0].p)
1382 		return -EINVAL;
1383 
1384 	/* Check buffer */
1385 	if (len > inst->bytes)
1386 		return -EINVAL;
1387 
1388 	for (i = 0, match = 1; match && i < len; i ++)
1389 		if ((inst->buffer[i] & maskdata[i]) != valuedata[i])
1390 			match = 0;
1391 	*args->u[0].p = match;
1392 	return 0;
1393 }
1394 
1395 static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration)
1396 {
1397 	msleep((duration + 999) / 1000);
1398 	return 0;
1399 }
1400 
1401 
1402 static struct pmf_handlers pmac_i2c_pfunc_handlers = {
1403 	.begin			= pmac_i2c_do_begin,
1404 	.end			= pmac_i2c_do_end,
1405 	.read_i2c		= pmac_i2c_do_read,
1406 	.write_i2c		= pmac_i2c_do_write,
1407 	.rmw_i2c		= pmac_i2c_do_rmw,
1408 	.read_i2c_sub		= pmac_i2c_do_read_sub,
1409 	.write_i2c_sub		= pmac_i2c_do_write_sub,
1410 	.rmw_i2c_sub		= pmac_i2c_do_rmw_sub,
1411 	.set_i2c_mode		= pmac_i2c_do_set_mode,
1412 	.mask_and_compare	= pmac_i2c_do_mask_and_comp,
1413 	.delay			= pmac_i2c_do_delay,
1414 };
1415 
1416 static void __init pmac_i2c_dev_create(struct device_node *np, int quirks)
1417 {
1418 	DBG("dev_create(%pOF)\n", np);
1419 
1420 	pmf_register_driver(np, &pmac_i2c_pfunc_handlers,
1421 			    (void *)(long)quirks);
1422 }
1423 
1424 static void __init pmac_i2c_dev_init(struct device_node *np, int quirks)
1425 {
1426 	DBG("dev_create(%pOF)\n", np);
1427 
1428 	pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
1429 }
1430 
1431 static void pmac_i2c_dev_suspend(struct device_node *np, int quirks)
1432 {
1433 	DBG("dev_suspend(%pOF)\n", np);
1434 	pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL);
1435 }
1436 
1437 static void pmac_i2c_dev_resume(struct device_node *np, int quirks)
1438 {
1439 	DBG("dev_resume(%pOF)\n", np);
1440 	pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL);
1441 }
1442 
1443 void pmac_pfunc_i2c_suspend(void)
1444 {
1445 	pmac_i2c_devscan(pmac_i2c_dev_suspend);
1446 }
1447 
1448 void pmac_pfunc_i2c_resume(void)
1449 {
1450 	pmac_i2c_devscan(pmac_i2c_dev_resume);
1451 }
1452 
1453 /*
1454  * Initialize us: probe all i2c busses on the machine, instantiate
1455  * busses and platform functions as needed.
1456  */
1457 /* This is non-static as it might be called early by smp code */
1458 int __init pmac_i2c_init(void)
1459 {
1460 	static int i2c_inited;
1461 
1462 	if (i2c_inited)
1463 		return 0;
1464 	i2c_inited = 1;
1465 
1466 	/* Probe keywest-i2c busses */
1467 	kw_i2c_probe();
1468 
1469 #ifdef CONFIG_ADB_PMU
1470 	/* Probe PMU i2c busses */
1471 	pmu_i2c_probe();
1472 #endif
1473 
1474 #ifdef CONFIG_PMAC_SMU
1475 	/* Probe SMU i2c busses */
1476 	smu_i2c_probe();
1477 #endif
1478 
1479 	/* Now add plaform functions for some known devices */
1480 	pmac_i2c_devscan(pmac_i2c_dev_create);
1481 
1482 	return 0;
1483 }
1484 machine_arch_initcall(powermac, pmac_i2c_init);
1485 
1486 /* Since pmac_i2c_init can be called too early for the platform device
1487  * registration, we need to do it at a later time. In our case, subsys
1488  * happens to fit well, though I agree it's a bit of a hack...
1489  */
1490 static int __init pmac_i2c_create_platform_devices(void)
1491 {
1492 	struct pmac_i2c_bus *bus;
1493 	int i = 0;
1494 
1495 	/* In the case where we are initialized from smp_init(), we must
1496 	 * not use the timer (and thus the irq). It's safe from now on
1497 	 * though
1498 	 */
1499 	pmac_i2c_force_poll = 0;
1500 
1501 	/* Create platform devices */
1502 	list_for_each_entry(bus, &pmac_i2c_busses, link) {
1503 		bus->platform_dev =
1504 			platform_device_alloc("i2c-powermac", i++);
1505 		if (bus->platform_dev == NULL)
1506 			return -ENOMEM;
1507 		bus->platform_dev->dev.platform_data = bus;
1508 		bus->platform_dev->dev.of_node = bus->busnode;
1509 		platform_device_add(bus->platform_dev);
1510 	}
1511 
1512 	/* Now call platform "init" functions */
1513 	pmac_i2c_devscan(pmac_i2c_dev_init);
1514 
1515 	return 0;
1516 }
1517 machine_subsys_initcall(powermac, pmac_i2c_create_platform_devices);
1518