1 /* 2 * arch/powerpc/platforms/powermac/low_i2c.c 3 * 4 * Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org) 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 * 11 * The linux i2c layer isn't completely suitable for our needs for various 12 * reasons ranging from too late initialisation to semantics not perfectly 13 * matching some requirements of the apple platform functions etc... 14 * 15 * This file thus provides a simple low level unified i2c interface for 16 * powermac that covers the various types of i2c busses used in Apple machines. 17 * For now, keywest, PMU and SMU, though we could add Cuda, or other bit 18 * banging busses found on older chipstes in earlier machines if we ever need 19 * one of them. 20 * 21 * The drivers in this file are synchronous/blocking. In addition, the 22 * keywest one is fairly slow due to the use of msleep instead of interrupts 23 * as the interrupt is currently used by i2c-keywest. In the long run, we 24 * might want to get rid of those high-level interfaces to linux i2c layer 25 * either completely (converting all drivers) or replacing them all with a 26 * single stub driver on top of this one. Once done, the interrupt will be 27 * available for our use. 28 */ 29 30 #undef DEBUG 31 #undef DEBUG_LOW 32 33 #include <linux/types.h> 34 #include <linux/sched.h> 35 #include <linux/init.h> 36 #include <linux/module.h> 37 #include <linux/adb.h> 38 #include <linux/pmu.h> 39 #include <linux/delay.h> 40 #include <linux/completion.h> 41 #include <linux/platform_device.h> 42 #include <linux/interrupt.h> 43 #include <linux/timer.h> 44 #include <linux/mutex.h> 45 #include <linux/i2c.h> 46 #include <asm/keylargo.h> 47 #include <asm/uninorth.h> 48 #include <asm/io.h> 49 #include <asm/prom.h> 50 #include <asm/machdep.h> 51 #include <asm/smu.h> 52 #include <asm/pmac_pfunc.h> 53 #include <asm/pmac_low_i2c.h> 54 55 #ifdef DEBUG 56 #define DBG(x...) do {\ 57 printk(KERN_DEBUG "low_i2c:" x); \ 58 } while(0) 59 #else 60 #define DBG(x...) 61 #endif 62 63 #ifdef DEBUG_LOW 64 #define DBG_LOW(x...) do {\ 65 printk(KERN_DEBUG "low_i2c:" x); \ 66 } while(0) 67 #else 68 #define DBG_LOW(x...) 69 #endif 70 71 72 static int pmac_i2c_force_poll = 1; 73 74 /* 75 * A bus structure. Each bus in the system has such a structure associated. 76 */ 77 struct pmac_i2c_bus 78 { 79 struct list_head link; 80 struct device_node *controller; 81 struct device_node *busnode; 82 int type; 83 int flags; 84 struct i2c_adapter adapter; 85 void *hostdata; 86 int channel; /* some hosts have multiple */ 87 int mode; /* current mode */ 88 struct mutex mutex; 89 int opened; 90 int polled; /* open mode */ 91 struct platform_device *platform_dev; 92 93 /* ops */ 94 int (*open)(struct pmac_i2c_bus *bus); 95 void (*close)(struct pmac_i2c_bus *bus); 96 int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 97 u32 subaddr, u8 *data, int len); 98 }; 99 100 static LIST_HEAD(pmac_i2c_busses); 101 102 /* 103 * Keywest implementation 104 */ 105 106 struct pmac_i2c_host_kw 107 { 108 struct mutex mutex; /* Access mutex for use by 109 * i2c-keywest */ 110 void __iomem *base; /* register base address */ 111 int bsteps; /* register stepping */ 112 int speed; /* speed */ 113 int irq; 114 u8 *data; 115 unsigned len; 116 int state; 117 int rw; 118 int polled; 119 int result; 120 struct completion complete; 121 spinlock_t lock; 122 struct timer_list timeout_timer; 123 }; 124 125 /* Register indices */ 126 typedef enum { 127 reg_mode = 0, 128 reg_control, 129 reg_status, 130 reg_isr, 131 reg_ier, 132 reg_addr, 133 reg_subaddr, 134 reg_data 135 } reg_t; 136 137 /* The Tumbler audio equalizer can be really slow sometimes */ 138 #define KW_POLL_TIMEOUT (2*HZ) 139 140 /* Mode register */ 141 #define KW_I2C_MODE_100KHZ 0x00 142 #define KW_I2C_MODE_50KHZ 0x01 143 #define KW_I2C_MODE_25KHZ 0x02 144 #define KW_I2C_MODE_DUMB 0x00 145 #define KW_I2C_MODE_STANDARD 0x04 146 #define KW_I2C_MODE_STANDARDSUB 0x08 147 #define KW_I2C_MODE_COMBINED 0x0C 148 #define KW_I2C_MODE_MODE_MASK 0x0C 149 #define KW_I2C_MODE_CHAN_MASK 0xF0 150 151 /* Control register */ 152 #define KW_I2C_CTL_AAK 0x01 153 #define KW_I2C_CTL_XADDR 0x02 154 #define KW_I2C_CTL_STOP 0x04 155 #define KW_I2C_CTL_START 0x08 156 157 /* Status register */ 158 #define KW_I2C_STAT_BUSY 0x01 159 #define KW_I2C_STAT_LAST_AAK 0x02 160 #define KW_I2C_STAT_LAST_RW 0x04 161 #define KW_I2C_STAT_SDA 0x08 162 #define KW_I2C_STAT_SCL 0x10 163 164 /* IER & ISR registers */ 165 #define KW_I2C_IRQ_DATA 0x01 166 #define KW_I2C_IRQ_ADDR 0x02 167 #define KW_I2C_IRQ_STOP 0x04 168 #define KW_I2C_IRQ_START 0x08 169 #define KW_I2C_IRQ_MASK 0x0F 170 171 /* State machine states */ 172 enum { 173 state_idle, 174 state_addr, 175 state_read, 176 state_write, 177 state_stop, 178 state_dead 179 }; 180 181 #define WRONG_STATE(name) do {\ 182 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \ 183 "(isr: %02x)\n", \ 184 name, __kw_state_names[host->state], isr); \ 185 } while(0) 186 187 static const char *__kw_state_names[] = { 188 "state_idle", 189 "state_addr", 190 "state_read", 191 "state_write", 192 "state_stop", 193 "state_dead" 194 }; 195 196 static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg) 197 { 198 return readb(host->base + (((unsigned int)reg) << host->bsteps)); 199 } 200 201 static inline void __kw_write_reg(struct pmac_i2c_host_kw *host, 202 reg_t reg, u8 val) 203 { 204 writeb(val, host->base + (((unsigned)reg) << host->bsteps)); 205 (void)__kw_read_reg(host, reg_subaddr); 206 } 207 208 #define kw_write_reg(reg, val) __kw_write_reg(host, reg, val) 209 #define kw_read_reg(reg) __kw_read_reg(host, reg) 210 211 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host) 212 { 213 int i, j; 214 u8 isr; 215 216 for (i = 0; i < 1000; i++) { 217 isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK; 218 if (isr != 0) 219 return isr; 220 221 /* This code is used with the timebase frozen, we cannot rely 222 * on udelay nor schedule when in polled mode ! 223 * For now, just use a bogus loop.... 224 */ 225 if (host->polled) { 226 for (j = 1; j < 100000; j++) 227 mb(); 228 } else 229 msleep(1); 230 } 231 return isr; 232 } 233 234 static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result) 235 { 236 kw_write_reg(reg_control, KW_I2C_CTL_STOP); 237 host->state = state_stop; 238 host->result = result; 239 } 240 241 242 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr) 243 { 244 u8 ack; 245 246 DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n", 247 __kw_state_names[host->state], isr); 248 249 if (host->state == state_idle) { 250 printk(KERN_WARNING "low_i2c: Keywest got an out of state" 251 " interrupt, ignoring\n"); 252 kw_write_reg(reg_isr, isr); 253 return; 254 } 255 256 if (isr == 0) { 257 printk(KERN_WARNING "low_i2c: Timeout in i2c transfer" 258 " on keywest !\n"); 259 if (host->state != state_stop) { 260 kw_i2c_do_stop(host, -EIO); 261 return; 262 } 263 ack = kw_read_reg(reg_status); 264 if (ack & KW_I2C_STAT_BUSY) 265 kw_write_reg(reg_status, 0); 266 host->state = state_idle; 267 kw_write_reg(reg_ier, 0x00); 268 if (!host->polled) 269 complete(&host->complete); 270 return; 271 } 272 273 if (isr & KW_I2C_IRQ_ADDR) { 274 ack = kw_read_reg(reg_status); 275 if (host->state != state_addr) { 276 WRONG_STATE("KW_I2C_IRQ_ADDR"); 277 kw_i2c_do_stop(host, -EIO); 278 } 279 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) { 280 host->result = -ENXIO; 281 host->state = state_stop; 282 DBG_LOW("KW: NAK on address\n"); 283 } else { 284 if (host->len == 0) 285 kw_i2c_do_stop(host, 0); 286 else if (host->rw) { 287 host->state = state_read; 288 if (host->len > 1) 289 kw_write_reg(reg_control, 290 KW_I2C_CTL_AAK); 291 } else { 292 host->state = state_write; 293 kw_write_reg(reg_data, *(host->data++)); 294 host->len--; 295 } 296 } 297 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR); 298 } 299 300 if (isr & KW_I2C_IRQ_DATA) { 301 if (host->state == state_read) { 302 *(host->data++) = kw_read_reg(reg_data); 303 host->len--; 304 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA); 305 if (host->len == 0) 306 host->state = state_stop; 307 else if (host->len == 1) 308 kw_write_reg(reg_control, 0); 309 } else if (host->state == state_write) { 310 ack = kw_read_reg(reg_status); 311 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) { 312 DBG_LOW("KW: nack on data write\n"); 313 host->result = -EFBIG; 314 host->state = state_stop; 315 } else if (host->len) { 316 kw_write_reg(reg_data, *(host->data++)); 317 host->len--; 318 } else 319 kw_i2c_do_stop(host, 0); 320 } else { 321 WRONG_STATE("KW_I2C_IRQ_DATA"); 322 if (host->state != state_stop) 323 kw_i2c_do_stop(host, -EIO); 324 } 325 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA); 326 } 327 328 if (isr & KW_I2C_IRQ_STOP) { 329 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP); 330 if (host->state != state_stop) { 331 WRONG_STATE("KW_I2C_IRQ_STOP"); 332 host->result = -EIO; 333 } 334 host->state = state_idle; 335 if (!host->polled) 336 complete(&host->complete); 337 } 338 339 /* Below should only happen in manual mode which we don't use ... */ 340 if (isr & KW_I2C_IRQ_START) 341 kw_write_reg(reg_isr, KW_I2C_IRQ_START); 342 343 } 344 345 /* Interrupt handler */ 346 static irqreturn_t kw_i2c_irq(int irq, void *dev_id) 347 { 348 struct pmac_i2c_host_kw *host = dev_id; 349 unsigned long flags; 350 351 spin_lock_irqsave(&host->lock, flags); 352 del_timer(&host->timeout_timer); 353 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr)); 354 if (host->state != state_idle) { 355 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; 356 add_timer(&host->timeout_timer); 357 } 358 spin_unlock_irqrestore(&host->lock, flags); 359 return IRQ_HANDLED; 360 } 361 362 static void kw_i2c_timeout(unsigned long data) 363 { 364 struct pmac_i2c_host_kw *host = (struct pmac_i2c_host_kw *)data; 365 unsigned long flags; 366 367 spin_lock_irqsave(&host->lock, flags); 368 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr)); 369 if (host->state != state_idle) { 370 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; 371 add_timer(&host->timeout_timer); 372 } 373 spin_unlock_irqrestore(&host->lock, flags); 374 } 375 376 static int kw_i2c_open(struct pmac_i2c_bus *bus) 377 { 378 struct pmac_i2c_host_kw *host = bus->hostdata; 379 mutex_lock(&host->mutex); 380 return 0; 381 } 382 383 static void kw_i2c_close(struct pmac_i2c_bus *bus) 384 { 385 struct pmac_i2c_host_kw *host = bus->hostdata; 386 mutex_unlock(&host->mutex); 387 } 388 389 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 390 u32 subaddr, u8 *data, int len) 391 { 392 struct pmac_i2c_host_kw *host = bus->hostdata; 393 u8 mode_reg = host->speed; 394 int use_irq = host->irq != NO_IRQ && !bus->polled; 395 396 /* Setup mode & subaddress if any */ 397 switch(bus->mode) { 398 case pmac_i2c_mode_dumb: 399 return -EINVAL; 400 case pmac_i2c_mode_std: 401 mode_reg |= KW_I2C_MODE_STANDARD; 402 if (subsize != 0) 403 return -EINVAL; 404 break; 405 case pmac_i2c_mode_stdsub: 406 mode_reg |= KW_I2C_MODE_STANDARDSUB; 407 if (subsize != 1) 408 return -EINVAL; 409 break; 410 case pmac_i2c_mode_combined: 411 mode_reg |= KW_I2C_MODE_COMBINED; 412 if (subsize != 1) 413 return -EINVAL; 414 break; 415 } 416 417 /* Setup channel & clear pending irqs */ 418 kw_write_reg(reg_isr, kw_read_reg(reg_isr)); 419 kw_write_reg(reg_mode, mode_reg | (bus->channel << 4)); 420 kw_write_reg(reg_status, 0); 421 422 /* Set up address and r/w bit, strip possible stale bus number from 423 * address top bits 424 */ 425 kw_write_reg(reg_addr, addrdir & 0xff); 426 427 /* Set up the sub address */ 428 if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB 429 || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED) 430 kw_write_reg(reg_subaddr, subaddr); 431 432 /* Prepare for async operations */ 433 host->data = data; 434 host->len = len; 435 host->state = state_addr; 436 host->result = 0; 437 host->rw = (addrdir & 1); 438 host->polled = bus->polled; 439 440 /* Enable interrupt if not using polled mode and interrupt is 441 * available 442 */ 443 if (use_irq) { 444 /* Clear completion */ 445 INIT_COMPLETION(host->complete); 446 /* Ack stale interrupts */ 447 kw_write_reg(reg_isr, kw_read_reg(reg_isr)); 448 /* Arm timeout */ 449 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; 450 add_timer(&host->timeout_timer); 451 /* Enable emission */ 452 kw_write_reg(reg_ier, KW_I2C_IRQ_MASK); 453 } 454 455 /* Start sending address */ 456 kw_write_reg(reg_control, KW_I2C_CTL_XADDR); 457 458 /* Wait for completion */ 459 if (use_irq) 460 wait_for_completion(&host->complete); 461 else { 462 while(host->state != state_idle) { 463 unsigned long flags; 464 465 u8 isr = kw_i2c_wait_interrupt(host); 466 spin_lock_irqsave(&host->lock, flags); 467 kw_i2c_handle_interrupt(host, isr); 468 spin_unlock_irqrestore(&host->lock, flags); 469 } 470 } 471 472 /* Disable emission */ 473 kw_write_reg(reg_ier, 0); 474 475 return host->result; 476 } 477 478 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np) 479 { 480 struct pmac_i2c_host_kw *host; 481 const u32 *psteps, *prate, *addrp; 482 u32 steps; 483 484 host = kzalloc(sizeof(struct pmac_i2c_host_kw), GFP_KERNEL); 485 if (host == NULL) { 486 printk(KERN_ERR "low_i2c: Can't allocate host for %s\n", 487 np->full_name); 488 return NULL; 489 } 490 491 /* Apple is kind enough to provide a valid AAPL,address property 492 * on all i2c keywest nodes so far ... we would have to fallback 493 * to macio parsing if that wasn't the case 494 */ 495 addrp = of_get_property(np, "AAPL,address", NULL); 496 if (addrp == NULL) { 497 printk(KERN_ERR "low_i2c: Can't find address for %s\n", 498 np->full_name); 499 kfree(host); 500 return NULL; 501 } 502 mutex_init(&host->mutex); 503 init_completion(&host->complete); 504 spin_lock_init(&host->lock); 505 init_timer(&host->timeout_timer); 506 host->timeout_timer.function = kw_i2c_timeout; 507 host->timeout_timer.data = (unsigned long)host; 508 509 psteps = of_get_property(np, "AAPL,address-step", NULL); 510 steps = psteps ? (*psteps) : 0x10; 511 for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++) 512 steps >>= 1; 513 /* Select interface rate */ 514 host->speed = KW_I2C_MODE_25KHZ; 515 prate = of_get_property(np, "AAPL,i2c-rate", NULL); 516 if (prate) switch(*prate) { 517 case 100: 518 host->speed = KW_I2C_MODE_100KHZ; 519 break; 520 case 50: 521 host->speed = KW_I2C_MODE_50KHZ; 522 break; 523 case 25: 524 host->speed = KW_I2C_MODE_25KHZ; 525 break; 526 } 527 host->irq = irq_of_parse_and_map(np, 0); 528 if (host->irq == NO_IRQ) 529 printk(KERN_WARNING 530 "low_i2c: Failed to map interrupt for %s\n", 531 np->full_name); 532 533 host->base = ioremap((*addrp), 0x1000); 534 if (host->base == NULL) { 535 printk(KERN_ERR "low_i2c: Can't map registers for %s\n", 536 np->full_name); 537 kfree(host); 538 return NULL; 539 } 540 541 /* Make sure IRQ is disabled */ 542 kw_write_reg(reg_ier, 0); 543 544 /* Request chip interrupt. We set IRQF_TIMER because we don't 545 * want that interrupt disabled between the 2 passes of driver 546 * suspend or we'll have issues running the pfuncs 547 */ 548 if (request_irq(host->irq, kw_i2c_irq, IRQF_TIMER, "keywest i2c", host)) 549 host->irq = NO_IRQ; 550 551 printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n", 552 *addrp, host->irq, np->full_name); 553 554 return host; 555 } 556 557 558 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host, 559 struct device_node *controller, 560 struct device_node *busnode, 561 int channel) 562 { 563 struct pmac_i2c_bus *bus; 564 565 bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL); 566 if (bus == NULL) 567 return; 568 569 bus->controller = of_node_get(controller); 570 bus->busnode = of_node_get(busnode); 571 bus->type = pmac_i2c_bus_keywest; 572 bus->hostdata = host; 573 bus->channel = channel; 574 bus->mode = pmac_i2c_mode_std; 575 bus->open = kw_i2c_open; 576 bus->close = kw_i2c_close; 577 bus->xfer = kw_i2c_xfer; 578 mutex_init(&bus->mutex); 579 if (controller == busnode) 580 bus->flags = pmac_i2c_multibus; 581 list_add(&bus->link, &pmac_i2c_busses); 582 583 printk(KERN_INFO " channel %d bus %s\n", channel, 584 (controller == busnode) ? "<multibus>" : busnode->full_name); 585 } 586 587 static void __init kw_i2c_probe(void) 588 { 589 struct device_node *np, *child, *parent; 590 591 /* Probe keywest-i2c busses */ 592 for_each_compatible_node(np, "i2c","keywest-i2c") { 593 struct pmac_i2c_host_kw *host; 594 int multibus, chans, i; 595 596 /* Found one, init a host structure */ 597 host = kw_i2c_host_init(np); 598 if (host == NULL) 599 continue; 600 601 /* Now check if we have a multibus setup (old style) or if we 602 * have proper bus nodes. Note that the "new" way (proper bus 603 * nodes) might cause us to not create some busses that are 604 * kept hidden in the device-tree. In the future, we might 605 * want to work around that by creating busses without a node 606 * but not for now 607 */ 608 child = of_get_next_child(np, NULL); 609 multibus = !child || strcmp(child->name, "i2c-bus"); 610 of_node_put(child); 611 612 /* For a multibus setup, we get the bus count based on the 613 * parent type 614 */ 615 if (multibus) { 616 parent = of_get_parent(np); 617 if (parent == NULL) 618 continue; 619 chans = parent->name[0] == 'u' ? 2 : 1; 620 for (i = 0; i < chans; i++) 621 kw_i2c_add(host, np, np, i); 622 } else { 623 for (child = NULL; 624 (child = of_get_next_child(np, child)) != NULL;) { 625 const u32 *reg = of_get_property(child, 626 "reg", NULL); 627 if (reg == NULL) 628 continue; 629 kw_i2c_add(host, np, child, *reg); 630 } 631 } 632 } 633 } 634 635 636 /* 637 * 638 * PMU implementation 639 * 640 */ 641 642 #ifdef CONFIG_ADB_PMU 643 644 /* 645 * i2c command block to the PMU 646 */ 647 struct pmu_i2c_hdr { 648 u8 bus; 649 u8 mode; 650 u8 bus2; 651 u8 address; 652 u8 sub_addr; 653 u8 comb_addr; 654 u8 count; 655 u8 data[]; 656 }; 657 658 static void pmu_i2c_complete(struct adb_request *req) 659 { 660 complete(req->arg); 661 } 662 663 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 664 u32 subaddr, u8 *data, int len) 665 { 666 struct adb_request *req = bus->hostdata; 667 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1]; 668 struct completion comp; 669 int read = addrdir & 1; 670 int retry; 671 int rc = 0; 672 673 /* For now, limit ourselves to 16 bytes transfers */ 674 if (len > 16) 675 return -EINVAL; 676 677 init_completion(&comp); 678 679 for (retry = 0; retry < 16; retry++) { 680 memset(req, 0, sizeof(struct adb_request)); 681 hdr->bus = bus->channel; 682 hdr->count = len; 683 684 switch(bus->mode) { 685 case pmac_i2c_mode_std: 686 if (subsize != 0) 687 return -EINVAL; 688 hdr->address = addrdir; 689 hdr->mode = PMU_I2C_MODE_SIMPLE; 690 break; 691 case pmac_i2c_mode_stdsub: 692 case pmac_i2c_mode_combined: 693 if (subsize != 1) 694 return -EINVAL; 695 hdr->address = addrdir & 0xfe; 696 hdr->comb_addr = addrdir; 697 hdr->sub_addr = subaddr; 698 if (bus->mode == pmac_i2c_mode_stdsub) 699 hdr->mode = PMU_I2C_MODE_STDSUB; 700 else 701 hdr->mode = PMU_I2C_MODE_COMBINED; 702 break; 703 default: 704 return -EINVAL; 705 } 706 707 INIT_COMPLETION(comp); 708 req->data[0] = PMU_I2C_CMD; 709 req->reply[0] = 0xff; 710 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1; 711 req->done = pmu_i2c_complete; 712 req->arg = ∁ 713 if (!read && len) { 714 memcpy(hdr->data, data, len); 715 req->nbytes += len; 716 } 717 rc = pmu_queue_request(req); 718 if (rc) 719 return rc; 720 wait_for_completion(&comp); 721 if (req->reply[0] == PMU_I2C_STATUS_OK) 722 break; 723 msleep(15); 724 } 725 if (req->reply[0] != PMU_I2C_STATUS_OK) 726 return -EIO; 727 728 for (retry = 0; retry < 16; retry++) { 729 memset(req, 0, sizeof(struct adb_request)); 730 731 /* I know that looks like a lot, slow as hell, but darwin 732 * does it so let's be on the safe side for now 733 */ 734 msleep(15); 735 736 hdr->bus = PMU_I2C_BUS_STATUS; 737 738 INIT_COMPLETION(comp); 739 req->data[0] = PMU_I2C_CMD; 740 req->reply[0] = 0xff; 741 req->nbytes = 2; 742 req->done = pmu_i2c_complete; 743 req->arg = ∁ 744 rc = pmu_queue_request(req); 745 if (rc) 746 return rc; 747 wait_for_completion(&comp); 748 749 if (req->reply[0] == PMU_I2C_STATUS_OK && !read) 750 return 0; 751 if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) { 752 int rlen = req->reply_len - 1; 753 754 if (rlen != len) { 755 printk(KERN_WARNING "low_i2c: PMU returned %d" 756 " bytes, expected %d !\n", rlen, len); 757 return -EIO; 758 } 759 if (len) 760 memcpy(data, &req->reply[1], len); 761 return 0; 762 } 763 } 764 return -EIO; 765 } 766 767 static void __init pmu_i2c_probe(void) 768 { 769 struct pmac_i2c_bus *bus; 770 struct device_node *busnode; 771 int channel, sz; 772 773 if (!pmu_present()) 774 return; 775 776 /* There might or might not be a "pmu-i2c" node, we use that 777 * or via-pmu itself, whatever we find. I haven't seen a machine 778 * with separate bus nodes, so we assume a multibus setup 779 */ 780 busnode = of_find_node_by_name(NULL, "pmu-i2c"); 781 if (busnode == NULL) 782 busnode = of_find_node_by_name(NULL, "via-pmu"); 783 if (busnode == NULL) 784 return; 785 786 printk(KERN_INFO "PMU i2c %s\n", busnode->full_name); 787 788 /* 789 * We add bus 1 and 2 only for now, bus 0 is "special" 790 */ 791 for (channel = 1; channel <= 2; channel++) { 792 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request); 793 bus = kzalloc(sz, GFP_KERNEL); 794 if (bus == NULL) 795 return; 796 797 bus->controller = busnode; 798 bus->busnode = busnode; 799 bus->type = pmac_i2c_bus_pmu; 800 bus->channel = channel; 801 bus->mode = pmac_i2c_mode_std; 802 bus->hostdata = bus + 1; 803 bus->xfer = pmu_i2c_xfer; 804 mutex_init(&bus->mutex); 805 bus->flags = pmac_i2c_multibus; 806 list_add(&bus->link, &pmac_i2c_busses); 807 808 printk(KERN_INFO " channel %d bus <multibus>\n", channel); 809 } 810 } 811 812 #endif /* CONFIG_ADB_PMU */ 813 814 815 /* 816 * 817 * SMU implementation 818 * 819 */ 820 821 #ifdef CONFIG_PMAC_SMU 822 823 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc) 824 { 825 complete(misc); 826 } 827 828 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 829 u32 subaddr, u8 *data, int len) 830 { 831 struct smu_i2c_cmd *cmd = bus->hostdata; 832 struct completion comp; 833 int read = addrdir & 1; 834 int rc = 0; 835 836 if ((read && len > SMU_I2C_READ_MAX) || 837 ((!read) && len > SMU_I2C_WRITE_MAX)) 838 return -EINVAL; 839 840 memset(cmd, 0, sizeof(struct smu_i2c_cmd)); 841 cmd->info.bus = bus->channel; 842 cmd->info.devaddr = addrdir; 843 cmd->info.datalen = len; 844 845 switch(bus->mode) { 846 case pmac_i2c_mode_std: 847 if (subsize != 0) 848 return -EINVAL; 849 cmd->info.type = SMU_I2C_TRANSFER_SIMPLE; 850 break; 851 case pmac_i2c_mode_stdsub: 852 case pmac_i2c_mode_combined: 853 if (subsize > 3 || subsize < 1) 854 return -EINVAL; 855 cmd->info.sublen = subsize; 856 /* that's big-endian only but heh ! */ 857 memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize), 858 subsize); 859 if (bus->mode == pmac_i2c_mode_stdsub) 860 cmd->info.type = SMU_I2C_TRANSFER_STDSUB; 861 else 862 cmd->info.type = SMU_I2C_TRANSFER_COMBINED; 863 break; 864 default: 865 return -EINVAL; 866 } 867 if (!read && len) 868 memcpy(cmd->info.data, data, len); 869 870 init_completion(&comp); 871 cmd->done = smu_i2c_complete; 872 cmd->misc = ∁ 873 rc = smu_queue_i2c(cmd); 874 if (rc < 0) 875 return rc; 876 wait_for_completion(&comp); 877 rc = cmd->status; 878 879 if (read && len) 880 memcpy(data, cmd->info.data, len); 881 return rc < 0 ? rc : 0; 882 } 883 884 static void __init smu_i2c_probe(void) 885 { 886 struct device_node *controller, *busnode; 887 struct pmac_i2c_bus *bus; 888 const u32 *reg; 889 int sz; 890 891 if (!smu_present()) 892 return; 893 894 controller = of_find_node_by_name(NULL, "smu-i2c-control"); 895 if (controller == NULL) 896 controller = of_find_node_by_name(NULL, "smu"); 897 if (controller == NULL) 898 return; 899 900 printk(KERN_INFO "SMU i2c %s\n", controller->full_name); 901 902 /* Look for childs, note that they might not be of the right 903 * type as older device trees mix i2c busses and other thigns 904 * at the same level 905 */ 906 for (busnode = NULL; 907 (busnode = of_get_next_child(controller, busnode)) != NULL;) { 908 if (strcmp(busnode->type, "i2c") && 909 strcmp(busnode->type, "i2c-bus")) 910 continue; 911 reg = of_get_property(busnode, "reg", NULL); 912 if (reg == NULL) 913 continue; 914 915 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd); 916 bus = kzalloc(sz, GFP_KERNEL); 917 if (bus == NULL) 918 return; 919 920 bus->controller = controller; 921 bus->busnode = of_node_get(busnode); 922 bus->type = pmac_i2c_bus_smu; 923 bus->channel = *reg; 924 bus->mode = pmac_i2c_mode_std; 925 bus->hostdata = bus + 1; 926 bus->xfer = smu_i2c_xfer; 927 mutex_init(&bus->mutex); 928 bus->flags = 0; 929 list_add(&bus->link, &pmac_i2c_busses); 930 931 printk(KERN_INFO " channel %x bus %s\n", 932 bus->channel, busnode->full_name); 933 } 934 } 935 936 #endif /* CONFIG_PMAC_SMU */ 937 938 /* 939 * 940 * Core code 941 * 942 */ 943 944 945 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node) 946 { 947 struct device_node *p = of_node_get(node); 948 struct device_node *prev = NULL; 949 struct pmac_i2c_bus *bus; 950 951 while(p) { 952 list_for_each_entry(bus, &pmac_i2c_busses, link) { 953 if (p == bus->busnode) { 954 if (prev && bus->flags & pmac_i2c_multibus) { 955 const u32 *reg; 956 reg = of_get_property(prev, "reg", 957 NULL); 958 if (!reg) 959 continue; 960 if (((*reg) >> 8) != bus->channel) 961 continue; 962 } 963 of_node_put(p); 964 of_node_put(prev); 965 return bus; 966 } 967 } 968 of_node_put(prev); 969 prev = p; 970 p = of_get_parent(p); 971 } 972 return NULL; 973 } 974 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus); 975 976 u8 pmac_i2c_get_dev_addr(struct device_node *device) 977 { 978 const u32 *reg = of_get_property(device, "reg", NULL); 979 980 if (reg == NULL) 981 return 0; 982 983 return (*reg) & 0xff; 984 } 985 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr); 986 987 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus) 988 { 989 return bus->controller; 990 } 991 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller); 992 993 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus) 994 { 995 return bus->busnode; 996 } 997 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node); 998 999 int pmac_i2c_get_type(struct pmac_i2c_bus *bus) 1000 { 1001 return bus->type; 1002 } 1003 EXPORT_SYMBOL_GPL(pmac_i2c_get_type); 1004 1005 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus) 1006 { 1007 return bus->flags; 1008 } 1009 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags); 1010 1011 int pmac_i2c_get_channel(struct pmac_i2c_bus *bus) 1012 { 1013 return bus->channel; 1014 } 1015 EXPORT_SYMBOL_GPL(pmac_i2c_get_channel); 1016 1017 1018 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus) 1019 { 1020 return &bus->adapter; 1021 } 1022 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter); 1023 1024 struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter) 1025 { 1026 struct pmac_i2c_bus *bus; 1027 1028 list_for_each_entry(bus, &pmac_i2c_busses, link) 1029 if (&bus->adapter == adapter) 1030 return bus; 1031 return NULL; 1032 } 1033 EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus); 1034 1035 int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter) 1036 { 1037 struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev); 1038 1039 if (bus == NULL) 1040 return 0; 1041 return (&bus->adapter == adapter); 1042 } 1043 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter); 1044 1045 int pmac_low_i2c_lock(struct device_node *np) 1046 { 1047 struct pmac_i2c_bus *bus, *found = NULL; 1048 1049 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1050 if (np == bus->controller) { 1051 found = bus; 1052 break; 1053 } 1054 } 1055 if (!found) 1056 return -ENODEV; 1057 return pmac_i2c_open(bus, 0); 1058 } 1059 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock); 1060 1061 int pmac_low_i2c_unlock(struct device_node *np) 1062 { 1063 struct pmac_i2c_bus *bus, *found = NULL; 1064 1065 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1066 if (np == bus->controller) { 1067 found = bus; 1068 break; 1069 } 1070 } 1071 if (!found) 1072 return -ENODEV; 1073 pmac_i2c_close(bus); 1074 return 0; 1075 } 1076 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock); 1077 1078 1079 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled) 1080 { 1081 int rc; 1082 1083 mutex_lock(&bus->mutex); 1084 bus->polled = polled || pmac_i2c_force_poll; 1085 bus->opened = 1; 1086 bus->mode = pmac_i2c_mode_std; 1087 if (bus->open && (rc = bus->open(bus)) != 0) { 1088 bus->opened = 0; 1089 mutex_unlock(&bus->mutex); 1090 return rc; 1091 } 1092 return 0; 1093 } 1094 EXPORT_SYMBOL_GPL(pmac_i2c_open); 1095 1096 void pmac_i2c_close(struct pmac_i2c_bus *bus) 1097 { 1098 WARN_ON(!bus->opened); 1099 if (bus->close) 1100 bus->close(bus); 1101 bus->opened = 0; 1102 mutex_unlock(&bus->mutex); 1103 } 1104 EXPORT_SYMBOL_GPL(pmac_i2c_close); 1105 1106 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode) 1107 { 1108 WARN_ON(!bus->opened); 1109 1110 /* Report me if you see the error below as there might be a new 1111 * "combined4" mode that I need to implement for the SMU bus 1112 */ 1113 if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) { 1114 printk(KERN_ERR "low_i2c: Invalid mode %d requested on" 1115 " bus %s !\n", mode, bus->busnode->full_name); 1116 return -EINVAL; 1117 } 1118 bus->mode = mode; 1119 1120 return 0; 1121 } 1122 EXPORT_SYMBOL_GPL(pmac_i2c_setmode); 1123 1124 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 1125 u32 subaddr, u8 *data, int len) 1126 { 1127 int rc; 1128 1129 WARN_ON(!bus->opened); 1130 1131 DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x," 1132 " %d bytes, bus %s\n", bus->channel, addrdir, bus->mode, subsize, 1133 subaddr, len, bus->busnode->full_name); 1134 1135 rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len); 1136 1137 #ifdef DEBUG 1138 if (rc) 1139 DBG("xfer error %d\n", rc); 1140 #endif 1141 return rc; 1142 } 1143 EXPORT_SYMBOL_GPL(pmac_i2c_xfer); 1144 1145 /* some quirks for platform function decoding */ 1146 enum { 1147 pmac_i2c_quirk_invmask = 0x00000001u, 1148 pmac_i2c_quirk_skip = 0x00000002u, 1149 }; 1150 1151 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev, 1152 int quirks)) 1153 { 1154 struct pmac_i2c_bus *bus; 1155 struct device_node *np; 1156 static struct whitelist_ent { 1157 char *name; 1158 char *compatible; 1159 int quirks; 1160 } whitelist[] = { 1161 /* XXX Study device-tree's & apple drivers are get the quirks 1162 * right ! 1163 */ 1164 /* Workaround: It seems that running the clockspreading 1165 * properties on the eMac will cause lockups during boot. 1166 * The machine seems to work fine without that. So for now, 1167 * let's make sure i2c-hwclock doesn't match about "imic" 1168 * clocks and we'll figure out if we really need to do 1169 * something special about those later. 1170 */ 1171 { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip }, 1172 { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip }, 1173 { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask }, 1174 { "i2c-cpu-voltage", NULL, 0}, 1175 { "temp-monitor", NULL, 0 }, 1176 { "supply-monitor", NULL, 0 }, 1177 { NULL, NULL, 0 }, 1178 }; 1179 1180 /* Only some devices need to have platform functions instanciated 1181 * here. For now, we have a table. Others, like 9554 i2c GPIOs used 1182 * on Xserve, if we ever do a driver for them, will use their own 1183 * platform function instance 1184 */ 1185 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1186 for (np = NULL; 1187 (np = of_get_next_child(bus->busnode, np)) != NULL;) { 1188 struct whitelist_ent *p; 1189 /* If multibus, check if device is on that bus */ 1190 if (bus->flags & pmac_i2c_multibus) 1191 if (bus != pmac_i2c_find_bus(np)) 1192 continue; 1193 for (p = whitelist; p->name != NULL; p++) { 1194 if (strcmp(np->name, p->name)) 1195 continue; 1196 if (p->compatible && 1197 !of_device_is_compatible(np, p->compatible)) 1198 continue; 1199 if (p->quirks & pmac_i2c_quirk_skip) 1200 break; 1201 callback(np, p->quirks); 1202 break; 1203 } 1204 } 1205 } 1206 } 1207 1208 #define MAX_I2C_DATA 64 1209 1210 struct pmac_i2c_pf_inst 1211 { 1212 struct pmac_i2c_bus *bus; 1213 u8 addr; 1214 u8 buffer[MAX_I2C_DATA]; 1215 u8 scratch[MAX_I2C_DATA]; 1216 int bytes; 1217 int quirks; 1218 }; 1219 1220 static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args) 1221 { 1222 struct pmac_i2c_pf_inst *inst; 1223 struct pmac_i2c_bus *bus; 1224 1225 bus = pmac_i2c_find_bus(func->node); 1226 if (bus == NULL) { 1227 printk(KERN_ERR "low_i2c: Can't find bus for %s (pfunc)\n", 1228 func->node->full_name); 1229 return NULL; 1230 } 1231 if (pmac_i2c_open(bus, 0)) { 1232 printk(KERN_ERR "low_i2c: Can't open i2c bus for %s (pfunc)\n", 1233 func->node->full_name); 1234 return NULL; 1235 } 1236 1237 /* XXX might need GFP_ATOMIC when called during the suspend process, 1238 * but then, there are already lots of issues with suspending when 1239 * near OOM that need to be resolved, the allocator itself should 1240 * probably make GFP_NOIO implicit during suspend 1241 */ 1242 inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL); 1243 if (inst == NULL) { 1244 pmac_i2c_close(bus); 1245 return NULL; 1246 } 1247 inst->bus = bus; 1248 inst->addr = pmac_i2c_get_dev_addr(func->node); 1249 inst->quirks = (int)(long)func->driver_data; 1250 return inst; 1251 } 1252 1253 static void pmac_i2c_do_end(struct pmf_function *func, void *instdata) 1254 { 1255 struct pmac_i2c_pf_inst *inst = instdata; 1256 1257 if (inst == NULL) 1258 return; 1259 pmac_i2c_close(inst->bus); 1260 if (inst) 1261 kfree(inst); 1262 } 1263 1264 static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len) 1265 { 1266 struct pmac_i2c_pf_inst *inst = instdata; 1267 1268 inst->bytes = len; 1269 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0, 1270 inst->buffer, len); 1271 } 1272 1273 static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data) 1274 { 1275 struct pmac_i2c_pf_inst *inst = instdata; 1276 1277 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0, 1278 (u8 *)data, len); 1279 } 1280 1281 /* This function is used to do the masking & OR'ing for the "rmw" type 1282 * callbacks. Ze should apply the mask and OR in the values in the 1283 * buffer before writing back. The problem is that it seems that 1284 * various darwin drivers implement the mask/or differently, thus 1285 * we need to check the quirks first 1286 */ 1287 static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst, 1288 u32 len, const u8 *mask, const u8 *val) 1289 { 1290 int i; 1291 1292 if (inst->quirks & pmac_i2c_quirk_invmask) { 1293 for (i = 0; i < len; i ++) 1294 inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i]; 1295 } else { 1296 for (i = 0; i < len; i ++) 1297 inst->scratch[i] = (inst->buffer[i] & ~mask[i]) 1298 | (val[i] & mask[i]); 1299 } 1300 } 1301 1302 static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen, 1303 u32 totallen, const u8 *maskdata, 1304 const u8 *valuedata) 1305 { 1306 struct pmac_i2c_pf_inst *inst = instdata; 1307 1308 if (masklen > inst->bytes || valuelen > inst->bytes || 1309 totallen > inst->bytes || valuelen > masklen) 1310 return -EINVAL; 1311 1312 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata); 1313 1314 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0, 1315 inst->scratch, totallen); 1316 } 1317 1318 static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len) 1319 { 1320 struct pmac_i2c_pf_inst *inst = instdata; 1321 1322 inst->bytes = len; 1323 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr, 1324 inst->buffer, len); 1325 } 1326 1327 static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len, 1328 const u8 *data) 1329 { 1330 struct pmac_i2c_pf_inst *inst = instdata; 1331 1332 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1, 1333 subaddr, (u8 *)data, len); 1334 } 1335 1336 static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode) 1337 { 1338 struct pmac_i2c_pf_inst *inst = instdata; 1339 1340 return pmac_i2c_setmode(inst->bus, mode); 1341 } 1342 1343 static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen, 1344 u32 valuelen, u32 totallen, const u8 *maskdata, 1345 const u8 *valuedata) 1346 { 1347 struct pmac_i2c_pf_inst *inst = instdata; 1348 1349 if (masklen > inst->bytes || valuelen > inst->bytes || 1350 totallen > inst->bytes || valuelen > masklen) 1351 return -EINVAL; 1352 1353 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata); 1354 1355 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1, 1356 subaddr, inst->scratch, totallen); 1357 } 1358 1359 static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len, 1360 const u8 *maskdata, 1361 const u8 *valuedata) 1362 { 1363 struct pmac_i2c_pf_inst *inst = instdata; 1364 int i, match; 1365 1366 /* Get return value pointer, it's assumed to be a u32 */ 1367 if (!args || !args->count || !args->u[0].p) 1368 return -EINVAL; 1369 1370 /* Check buffer */ 1371 if (len > inst->bytes) 1372 return -EINVAL; 1373 1374 for (i = 0, match = 1; match && i < len; i ++) 1375 if ((inst->buffer[i] & maskdata[i]) != valuedata[i]) 1376 match = 0; 1377 *args->u[0].p = match; 1378 return 0; 1379 } 1380 1381 static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration) 1382 { 1383 msleep((duration + 999) / 1000); 1384 return 0; 1385 } 1386 1387 1388 static struct pmf_handlers pmac_i2c_pfunc_handlers = { 1389 .begin = pmac_i2c_do_begin, 1390 .end = pmac_i2c_do_end, 1391 .read_i2c = pmac_i2c_do_read, 1392 .write_i2c = pmac_i2c_do_write, 1393 .rmw_i2c = pmac_i2c_do_rmw, 1394 .read_i2c_sub = pmac_i2c_do_read_sub, 1395 .write_i2c_sub = pmac_i2c_do_write_sub, 1396 .rmw_i2c_sub = pmac_i2c_do_rmw_sub, 1397 .set_i2c_mode = pmac_i2c_do_set_mode, 1398 .mask_and_compare = pmac_i2c_do_mask_and_comp, 1399 .delay = pmac_i2c_do_delay, 1400 }; 1401 1402 static void __init pmac_i2c_dev_create(struct device_node *np, int quirks) 1403 { 1404 DBG("dev_create(%s)\n", np->full_name); 1405 1406 pmf_register_driver(np, &pmac_i2c_pfunc_handlers, 1407 (void *)(long)quirks); 1408 } 1409 1410 static void __init pmac_i2c_dev_init(struct device_node *np, int quirks) 1411 { 1412 DBG("dev_create(%s)\n", np->full_name); 1413 1414 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL); 1415 } 1416 1417 static void pmac_i2c_dev_suspend(struct device_node *np, int quirks) 1418 { 1419 DBG("dev_suspend(%s)\n", np->full_name); 1420 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL); 1421 } 1422 1423 static void pmac_i2c_dev_resume(struct device_node *np, int quirks) 1424 { 1425 DBG("dev_resume(%s)\n", np->full_name); 1426 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL); 1427 } 1428 1429 void pmac_pfunc_i2c_suspend(void) 1430 { 1431 pmac_i2c_devscan(pmac_i2c_dev_suspend); 1432 } 1433 1434 void pmac_pfunc_i2c_resume(void) 1435 { 1436 pmac_i2c_devscan(pmac_i2c_dev_resume); 1437 } 1438 1439 /* 1440 * Initialize us: probe all i2c busses on the machine, instantiate 1441 * busses and platform functions as needed. 1442 */ 1443 /* This is non-static as it might be called early by smp code */ 1444 int __init pmac_i2c_init(void) 1445 { 1446 static int i2c_inited; 1447 1448 if (i2c_inited) 1449 return 0; 1450 i2c_inited = 1; 1451 1452 /* Probe keywest-i2c busses */ 1453 kw_i2c_probe(); 1454 1455 #ifdef CONFIG_ADB_PMU 1456 /* Probe PMU i2c busses */ 1457 pmu_i2c_probe(); 1458 #endif 1459 1460 #ifdef CONFIG_PMAC_SMU 1461 /* Probe SMU i2c busses */ 1462 smu_i2c_probe(); 1463 #endif 1464 1465 /* Now add plaform functions for some known devices */ 1466 pmac_i2c_devscan(pmac_i2c_dev_create); 1467 1468 return 0; 1469 } 1470 machine_arch_initcall(powermac, pmac_i2c_init); 1471 1472 /* Since pmac_i2c_init can be called too early for the platform device 1473 * registration, we need to do it at a later time. In our case, subsys 1474 * happens to fit well, though I agree it's a bit of a hack... 1475 */ 1476 static int __init pmac_i2c_create_platform_devices(void) 1477 { 1478 struct pmac_i2c_bus *bus; 1479 int i = 0; 1480 1481 /* In the case where we are initialized from smp_init(), we must 1482 * not use the timer (and thus the irq). It's safe from now on 1483 * though 1484 */ 1485 pmac_i2c_force_poll = 0; 1486 1487 /* Create platform devices */ 1488 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1489 bus->platform_dev = 1490 platform_device_alloc("i2c-powermac", i++); 1491 if (bus->platform_dev == NULL) 1492 return -ENOMEM; 1493 bus->platform_dev->dev.platform_data = bus; 1494 platform_device_add(bus->platform_dev); 1495 } 1496 1497 /* Now call platform "init" functions */ 1498 pmac_i2c_devscan(pmac_i2c_dev_init); 1499 1500 return 0; 1501 } 1502 machine_subsys_initcall(powermac, pmac_i2c_create_platform_devices); 1503