xref: /openbmc/linux/arch/powerpc/platforms/powermac/low_i2c.c (revision 8fa5723aa7e053d498336b48448b292fc2e0458b)
1 /*
2  * arch/powerpc/platforms/powermac/low_i2c.c
3  *
4  *  Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org)
5  *
6  *  This program is free software; you can redistribute it and/or
7  *  modify it under the terms of the GNU General Public License
8  *  as published by the Free Software Foundation; either version
9  *  2 of the License, or (at your option) any later version.
10  *
11  * The linux i2c layer isn't completely suitable for our needs for various
12  * reasons ranging from too late initialisation to semantics not perfectly
13  * matching some requirements of the apple platform functions etc...
14  *
15  * This file thus provides a simple low level unified i2c interface for
16  * powermac that covers the various types of i2c busses used in Apple machines.
17  * For now, keywest, PMU and SMU, though we could add Cuda, or other bit
18  * banging busses found on older chipstes in earlier machines if we ever need
19  * one of them.
20  *
21  * The drivers in this file are synchronous/blocking. In addition, the
22  * keywest one is fairly slow due to the use of msleep instead of interrupts
23  * as the interrupt is currently used by i2c-keywest. In the long run, we
24  * might want to get rid of those high-level interfaces to linux i2c layer
25  * either completely (converting all drivers) or replacing them all with a
26  * single stub driver on top of this one. Once done, the interrupt will be
27  * available for our use.
28  */
29 
30 #undef DEBUG
31 #undef DEBUG_LOW
32 
33 #include <linux/types.h>
34 #include <linux/sched.h>
35 #include <linux/init.h>
36 #include <linux/module.h>
37 #include <linux/adb.h>
38 #include <linux/pmu.h>
39 #include <linux/delay.h>
40 #include <linux/completion.h>
41 #include <linux/platform_device.h>
42 #include <linux/interrupt.h>
43 #include <linux/timer.h>
44 #include <linux/mutex.h>
45 #include <asm/keylargo.h>
46 #include <asm/uninorth.h>
47 #include <asm/io.h>
48 #include <asm/prom.h>
49 #include <asm/machdep.h>
50 #include <asm/smu.h>
51 #include <asm/pmac_pfunc.h>
52 #include <asm/pmac_low_i2c.h>
53 
54 #ifdef DEBUG
55 #define DBG(x...) do {\
56 		printk(KERN_DEBUG "low_i2c:" x);	\
57 	} while(0)
58 #else
59 #define DBG(x...)
60 #endif
61 
62 #ifdef DEBUG_LOW
63 #define DBG_LOW(x...) do {\
64 		printk(KERN_DEBUG "low_i2c:" x);	\
65 	} while(0)
66 #else
67 #define DBG_LOW(x...)
68 #endif
69 
70 
71 static int pmac_i2c_force_poll = 1;
72 
73 /*
74  * A bus structure. Each bus in the system has such a structure associated.
75  */
76 struct pmac_i2c_bus
77 {
78 	struct list_head	link;
79 	struct device_node	*controller;
80 	struct device_node	*busnode;
81 	int			type;
82 	int			flags;
83 	struct i2c_adapter	*adapter;
84 	void			*hostdata;
85 	int			channel;	/* some hosts have multiple */
86 	int			mode;		/* current mode */
87 	struct mutex		mutex;
88 	int			opened;
89 	int			polled;		/* open mode */
90 	struct platform_device	*platform_dev;
91 
92 	/* ops */
93 	int (*open)(struct pmac_i2c_bus *bus);
94 	void (*close)(struct pmac_i2c_bus *bus);
95 	int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
96 		    u32 subaddr, u8 *data, int len);
97 };
98 
99 static LIST_HEAD(pmac_i2c_busses);
100 
101 /*
102  * Keywest implementation
103  */
104 
105 struct pmac_i2c_host_kw
106 {
107 	struct mutex		mutex;		/* Access mutex for use by
108 						 * i2c-keywest */
109 	void __iomem		*base;		/* register base address */
110 	int			bsteps;		/* register stepping */
111 	int			speed;		/* speed */
112 	int			irq;
113 	u8			*data;
114 	unsigned		len;
115 	int			state;
116 	int			rw;
117 	int			polled;
118 	int			result;
119 	struct completion	complete;
120 	spinlock_t		lock;
121 	struct timer_list	timeout_timer;
122 };
123 
124 /* Register indices */
125 typedef enum {
126 	reg_mode = 0,
127 	reg_control,
128 	reg_status,
129 	reg_isr,
130 	reg_ier,
131 	reg_addr,
132 	reg_subaddr,
133 	reg_data
134 } reg_t;
135 
136 /* The Tumbler audio equalizer can be really slow sometimes */
137 #define KW_POLL_TIMEOUT		(2*HZ)
138 
139 /* Mode register */
140 #define KW_I2C_MODE_100KHZ	0x00
141 #define KW_I2C_MODE_50KHZ	0x01
142 #define KW_I2C_MODE_25KHZ	0x02
143 #define KW_I2C_MODE_DUMB	0x00
144 #define KW_I2C_MODE_STANDARD	0x04
145 #define KW_I2C_MODE_STANDARDSUB	0x08
146 #define KW_I2C_MODE_COMBINED	0x0C
147 #define KW_I2C_MODE_MODE_MASK	0x0C
148 #define KW_I2C_MODE_CHAN_MASK	0xF0
149 
150 /* Control register */
151 #define KW_I2C_CTL_AAK		0x01
152 #define KW_I2C_CTL_XADDR	0x02
153 #define KW_I2C_CTL_STOP		0x04
154 #define KW_I2C_CTL_START	0x08
155 
156 /* Status register */
157 #define KW_I2C_STAT_BUSY	0x01
158 #define KW_I2C_STAT_LAST_AAK	0x02
159 #define KW_I2C_STAT_LAST_RW	0x04
160 #define KW_I2C_STAT_SDA		0x08
161 #define KW_I2C_STAT_SCL		0x10
162 
163 /* IER & ISR registers */
164 #define KW_I2C_IRQ_DATA		0x01
165 #define KW_I2C_IRQ_ADDR		0x02
166 #define KW_I2C_IRQ_STOP		0x04
167 #define KW_I2C_IRQ_START	0x08
168 #define KW_I2C_IRQ_MASK		0x0F
169 
170 /* State machine states */
171 enum {
172 	state_idle,
173 	state_addr,
174 	state_read,
175 	state_write,
176 	state_stop,
177 	state_dead
178 };
179 
180 #define WRONG_STATE(name) do {\
181 		printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \
182 		       "(isr: %02x)\n",	\
183 		       name, __kw_state_names[host->state], isr); \
184 	} while(0)
185 
186 static const char *__kw_state_names[] = {
187 	"state_idle",
188 	"state_addr",
189 	"state_read",
190 	"state_write",
191 	"state_stop",
192 	"state_dead"
193 };
194 
195 static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg)
196 {
197 	return readb(host->base + (((unsigned int)reg) << host->bsteps));
198 }
199 
200 static inline void __kw_write_reg(struct pmac_i2c_host_kw *host,
201 				  reg_t reg, u8 val)
202 {
203 	writeb(val, host->base + (((unsigned)reg) << host->bsteps));
204 	(void)__kw_read_reg(host, reg_subaddr);
205 }
206 
207 #define kw_write_reg(reg, val)	__kw_write_reg(host, reg, val)
208 #define kw_read_reg(reg)	__kw_read_reg(host, reg)
209 
210 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
211 {
212 	int i, j;
213 	u8 isr;
214 
215 	for (i = 0; i < 1000; i++) {
216 		isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
217 		if (isr != 0)
218 			return isr;
219 
220 		/* This code is used with the timebase frozen, we cannot rely
221 		 * on udelay nor schedule when in polled mode !
222 		 * For now, just use a bogus loop....
223 		 */
224 		if (host->polled) {
225 			for (j = 1; j < 100000; j++)
226 				mb();
227 		} else
228 			msleep(1);
229 	}
230 	return isr;
231 }
232 
233 static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result)
234 {
235 	kw_write_reg(reg_control, KW_I2C_CTL_STOP);
236 	host->state = state_stop;
237 	host->result = result;
238 }
239 
240 
241 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
242 {
243 	u8 ack;
244 
245 	DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
246 		__kw_state_names[host->state], isr);
247 
248 	if (host->state == state_idle) {
249 		printk(KERN_WARNING "low_i2c: Keywest got an out of state"
250 		       " interrupt, ignoring\n");
251 		kw_write_reg(reg_isr, isr);
252 		return;
253 	}
254 
255 	if (isr == 0) {
256 		printk(KERN_WARNING "low_i2c: Timeout in i2c transfer"
257 		       " on keywest !\n");
258 		if (host->state != state_stop) {
259 			kw_i2c_do_stop(host, -EIO);
260 			return;
261 		}
262 		ack = kw_read_reg(reg_status);
263 		if (ack & KW_I2C_STAT_BUSY)
264 			kw_write_reg(reg_status, 0);
265 		host->state = state_idle;
266 		kw_write_reg(reg_ier, 0x00);
267 		if (!host->polled)
268 			complete(&host->complete);
269 		return;
270 	}
271 
272 	if (isr & KW_I2C_IRQ_ADDR) {
273 		ack = kw_read_reg(reg_status);
274 		if (host->state != state_addr) {
275 			WRONG_STATE("KW_I2C_IRQ_ADDR");
276 			kw_i2c_do_stop(host, -EIO);
277 		}
278 		if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
279 			host->result = -ENXIO;
280 			host->state = state_stop;
281 			DBG_LOW("KW: NAK on address\n");
282 		} else {
283 			if (host->len == 0)
284 				kw_i2c_do_stop(host, 0);
285 			else if (host->rw) {
286 				host->state = state_read;
287 				if (host->len > 1)
288 					kw_write_reg(reg_control,
289 						     KW_I2C_CTL_AAK);
290 			} else {
291 				host->state = state_write;
292 				kw_write_reg(reg_data, *(host->data++));
293 				host->len--;
294 			}
295 		}
296 		kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
297 	}
298 
299 	if (isr & KW_I2C_IRQ_DATA) {
300 		if (host->state == state_read) {
301 			*(host->data++) = kw_read_reg(reg_data);
302 			host->len--;
303 			kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
304 			if (host->len == 0)
305 				host->state = state_stop;
306 			else if (host->len == 1)
307 				kw_write_reg(reg_control, 0);
308 		} else if (host->state == state_write) {
309 			ack = kw_read_reg(reg_status);
310 			if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
311 				DBG_LOW("KW: nack on data write\n");
312 				host->result = -EFBIG;
313 				host->state = state_stop;
314 			} else if (host->len) {
315 				kw_write_reg(reg_data, *(host->data++));
316 				host->len--;
317 			} else
318 				kw_i2c_do_stop(host, 0);
319 		} else {
320 			WRONG_STATE("KW_I2C_IRQ_DATA");
321 			if (host->state != state_stop)
322 				kw_i2c_do_stop(host, -EIO);
323 		}
324 		kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
325 	}
326 
327 	if (isr & KW_I2C_IRQ_STOP) {
328 		kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
329 		if (host->state != state_stop) {
330 			WRONG_STATE("KW_I2C_IRQ_STOP");
331 			host->result = -EIO;
332 		}
333 		host->state = state_idle;
334 		if (!host->polled)
335 			complete(&host->complete);
336 	}
337 
338 	/* Below should only happen in manual mode which we don't use ... */
339 	if (isr & KW_I2C_IRQ_START)
340 		kw_write_reg(reg_isr, KW_I2C_IRQ_START);
341 
342 }
343 
344 /* Interrupt handler */
345 static irqreturn_t kw_i2c_irq(int irq, void *dev_id)
346 {
347 	struct pmac_i2c_host_kw *host = dev_id;
348 	unsigned long flags;
349 
350 	spin_lock_irqsave(&host->lock, flags);
351 	del_timer(&host->timeout_timer);
352 	kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
353 	if (host->state != state_idle) {
354 		host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
355 		add_timer(&host->timeout_timer);
356 	}
357 	spin_unlock_irqrestore(&host->lock, flags);
358 	return IRQ_HANDLED;
359 }
360 
361 static void kw_i2c_timeout(unsigned long data)
362 {
363 	struct pmac_i2c_host_kw *host = (struct pmac_i2c_host_kw *)data;
364 	unsigned long flags;
365 
366 	spin_lock_irqsave(&host->lock, flags);
367 	kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
368 	if (host->state != state_idle) {
369 		host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
370 		add_timer(&host->timeout_timer);
371 	}
372 	spin_unlock_irqrestore(&host->lock, flags);
373 }
374 
375 static int kw_i2c_open(struct pmac_i2c_bus *bus)
376 {
377 	struct pmac_i2c_host_kw *host = bus->hostdata;
378 	mutex_lock(&host->mutex);
379 	return 0;
380 }
381 
382 static void kw_i2c_close(struct pmac_i2c_bus *bus)
383 {
384 	struct pmac_i2c_host_kw *host = bus->hostdata;
385 	mutex_unlock(&host->mutex);
386 }
387 
388 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
389 		       u32 subaddr, u8 *data, int len)
390 {
391 	struct pmac_i2c_host_kw *host = bus->hostdata;
392 	u8 mode_reg = host->speed;
393 	int use_irq = host->irq != NO_IRQ && !bus->polled;
394 
395 	/* Setup mode & subaddress if any */
396 	switch(bus->mode) {
397 	case pmac_i2c_mode_dumb:
398 		return -EINVAL;
399 	case pmac_i2c_mode_std:
400 		mode_reg |= KW_I2C_MODE_STANDARD;
401 		if (subsize != 0)
402 			return -EINVAL;
403 		break;
404 	case pmac_i2c_mode_stdsub:
405 		mode_reg |= KW_I2C_MODE_STANDARDSUB;
406 		if (subsize != 1)
407 			return -EINVAL;
408 		break;
409 	case pmac_i2c_mode_combined:
410 		mode_reg |= KW_I2C_MODE_COMBINED;
411 		if (subsize != 1)
412 			return -EINVAL;
413 		break;
414 	}
415 
416 	/* Setup channel & clear pending irqs */
417 	kw_write_reg(reg_isr, kw_read_reg(reg_isr));
418 	kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
419 	kw_write_reg(reg_status, 0);
420 
421 	/* Set up address and r/w bit, strip possible stale bus number from
422 	 * address top bits
423 	 */
424 	kw_write_reg(reg_addr, addrdir & 0xff);
425 
426 	/* Set up the sub address */
427 	if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
428 	    || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
429 		kw_write_reg(reg_subaddr, subaddr);
430 
431 	/* Prepare for async operations */
432 	host->data = data;
433 	host->len = len;
434 	host->state = state_addr;
435 	host->result = 0;
436 	host->rw = (addrdir & 1);
437 	host->polled = bus->polled;
438 
439 	/* Enable interrupt if not using polled mode and interrupt is
440 	 * available
441 	 */
442 	if (use_irq) {
443 		/* Clear completion */
444 		INIT_COMPLETION(host->complete);
445 		/* Ack stale interrupts */
446 		kw_write_reg(reg_isr, kw_read_reg(reg_isr));
447 		/* Arm timeout */
448 		host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
449 		add_timer(&host->timeout_timer);
450 		/* Enable emission */
451 		kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
452 	}
453 
454 	/* Start sending address */
455 	kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
456 
457 	/* Wait for completion */
458 	if (use_irq)
459 		wait_for_completion(&host->complete);
460 	else {
461 		while(host->state != state_idle) {
462 			unsigned long flags;
463 
464 			u8 isr = kw_i2c_wait_interrupt(host);
465 			spin_lock_irqsave(&host->lock, flags);
466 			kw_i2c_handle_interrupt(host, isr);
467 			spin_unlock_irqrestore(&host->lock, flags);
468 		}
469 	}
470 
471 	/* Disable emission */
472 	kw_write_reg(reg_ier, 0);
473 
474 	return host->result;
475 }
476 
477 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
478 {
479 	struct pmac_i2c_host_kw *host;
480 	const u32		*psteps, *prate, *addrp;
481 	u32			steps;
482 
483 	host = kzalloc(sizeof(struct pmac_i2c_host_kw), GFP_KERNEL);
484 	if (host == NULL) {
485 		printk(KERN_ERR "low_i2c: Can't allocate host for %s\n",
486 		       np->full_name);
487 		return NULL;
488 	}
489 
490 	/* Apple is kind enough to provide a valid AAPL,address property
491 	 * on all i2c keywest nodes so far ... we would have to fallback
492 	 * to macio parsing if that wasn't the case
493 	 */
494 	addrp = of_get_property(np, "AAPL,address", NULL);
495 	if (addrp == NULL) {
496 		printk(KERN_ERR "low_i2c: Can't find address for %s\n",
497 		       np->full_name);
498 		kfree(host);
499 		return NULL;
500 	}
501 	mutex_init(&host->mutex);
502 	init_completion(&host->complete);
503 	spin_lock_init(&host->lock);
504 	init_timer(&host->timeout_timer);
505 	host->timeout_timer.function = kw_i2c_timeout;
506 	host->timeout_timer.data = (unsigned long)host;
507 
508 	psteps = of_get_property(np, "AAPL,address-step", NULL);
509 	steps = psteps ? (*psteps) : 0x10;
510 	for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
511 		steps >>= 1;
512 	/* Select interface rate */
513 	host->speed = KW_I2C_MODE_25KHZ;
514 	prate = of_get_property(np, "AAPL,i2c-rate", NULL);
515 	if (prate) switch(*prate) {
516 	case 100:
517 		host->speed = KW_I2C_MODE_100KHZ;
518 		break;
519 	case 50:
520 		host->speed = KW_I2C_MODE_50KHZ;
521 		break;
522 	case 25:
523 		host->speed = KW_I2C_MODE_25KHZ;
524 		break;
525 	}
526 	host->irq = irq_of_parse_and_map(np, 0);
527 	if (host->irq == NO_IRQ)
528 		printk(KERN_WARNING
529 		       "low_i2c: Failed to map interrupt for %s\n",
530 		       np->full_name);
531 
532 	host->base = ioremap((*addrp), 0x1000);
533 	if (host->base == NULL) {
534 		printk(KERN_ERR "low_i2c: Can't map registers for %s\n",
535 		       np->full_name);
536 		kfree(host);
537 		return NULL;
538 	}
539 
540 	/* Make sure IRQ is disabled */
541 	kw_write_reg(reg_ier, 0);
542 
543 	/* Request chip interrupt */
544 	if (request_irq(host->irq, kw_i2c_irq, 0, "keywest i2c", host))
545 		host->irq = NO_IRQ;
546 
547 	printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n",
548 	       *addrp, host->irq, np->full_name);
549 
550 	return host;
551 }
552 
553 
554 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host,
555 			      struct device_node *controller,
556 			      struct device_node *busnode,
557 			      int channel)
558 {
559 	struct pmac_i2c_bus *bus;
560 
561 	bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL);
562 	if (bus == NULL)
563 		return;
564 
565 	bus->controller = of_node_get(controller);
566 	bus->busnode = of_node_get(busnode);
567 	bus->type = pmac_i2c_bus_keywest;
568 	bus->hostdata = host;
569 	bus->channel = channel;
570 	bus->mode = pmac_i2c_mode_std;
571 	bus->open = kw_i2c_open;
572 	bus->close = kw_i2c_close;
573 	bus->xfer = kw_i2c_xfer;
574 	mutex_init(&bus->mutex);
575 	if (controller == busnode)
576 		bus->flags = pmac_i2c_multibus;
577 	list_add(&bus->link, &pmac_i2c_busses);
578 
579 	printk(KERN_INFO " channel %d bus %s\n", channel,
580 	       (controller == busnode) ? "<multibus>" : busnode->full_name);
581 }
582 
583 static void __init kw_i2c_probe(void)
584 {
585 	struct device_node *np, *child, *parent;
586 
587 	/* Probe keywest-i2c busses */
588 	for_each_compatible_node(np, "i2c","keywest-i2c") {
589 		struct pmac_i2c_host_kw *host;
590 		int multibus, chans, i;
591 
592 		/* Found one, init a host structure */
593 		host = kw_i2c_host_init(np);
594 		if (host == NULL)
595 			continue;
596 
597 		/* Now check if we have a multibus setup (old style) or if we
598 		 * have proper bus nodes. Note that the "new" way (proper bus
599 		 * nodes) might cause us to not create some busses that are
600 		 * kept hidden in the device-tree. In the future, we might
601 		 * want to work around that by creating busses without a node
602 		 * but not for now
603 		 */
604 		child = of_get_next_child(np, NULL);
605 		multibus = !child || strcmp(child->name, "i2c-bus");
606 		of_node_put(child);
607 
608 		/* For a multibus setup, we get the bus count based on the
609 		 * parent type
610 		 */
611 		if (multibus) {
612 			parent = of_get_parent(np);
613 			if (parent == NULL)
614 				continue;
615 			chans = parent->name[0] == 'u' ? 2 : 1;
616 			for (i = 0; i < chans; i++)
617 				kw_i2c_add(host, np, np, i);
618 		} else {
619 			for (child = NULL;
620 			     (child = of_get_next_child(np, child)) != NULL;) {
621 				const u32 *reg = of_get_property(child,
622 						"reg", NULL);
623 				if (reg == NULL)
624 					continue;
625 				kw_i2c_add(host, np, child, *reg);
626 			}
627 		}
628 	}
629 }
630 
631 
632 /*
633  *
634  * PMU implementation
635  *
636  */
637 
638 #ifdef CONFIG_ADB_PMU
639 
640 /*
641  * i2c command block to the PMU
642  */
643 struct pmu_i2c_hdr {
644 	u8	bus;
645 	u8	mode;
646 	u8	bus2;
647 	u8	address;
648 	u8	sub_addr;
649 	u8	comb_addr;
650 	u8	count;
651 	u8	data[];
652 };
653 
654 static void pmu_i2c_complete(struct adb_request *req)
655 {
656 	complete(req->arg);
657 }
658 
659 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
660 			u32 subaddr, u8 *data, int len)
661 {
662 	struct adb_request *req = bus->hostdata;
663 	struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1];
664 	struct completion comp;
665 	int read = addrdir & 1;
666 	int retry;
667 	int rc = 0;
668 
669 	/* For now, limit ourselves to 16 bytes transfers */
670 	if (len > 16)
671 		return -EINVAL;
672 
673 	init_completion(&comp);
674 
675 	for (retry = 0; retry < 16; retry++) {
676 		memset(req, 0, sizeof(struct adb_request));
677 		hdr->bus = bus->channel;
678 		hdr->count = len;
679 
680 		switch(bus->mode) {
681 		case pmac_i2c_mode_std:
682 			if (subsize != 0)
683 				return -EINVAL;
684 			hdr->address = addrdir;
685 			hdr->mode = PMU_I2C_MODE_SIMPLE;
686 			break;
687 		case pmac_i2c_mode_stdsub:
688 		case pmac_i2c_mode_combined:
689 			if (subsize != 1)
690 				return -EINVAL;
691 			hdr->address = addrdir & 0xfe;
692 			hdr->comb_addr = addrdir;
693 			hdr->sub_addr = subaddr;
694 			if (bus->mode == pmac_i2c_mode_stdsub)
695 				hdr->mode = PMU_I2C_MODE_STDSUB;
696 			else
697 				hdr->mode = PMU_I2C_MODE_COMBINED;
698 			break;
699 		default:
700 			return -EINVAL;
701 		}
702 
703 		INIT_COMPLETION(comp);
704 		req->data[0] = PMU_I2C_CMD;
705 		req->reply[0] = 0xff;
706 		req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
707 		req->done = pmu_i2c_complete;
708 		req->arg = &comp;
709 		if (!read && len) {
710 			memcpy(hdr->data, data, len);
711 			req->nbytes += len;
712 		}
713 		rc = pmu_queue_request(req);
714 		if (rc)
715 			return rc;
716 		wait_for_completion(&comp);
717 		if (req->reply[0] == PMU_I2C_STATUS_OK)
718 			break;
719 		msleep(15);
720 	}
721 	if (req->reply[0] != PMU_I2C_STATUS_OK)
722 		return -EIO;
723 
724 	for (retry = 0; retry < 16; retry++) {
725 		memset(req, 0, sizeof(struct adb_request));
726 
727 		/* I know that looks like a lot, slow as hell, but darwin
728 		 * does it so let's be on the safe side for now
729 		 */
730 		msleep(15);
731 
732 		hdr->bus = PMU_I2C_BUS_STATUS;
733 
734 		INIT_COMPLETION(comp);
735 		req->data[0] = PMU_I2C_CMD;
736 		req->reply[0] = 0xff;
737 		req->nbytes = 2;
738 		req->done = pmu_i2c_complete;
739 		req->arg = &comp;
740 		rc = pmu_queue_request(req);
741 		if (rc)
742 			return rc;
743 		wait_for_completion(&comp);
744 
745 		if (req->reply[0] == PMU_I2C_STATUS_OK && !read)
746 			return 0;
747 		if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) {
748 			int rlen = req->reply_len - 1;
749 
750 			if (rlen != len) {
751 				printk(KERN_WARNING "low_i2c: PMU returned %d"
752 				       " bytes, expected %d !\n", rlen, len);
753 				return -EIO;
754 			}
755 			if (len)
756 				memcpy(data, &req->reply[1], len);
757 			return 0;
758 		}
759 	}
760 	return -EIO;
761 }
762 
763 static void __init pmu_i2c_probe(void)
764 {
765 	struct pmac_i2c_bus *bus;
766 	struct device_node *busnode;
767 	int channel, sz;
768 
769 	if (!pmu_present())
770 		return;
771 
772 	/* There might or might not be a "pmu-i2c" node, we use that
773 	 * or via-pmu itself, whatever we find. I haven't seen a machine
774 	 * with separate bus nodes, so we assume a multibus setup
775 	 */
776 	busnode = of_find_node_by_name(NULL, "pmu-i2c");
777 	if (busnode == NULL)
778 		busnode = of_find_node_by_name(NULL, "via-pmu");
779 	if (busnode == NULL)
780 		return;
781 
782 	printk(KERN_INFO "PMU i2c %s\n", busnode->full_name);
783 
784 	/*
785 	 * We add bus 1 and 2 only for now, bus 0 is "special"
786 	 */
787 	for (channel = 1; channel <= 2; channel++) {
788 		sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request);
789 		bus = kzalloc(sz, GFP_KERNEL);
790 		if (bus == NULL)
791 			return;
792 
793 		bus->controller = busnode;
794 		bus->busnode = busnode;
795 		bus->type = pmac_i2c_bus_pmu;
796 		bus->channel = channel;
797 		bus->mode = pmac_i2c_mode_std;
798 		bus->hostdata = bus + 1;
799 		bus->xfer = pmu_i2c_xfer;
800 		mutex_init(&bus->mutex);
801 		bus->flags = pmac_i2c_multibus;
802 		list_add(&bus->link, &pmac_i2c_busses);
803 
804 		printk(KERN_INFO " channel %d bus <multibus>\n", channel);
805 	}
806 }
807 
808 #endif /* CONFIG_ADB_PMU */
809 
810 
811 /*
812  *
813  * SMU implementation
814  *
815  */
816 
817 #ifdef CONFIG_PMAC_SMU
818 
819 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc)
820 {
821 	complete(misc);
822 }
823 
824 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
825 			u32 subaddr, u8 *data, int len)
826 {
827 	struct smu_i2c_cmd *cmd = bus->hostdata;
828 	struct completion comp;
829 	int read = addrdir & 1;
830 	int rc = 0;
831 
832 	if ((read && len > SMU_I2C_READ_MAX) ||
833 	    ((!read) && len > SMU_I2C_WRITE_MAX))
834 		return -EINVAL;
835 
836 	memset(cmd, 0, sizeof(struct smu_i2c_cmd));
837 	cmd->info.bus = bus->channel;
838 	cmd->info.devaddr = addrdir;
839 	cmd->info.datalen = len;
840 
841 	switch(bus->mode) {
842 	case pmac_i2c_mode_std:
843 		if (subsize != 0)
844 			return -EINVAL;
845 		cmd->info.type = SMU_I2C_TRANSFER_SIMPLE;
846 		break;
847 	case pmac_i2c_mode_stdsub:
848 	case pmac_i2c_mode_combined:
849 		if (subsize > 3 || subsize < 1)
850 			return -EINVAL;
851 		cmd->info.sublen = subsize;
852 		/* that's big-endian only but heh ! */
853 		memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize),
854 		       subsize);
855 		if (bus->mode == pmac_i2c_mode_stdsub)
856 			cmd->info.type = SMU_I2C_TRANSFER_STDSUB;
857 		else
858 			cmd->info.type = SMU_I2C_TRANSFER_COMBINED;
859 		break;
860 	default:
861 		return -EINVAL;
862 	}
863 	if (!read && len)
864 		memcpy(cmd->info.data, data, len);
865 
866 	init_completion(&comp);
867 	cmd->done = smu_i2c_complete;
868 	cmd->misc = &comp;
869 	rc = smu_queue_i2c(cmd);
870 	if (rc < 0)
871 		return rc;
872 	wait_for_completion(&comp);
873 	rc = cmd->status;
874 
875 	if (read && len)
876 		memcpy(data, cmd->info.data, len);
877 	return rc < 0 ? rc : 0;
878 }
879 
880 static void __init smu_i2c_probe(void)
881 {
882 	struct device_node *controller, *busnode;
883 	struct pmac_i2c_bus *bus;
884 	const u32 *reg;
885 	int sz;
886 
887 	if (!smu_present())
888 		return;
889 
890 	controller = of_find_node_by_name(NULL, "smu-i2c-control");
891 	if (controller == NULL)
892 		controller = of_find_node_by_name(NULL, "smu");
893 	if (controller == NULL)
894 		return;
895 
896 	printk(KERN_INFO "SMU i2c %s\n", controller->full_name);
897 
898 	/* Look for childs, note that they might not be of the right
899 	 * type as older device trees mix i2c busses and other thigns
900 	 * at the same level
901 	 */
902 	for (busnode = NULL;
903 	     (busnode = of_get_next_child(controller, busnode)) != NULL;) {
904 		if (strcmp(busnode->type, "i2c") &&
905 		    strcmp(busnode->type, "i2c-bus"))
906 			continue;
907 		reg = of_get_property(busnode, "reg", NULL);
908 		if (reg == NULL)
909 			continue;
910 
911 		sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd);
912 		bus = kzalloc(sz, GFP_KERNEL);
913 		if (bus == NULL)
914 			return;
915 
916 		bus->controller = controller;
917 		bus->busnode = of_node_get(busnode);
918 		bus->type = pmac_i2c_bus_smu;
919 		bus->channel = *reg;
920 		bus->mode = pmac_i2c_mode_std;
921 		bus->hostdata = bus + 1;
922 		bus->xfer = smu_i2c_xfer;
923 		mutex_init(&bus->mutex);
924 		bus->flags = 0;
925 		list_add(&bus->link, &pmac_i2c_busses);
926 
927 		printk(KERN_INFO " channel %x bus %s\n",
928 		       bus->channel, busnode->full_name);
929 	}
930 }
931 
932 #endif /* CONFIG_PMAC_SMU */
933 
934 /*
935  *
936  * Core code
937  *
938  */
939 
940 
941 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node)
942 {
943 	struct device_node *p = of_node_get(node);
944 	struct device_node *prev = NULL;
945 	struct pmac_i2c_bus *bus;
946 
947 	while(p) {
948 		list_for_each_entry(bus, &pmac_i2c_busses, link) {
949 			if (p == bus->busnode) {
950 				if (prev && bus->flags & pmac_i2c_multibus) {
951 					const u32 *reg;
952 					reg = of_get_property(prev, "reg",
953 								NULL);
954 					if (!reg)
955 						continue;
956 					if (((*reg) >> 8) != bus->channel)
957 						continue;
958 				}
959 				of_node_put(p);
960 				of_node_put(prev);
961 				return bus;
962 			}
963 		}
964 		of_node_put(prev);
965 		prev = p;
966 		p = of_get_parent(p);
967 	}
968 	return NULL;
969 }
970 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus);
971 
972 u8 pmac_i2c_get_dev_addr(struct device_node *device)
973 {
974 	const u32 *reg = of_get_property(device, "reg", NULL);
975 
976 	if (reg == NULL)
977 		return 0;
978 
979 	return (*reg) & 0xff;
980 }
981 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr);
982 
983 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus)
984 {
985 	return bus->controller;
986 }
987 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller);
988 
989 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus)
990 {
991 	return bus->busnode;
992 }
993 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node);
994 
995 int pmac_i2c_get_type(struct pmac_i2c_bus *bus)
996 {
997 	return bus->type;
998 }
999 EXPORT_SYMBOL_GPL(pmac_i2c_get_type);
1000 
1001 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
1002 {
1003 	return bus->flags;
1004 }
1005 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
1006 
1007 int pmac_i2c_get_channel(struct pmac_i2c_bus *bus)
1008 {
1009 	return bus->channel;
1010 }
1011 EXPORT_SYMBOL_GPL(pmac_i2c_get_channel);
1012 
1013 
1014 void pmac_i2c_attach_adapter(struct pmac_i2c_bus *bus,
1015 			     struct i2c_adapter *adapter)
1016 {
1017 	WARN_ON(bus->adapter != NULL);
1018 	bus->adapter = adapter;
1019 }
1020 EXPORT_SYMBOL_GPL(pmac_i2c_attach_adapter);
1021 
1022 void pmac_i2c_detach_adapter(struct pmac_i2c_bus *bus,
1023 			     struct i2c_adapter *adapter)
1024 {
1025 	WARN_ON(bus->adapter != adapter);
1026 	bus->adapter = NULL;
1027 }
1028 EXPORT_SYMBOL_GPL(pmac_i2c_detach_adapter);
1029 
1030 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
1031 {
1032 	return bus->adapter;
1033 }
1034 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
1035 
1036 struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter)
1037 {
1038 	struct pmac_i2c_bus *bus;
1039 
1040 	list_for_each_entry(bus, &pmac_i2c_busses, link)
1041 		if (bus->adapter == adapter)
1042 			return bus;
1043 	return NULL;
1044 }
1045 EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus);
1046 
1047 int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter)
1048 {
1049 	struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev);
1050 
1051 	if (bus == NULL)
1052 		return 0;
1053 	return (bus->adapter == adapter);
1054 }
1055 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter);
1056 
1057 int pmac_low_i2c_lock(struct device_node *np)
1058 {
1059 	struct pmac_i2c_bus *bus, *found = NULL;
1060 
1061 	list_for_each_entry(bus, &pmac_i2c_busses, link) {
1062 		if (np == bus->controller) {
1063 			found = bus;
1064 			break;
1065 		}
1066 	}
1067 	if (!found)
1068 		return -ENODEV;
1069 	return pmac_i2c_open(bus, 0);
1070 }
1071 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock);
1072 
1073 int pmac_low_i2c_unlock(struct device_node *np)
1074 {
1075 	struct pmac_i2c_bus *bus, *found = NULL;
1076 
1077 	list_for_each_entry(bus, &pmac_i2c_busses, link) {
1078 		if (np == bus->controller) {
1079 			found = bus;
1080 			break;
1081 		}
1082 	}
1083 	if (!found)
1084 		return -ENODEV;
1085 	pmac_i2c_close(bus);
1086 	return 0;
1087 }
1088 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock);
1089 
1090 
1091 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
1092 {
1093 	int rc;
1094 
1095 	mutex_lock(&bus->mutex);
1096 	bus->polled = polled || pmac_i2c_force_poll;
1097 	bus->opened = 1;
1098 	bus->mode = pmac_i2c_mode_std;
1099 	if (bus->open && (rc = bus->open(bus)) != 0) {
1100 		bus->opened = 0;
1101 		mutex_unlock(&bus->mutex);
1102 		return rc;
1103 	}
1104 	return 0;
1105 }
1106 EXPORT_SYMBOL_GPL(pmac_i2c_open);
1107 
1108 void pmac_i2c_close(struct pmac_i2c_bus *bus)
1109 {
1110 	WARN_ON(!bus->opened);
1111 	if (bus->close)
1112 		bus->close(bus);
1113 	bus->opened = 0;
1114 	mutex_unlock(&bus->mutex);
1115 }
1116 EXPORT_SYMBOL_GPL(pmac_i2c_close);
1117 
1118 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode)
1119 {
1120 	WARN_ON(!bus->opened);
1121 
1122 	/* Report me if you see the error below as there might be a new
1123 	 * "combined4" mode that I need to implement for the SMU bus
1124 	 */
1125 	if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) {
1126 		printk(KERN_ERR "low_i2c: Invalid mode %d requested on"
1127 		       " bus %s !\n", mode, bus->busnode->full_name);
1128 		return -EINVAL;
1129 	}
1130 	bus->mode = mode;
1131 
1132 	return 0;
1133 }
1134 EXPORT_SYMBOL_GPL(pmac_i2c_setmode);
1135 
1136 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
1137 		  u32 subaddr, u8 *data, int len)
1138 {
1139 	int rc;
1140 
1141 	WARN_ON(!bus->opened);
1142 
1143 	DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x,"
1144 	    " %d bytes, bus %s\n", bus->channel, addrdir, bus->mode, subsize,
1145 	    subaddr, len, bus->busnode->full_name);
1146 
1147 	rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len);
1148 
1149 #ifdef DEBUG
1150 	if (rc)
1151 		DBG("xfer error %d\n", rc);
1152 #endif
1153 	return rc;
1154 }
1155 EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
1156 
1157 /* some quirks for platform function decoding */
1158 enum {
1159 	pmac_i2c_quirk_invmask = 0x00000001u,
1160 	pmac_i2c_quirk_skip = 0x00000002u,
1161 };
1162 
1163 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
1164 					      int quirks))
1165 {
1166 	struct pmac_i2c_bus *bus;
1167 	struct device_node *np;
1168 	static struct whitelist_ent {
1169 		char *name;
1170 		char *compatible;
1171 		int quirks;
1172 	} whitelist[] = {
1173 		/* XXX Study device-tree's & apple drivers are get the quirks
1174 		 * right !
1175 		 */
1176 		/* Workaround: It seems that running the clockspreading
1177 		 * properties on the eMac will cause lockups during boot.
1178 		 * The machine seems to work fine without that. So for now,
1179 		 * let's make sure i2c-hwclock doesn't match about "imic"
1180 		 * clocks and we'll figure out if we really need to do
1181 		 * something special about those later.
1182 		 */
1183 		{ "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
1184 		{ "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
1185 		{ "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
1186 		{ "i2c-cpu-voltage", NULL, 0},
1187 		{  "temp-monitor", NULL, 0 },
1188 		{  "supply-monitor", NULL, 0 },
1189 		{ NULL, NULL, 0 },
1190 	};
1191 
1192 	/* Only some devices need to have platform functions instanciated
1193 	 * here. For now, we have a table. Others, like 9554 i2c GPIOs used
1194 	 * on Xserve, if we ever do a driver for them, will use their own
1195 	 * platform function instance
1196 	 */
1197 	list_for_each_entry(bus, &pmac_i2c_busses, link) {
1198 		for (np = NULL;
1199 		     (np = of_get_next_child(bus->busnode, np)) != NULL;) {
1200 			struct whitelist_ent *p;
1201 			/* If multibus, check if device is on that bus */
1202 			if (bus->flags & pmac_i2c_multibus)
1203 				if (bus != pmac_i2c_find_bus(np))
1204 					continue;
1205 			for (p = whitelist; p->name != NULL; p++) {
1206 				if (strcmp(np->name, p->name))
1207 					continue;
1208 				if (p->compatible &&
1209 				    !of_device_is_compatible(np, p->compatible))
1210 					continue;
1211 				if (p->quirks & pmac_i2c_quirk_skip)
1212 					break;
1213 				callback(np, p->quirks);
1214 				break;
1215 			}
1216 		}
1217 	}
1218 }
1219 
1220 #define MAX_I2C_DATA	64
1221 
1222 struct pmac_i2c_pf_inst
1223 {
1224 	struct pmac_i2c_bus	*bus;
1225 	u8			addr;
1226 	u8			buffer[MAX_I2C_DATA];
1227 	u8			scratch[MAX_I2C_DATA];
1228 	int			bytes;
1229 	int			quirks;
1230 };
1231 
1232 static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args)
1233 {
1234 	struct pmac_i2c_pf_inst *inst;
1235 	struct pmac_i2c_bus	*bus;
1236 
1237 	bus = pmac_i2c_find_bus(func->node);
1238 	if (bus == NULL) {
1239 		printk(KERN_ERR "low_i2c: Can't find bus for %s (pfunc)\n",
1240 		       func->node->full_name);
1241 		return NULL;
1242 	}
1243 	if (pmac_i2c_open(bus, 0)) {
1244 		printk(KERN_ERR "low_i2c: Can't open i2c bus for %s (pfunc)\n",
1245 		       func->node->full_name);
1246 		return NULL;
1247 	}
1248 
1249 	/* XXX might need GFP_ATOMIC when called during the suspend process,
1250 	 * but then, there are already lots of issues with suspending when
1251 	 * near OOM that need to be resolved, the allocator itself should
1252 	 * probably make GFP_NOIO implicit during suspend
1253 	 */
1254 	inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL);
1255 	if (inst == NULL) {
1256 		pmac_i2c_close(bus);
1257 		return NULL;
1258 	}
1259 	inst->bus = bus;
1260 	inst->addr = pmac_i2c_get_dev_addr(func->node);
1261 	inst->quirks = (int)(long)func->driver_data;
1262 	return inst;
1263 }
1264 
1265 static void pmac_i2c_do_end(struct pmf_function *func, void *instdata)
1266 {
1267 	struct pmac_i2c_pf_inst *inst = instdata;
1268 
1269 	if (inst == NULL)
1270 		return;
1271 	pmac_i2c_close(inst->bus);
1272 	if (inst)
1273 		kfree(inst);
1274 }
1275 
1276 static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len)
1277 {
1278 	struct pmac_i2c_pf_inst *inst = instdata;
1279 
1280 	inst->bytes = len;
1281 	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0,
1282 			     inst->buffer, len);
1283 }
1284 
1285 static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data)
1286 {
1287 	struct pmac_i2c_pf_inst *inst = instdata;
1288 
1289 	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1290 			     (u8 *)data, len);
1291 }
1292 
1293 /* This function is used to do the masking & OR'ing for the "rmw" type
1294  * callbacks. Ze should apply the mask and OR in the values in the
1295  * buffer before writing back. The problem is that it seems that
1296  * various darwin drivers implement the mask/or differently, thus
1297  * we need to check the quirks first
1298  */
1299 static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst,
1300 				  u32 len, const u8 *mask, const u8 *val)
1301 {
1302 	int i;
1303 
1304 	if (inst->quirks & pmac_i2c_quirk_invmask) {
1305 		for (i = 0; i < len; i ++)
1306 			inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i];
1307 	} else {
1308 		for (i = 0; i < len; i ++)
1309 			inst->scratch[i] = (inst->buffer[i] & ~mask[i])
1310 				| (val[i] & mask[i]);
1311 	}
1312 }
1313 
1314 static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen,
1315 			   u32 totallen, const u8 *maskdata,
1316 			   const u8 *valuedata)
1317 {
1318 	struct pmac_i2c_pf_inst *inst = instdata;
1319 
1320 	if (masklen > inst->bytes || valuelen > inst->bytes ||
1321 	    totallen > inst->bytes || valuelen > masklen)
1322 		return -EINVAL;
1323 
1324 	pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1325 
1326 	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1327 			     inst->scratch, totallen);
1328 }
1329 
1330 static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len)
1331 {
1332 	struct pmac_i2c_pf_inst *inst = instdata;
1333 
1334 	inst->bytes = len;
1335 	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr,
1336 			     inst->buffer, len);
1337 }
1338 
1339 static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len,
1340 				     const u8 *data)
1341 {
1342 	struct pmac_i2c_pf_inst *inst = instdata;
1343 
1344 	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1345 			     subaddr, (u8 *)data, len);
1346 }
1347 
1348 static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode)
1349 {
1350 	struct pmac_i2c_pf_inst *inst = instdata;
1351 
1352 	return pmac_i2c_setmode(inst->bus, mode);
1353 }
1354 
1355 static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen,
1356 			       u32 valuelen, u32 totallen, const u8 *maskdata,
1357 			       const u8 *valuedata)
1358 {
1359 	struct pmac_i2c_pf_inst *inst = instdata;
1360 
1361 	if (masklen > inst->bytes || valuelen > inst->bytes ||
1362 	    totallen > inst->bytes || valuelen > masklen)
1363 		return -EINVAL;
1364 
1365 	pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1366 
1367 	return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1368 			     subaddr, inst->scratch, totallen);
1369 }
1370 
1371 static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len,
1372 				     const u8 *maskdata,
1373 				     const u8 *valuedata)
1374 {
1375 	struct pmac_i2c_pf_inst *inst = instdata;
1376 	int i, match;
1377 
1378 	/* Get return value pointer, it's assumed to be a u32 */
1379 	if (!args || !args->count || !args->u[0].p)
1380 		return -EINVAL;
1381 
1382 	/* Check buffer */
1383 	if (len > inst->bytes)
1384 		return -EINVAL;
1385 
1386 	for (i = 0, match = 1; match && i < len; i ++)
1387 		if ((inst->buffer[i] & maskdata[i]) != valuedata[i])
1388 			match = 0;
1389 	*args->u[0].p = match;
1390 	return 0;
1391 }
1392 
1393 static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration)
1394 {
1395 	msleep((duration + 999) / 1000);
1396 	return 0;
1397 }
1398 
1399 
1400 static struct pmf_handlers pmac_i2c_pfunc_handlers = {
1401 	.begin			= pmac_i2c_do_begin,
1402 	.end			= pmac_i2c_do_end,
1403 	.read_i2c		= pmac_i2c_do_read,
1404 	.write_i2c		= pmac_i2c_do_write,
1405 	.rmw_i2c		= pmac_i2c_do_rmw,
1406 	.read_i2c_sub		= pmac_i2c_do_read_sub,
1407 	.write_i2c_sub		= pmac_i2c_do_write_sub,
1408 	.rmw_i2c_sub		= pmac_i2c_do_rmw_sub,
1409 	.set_i2c_mode		= pmac_i2c_do_set_mode,
1410 	.mask_and_compare	= pmac_i2c_do_mask_and_comp,
1411 	.delay			= pmac_i2c_do_delay,
1412 };
1413 
1414 static void __init pmac_i2c_dev_create(struct device_node *np, int quirks)
1415 {
1416 	DBG("dev_create(%s)\n", np->full_name);
1417 
1418 	pmf_register_driver(np, &pmac_i2c_pfunc_handlers,
1419 			    (void *)(long)quirks);
1420 }
1421 
1422 static void __init pmac_i2c_dev_init(struct device_node *np, int quirks)
1423 {
1424 	DBG("dev_create(%s)\n", np->full_name);
1425 
1426 	pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
1427 }
1428 
1429 static void pmac_i2c_dev_suspend(struct device_node *np, int quirks)
1430 {
1431 	DBG("dev_suspend(%s)\n", np->full_name);
1432 	pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL);
1433 }
1434 
1435 static void pmac_i2c_dev_resume(struct device_node *np, int quirks)
1436 {
1437 	DBG("dev_resume(%s)\n", np->full_name);
1438 	pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL);
1439 }
1440 
1441 void pmac_pfunc_i2c_suspend(void)
1442 {
1443 	pmac_i2c_devscan(pmac_i2c_dev_suspend);
1444 }
1445 
1446 void pmac_pfunc_i2c_resume(void)
1447 {
1448 	pmac_i2c_devscan(pmac_i2c_dev_resume);
1449 }
1450 
1451 /*
1452  * Initialize us: probe all i2c busses on the machine, instantiate
1453  * busses and platform functions as needed.
1454  */
1455 /* This is non-static as it might be called early by smp code */
1456 int __init pmac_i2c_init(void)
1457 {
1458 	static int i2c_inited;
1459 
1460 	if (i2c_inited)
1461 		return 0;
1462 	i2c_inited = 1;
1463 
1464 	/* Probe keywest-i2c busses */
1465 	kw_i2c_probe();
1466 
1467 #ifdef CONFIG_ADB_PMU
1468 	/* Probe PMU i2c busses */
1469 	pmu_i2c_probe();
1470 #endif
1471 
1472 #ifdef CONFIG_PMAC_SMU
1473 	/* Probe SMU i2c busses */
1474 	smu_i2c_probe();
1475 #endif
1476 
1477 	/* Now add plaform functions for some known devices */
1478 	pmac_i2c_devscan(pmac_i2c_dev_create);
1479 
1480 	return 0;
1481 }
1482 machine_arch_initcall(powermac, pmac_i2c_init);
1483 
1484 /* Since pmac_i2c_init can be called too early for the platform device
1485  * registration, we need to do it at a later time. In our case, subsys
1486  * happens to fit well, though I agree it's a bit of a hack...
1487  */
1488 static int __init pmac_i2c_create_platform_devices(void)
1489 {
1490 	struct pmac_i2c_bus *bus;
1491 	int i = 0;
1492 
1493 	/* In the case where we are initialized from smp_init(), we must
1494 	 * not use the timer (and thus the irq). It's safe from now on
1495 	 * though
1496 	 */
1497 	pmac_i2c_force_poll = 0;
1498 
1499 	/* Create platform devices */
1500 	list_for_each_entry(bus, &pmac_i2c_busses, link) {
1501 		bus->platform_dev =
1502 			platform_device_alloc("i2c-powermac", i++);
1503 		if (bus->platform_dev == NULL)
1504 			return -ENOMEM;
1505 		bus->platform_dev->dev.platform_data = bus;
1506 		platform_device_add(bus->platform_dev);
1507 	}
1508 
1509 	/* Now call platform "init" functions */
1510 	pmac_i2c_devscan(pmac_i2c_dev_init);
1511 
1512 	return 0;
1513 }
1514 machine_subsys_initcall(powermac, pmac_i2c_create_platform_devices);
1515