1 /* 2 * arch/powerpc/platforms/powermac/low_i2c.c 3 * 4 * Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org) 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 * 11 * The linux i2c layer isn't completely suitable for our needs for various 12 * reasons ranging from too late initialisation to semantics not perfectly 13 * matching some requirements of the apple platform functions etc... 14 * 15 * This file thus provides a simple low level unified i2c interface for 16 * powermac that covers the various types of i2c busses used in Apple machines. 17 * For now, keywest, PMU and SMU, though we could add Cuda, or other bit 18 * banging busses found on older chipstes in earlier machines if we ever need 19 * one of them. 20 * 21 * The drivers in this file are synchronous/blocking. In addition, the 22 * keywest one is fairly slow due to the use of msleep instead of interrupts 23 * as the interrupt is currently used by i2c-keywest. In the long run, we 24 * might want to get rid of those high-level interfaces to linux i2c layer 25 * either completely (converting all drivers) or replacing them all with a 26 * single stub driver on top of this one. Once done, the interrupt will be 27 * available for our use. 28 */ 29 30 #undef DEBUG 31 #undef DEBUG_LOW 32 33 #include <linux/types.h> 34 #include <linux/sched.h> 35 #include <linux/init.h> 36 #include <linux/module.h> 37 #include <linux/adb.h> 38 #include <linux/pmu.h> 39 #include <linux/delay.h> 40 #include <linux/completion.h> 41 #include <linux/platform_device.h> 42 #include <linux/interrupt.h> 43 #include <linux/timer.h> 44 #include <linux/mutex.h> 45 #include <linux/i2c.h> 46 #include <linux/slab.h> 47 #include <asm/keylargo.h> 48 #include <asm/uninorth.h> 49 #include <asm/io.h> 50 #include <asm/prom.h> 51 #include <asm/machdep.h> 52 #include <asm/smu.h> 53 #include <asm/pmac_pfunc.h> 54 #include <asm/pmac_low_i2c.h> 55 56 #ifdef DEBUG 57 #define DBG(x...) do {\ 58 printk(KERN_DEBUG "low_i2c:" x); \ 59 } while(0) 60 #else 61 #define DBG(x...) 62 #endif 63 64 #ifdef DEBUG_LOW 65 #define DBG_LOW(x...) do {\ 66 printk(KERN_DEBUG "low_i2c:" x); \ 67 } while(0) 68 #else 69 #define DBG_LOW(x...) 70 #endif 71 72 73 static int pmac_i2c_force_poll = 1; 74 75 /* 76 * A bus structure. Each bus in the system has such a structure associated. 77 */ 78 struct pmac_i2c_bus 79 { 80 struct list_head link; 81 struct device_node *controller; 82 struct device_node *busnode; 83 int type; 84 int flags; 85 struct i2c_adapter adapter; 86 void *hostdata; 87 int channel; /* some hosts have multiple */ 88 int mode; /* current mode */ 89 struct mutex mutex; 90 int opened; 91 int polled; /* open mode */ 92 struct platform_device *platform_dev; 93 94 /* ops */ 95 int (*open)(struct pmac_i2c_bus *bus); 96 void (*close)(struct pmac_i2c_bus *bus); 97 int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 98 u32 subaddr, u8 *data, int len); 99 }; 100 101 static LIST_HEAD(pmac_i2c_busses); 102 103 /* 104 * Keywest implementation 105 */ 106 107 struct pmac_i2c_host_kw 108 { 109 struct mutex mutex; /* Access mutex for use by 110 * i2c-keywest */ 111 void __iomem *base; /* register base address */ 112 int bsteps; /* register stepping */ 113 int speed; /* speed */ 114 int irq; 115 u8 *data; 116 unsigned len; 117 int state; 118 int rw; 119 int polled; 120 int result; 121 struct completion complete; 122 spinlock_t lock; 123 struct timer_list timeout_timer; 124 }; 125 126 /* Register indices */ 127 typedef enum { 128 reg_mode = 0, 129 reg_control, 130 reg_status, 131 reg_isr, 132 reg_ier, 133 reg_addr, 134 reg_subaddr, 135 reg_data 136 } reg_t; 137 138 /* The Tumbler audio equalizer can be really slow sometimes */ 139 #define KW_POLL_TIMEOUT (2*HZ) 140 141 /* Mode register */ 142 #define KW_I2C_MODE_100KHZ 0x00 143 #define KW_I2C_MODE_50KHZ 0x01 144 #define KW_I2C_MODE_25KHZ 0x02 145 #define KW_I2C_MODE_DUMB 0x00 146 #define KW_I2C_MODE_STANDARD 0x04 147 #define KW_I2C_MODE_STANDARDSUB 0x08 148 #define KW_I2C_MODE_COMBINED 0x0C 149 #define KW_I2C_MODE_MODE_MASK 0x0C 150 #define KW_I2C_MODE_CHAN_MASK 0xF0 151 152 /* Control register */ 153 #define KW_I2C_CTL_AAK 0x01 154 #define KW_I2C_CTL_XADDR 0x02 155 #define KW_I2C_CTL_STOP 0x04 156 #define KW_I2C_CTL_START 0x08 157 158 /* Status register */ 159 #define KW_I2C_STAT_BUSY 0x01 160 #define KW_I2C_STAT_LAST_AAK 0x02 161 #define KW_I2C_STAT_LAST_RW 0x04 162 #define KW_I2C_STAT_SDA 0x08 163 #define KW_I2C_STAT_SCL 0x10 164 165 /* IER & ISR registers */ 166 #define KW_I2C_IRQ_DATA 0x01 167 #define KW_I2C_IRQ_ADDR 0x02 168 #define KW_I2C_IRQ_STOP 0x04 169 #define KW_I2C_IRQ_START 0x08 170 #define KW_I2C_IRQ_MASK 0x0F 171 172 /* State machine states */ 173 enum { 174 state_idle, 175 state_addr, 176 state_read, 177 state_write, 178 state_stop, 179 state_dead 180 }; 181 182 #define WRONG_STATE(name) do {\ 183 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \ 184 "(isr: %02x)\n", \ 185 name, __kw_state_names[host->state], isr); \ 186 } while(0) 187 188 static const char *__kw_state_names[] = { 189 "state_idle", 190 "state_addr", 191 "state_read", 192 "state_write", 193 "state_stop", 194 "state_dead" 195 }; 196 197 static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg) 198 { 199 return readb(host->base + (((unsigned int)reg) << host->bsteps)); 200 } 201 202 static inline void __kw_write_reg(struct pmac_i2c_host_kw *host, 203 reg_t reg, u8 val) 204 { 205 writeb(val, host->base + (((unsigned)reg) << host->bsteps)); 206 (void)__kw_read_reg(host, reg_subaddr); 207 } 208 209 #define kw_write_reg(reg, val) __kw_write_reg(host, reg, val) 210 #define kw_read_reg(reg) __kw_read_reg(host, reg) 211 212 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host) 213 { 214 int i, j; 215 u8 isr; 216 217 for (i = 0; i < 1000; i++) { 218 isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK; 219 if (isr != 0) 220 return isr; 221 222 /* This code is used with the timebase frozen, we cannot rely 223 * on udelay nor schedule when in polled mode ! 224 * For now, just use a bogus loop.... 225 */ 226 if (host->polled) { 227 for (j = 1; j < 100000; j++) 228 mb(); 229 } else 230 msleep(1); 231 } 232 return isr; 233 } 234 235 static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result) 236 { 237 kw_write_reg(reg_control, KW_I2C_CTL_STOP); 238 host->state = state_stop; 239 host->result = result; 240 } 241 242 243 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr) 244 { 245 u8 ack; 246 247 DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n", 248 __kw_state_names[host->state], isr); 249 250 if (host->state == state_idle) { 251 printk(KERN_WARNING "low_i2c: Keywest got an out of state" 252 " interrupt, ignoring\n"); 253 kw_write_reg(reg_isr, isr); 254 return; 255 } 256 257 if (isr == 0) { 258 printk(KERN_WARNING "low_i2c: Timeout in i2c transfer" 259 " on keywest !\n"); 260 if (host->state != state_stop) { 261 kw_i2c_do_stop(host, -EIO); 262 return; 263 } 264 ack = kw_read_reg(reg_status); 265 if (ack & KW_I2C_STAT_BUSY) 266 kw_write_reg(reg_status, 0); 267 host->state = state_idle; 268 kw_write_reg(reg_ier, 0x00); 269 if (!host->polled) 270 complete(&host->complete); 271 return; 272 } 273 274 if (isr & KW_I2C_IRQ_ADDR) { 275 ack = kw_read_reg(reg_status); 276 if (host->state != state_addr) { 277 WRONG_STATE("KW_I2C_IRQ_ADDR"); 278 kw_i2c_do_stop(host, -EIO); 279 } 280 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) { 281 host->result = -ENXIO; 282 host->state = state_stop; 283 DBG_LOW("KW: NAK on address\n"); 284 } else { 285 if (host->len == 0) 286 kw_i2c_do_stop(host, 0); 287 else if (host->rw) { 288 host->state = state_read; 289 if (host->len > 1) 290 kw_write_reg(reg_control, 291 KW_I2C_CTL_AAK); 292 } else { 293 host->state = state_write; 294 kw_write_reg(reg_data, *(host->data++)); 295 host->len--; 296 } 297 } 298 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR); 299 } 300 301 if (isr & KW_I2C_IRQ_DATA) { 302 if (host->state == state_read) { 303 *(host->data++) = kw_read_reg(reg_data); 304 host->len--; 305 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA); 306 if (host->len == 0) 307 host->state = state_stop; 308 else if (host->len == 1) 309 kw_write_reg(reg_control, 0); 310 } else if (host->state == state_write) { 311 ack = kw_read_reg(reg_status); 312 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) { 313 DBG_LOW("KW: nack on data write\n"); 314 host->result = -EFBIG; 315 host->state = state_stop; 316 } else if (host->len) { 317 kw_write_reg(reg_data, *(host->data++)); 318 host->len--; 319 } else 320 kw_i2c_do_stop(host, 0); 321 } else { 322 WRONG_STATE("KW_I2C_IRQ_DATA"); 323 if (host->state != state_stop) 324 kw_i2c_do_stop(host, -EIO); 325 } 326 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA); 327 } 328 329 if (isr & KW_I2C_IRQ_STOP) { 330 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP); 331 if (host->state != state_stop) { 332 WRONG_STATE("KW_I2C_IRQ_STOP"); 333 host->result = -EIO; 334 } 335 host->state = state_idle; 336 if (!host->polled) 337 complete(&host->complete); 338 } 339 340 /* Below should only happen in manual mode which we don't use ... */ 341 if (isr & KW_I2C_IRQ_START) 342 kw_write_reg(reg_isr, KW_I2C_IRQ_START); 343 344 } 345 346 /* Interrupt handler */ 347 static irqreturn_t kw_i2c_irq(int irq, void *dev_id) 348 { 349 struct pmac_i2c_host_kw *host = dev_id; 350 unsigned long flags; 351 352 spin_lock_irqsave(&host->lock, flags); 353 del_timer(&host->timeout_timer); 354 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr)); 355 if (host->state != state_idle) { 356 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; 357 add_timer(&host->timeout_timer); 358 } 359 spin_unlock_irqrestore(&host->lock, flags); 360 return IRQ_HANDLED; 361 } 362 363 static void kw_i2c_timeout(unsigned long data) 364 { 365 struct pmac_i2c_host_kw *host = (struct pmac_i2c_host_kw *)data; 366 unsigned long flags; 367 368 spin_lock_irqsave(&host->lock, flags); 369 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr)); 370 if (host->state != state_idle) { 371 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; 372 add_timer(&host->timeout_timer); 373 } 374 spin_unlock_irqrestore(&host->lock, flags); 375 } 376 377 static int kw_i2c_open(struct pmac_i2c_bus *bus) 378 { 379 struct pmac_i2c_host_kw *host = bus->hostdata; 380 mutex_lock(&host->mutex); 381 return 0; 382 } 383 384 static void kw_i2c_close(struct pmac_i2c_bus *bus) 385 { 386 struct pmac_i2c_host_kw *host = bus->hostdata; 387 mutex_unlock(&host->mutex); 388 } 389 390 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 391 u32 subaddr, u8 *data, int len) 392 { 393 struct pmac_i2c_host_kw *host = bus->hostdata; 394 u8 mode_reg = host->speed; 395 int use_irq = host->irq != NO_IRQ && !bus->polled; 396 397 /* Setup mode & subaddress if any */ 398 switch(bus->mode) { 399 case pmac_i2c_mode_dumb: 400 return -EINVAL; 401 case pmac_i2c_mode_std: 402 mode_reg |= KW_I2C_MODE_STANDARD; 403 if (subsize != 0) 404 return -EINVAL; 405 break; 406 case pmac_i2c_mode_stdsub: 407 mode_reg |= KW_I2C_MODE_STANDARDSUB; 408 if (subsize != 1) 409 return -EINVAL; 410 break; 411 case pmac_i2c_mode_combined: 412 mode_reg |= KW_I2C_MODE_COMBINED; 413 if (subsize != 1) 414 return -EINVAL; 415 break; 416 } 417 418 /* Setup channel & clear pending irqs */ 419 kw_write_reg(reg_isr, kw_read_reg(reg_isr)); 420 kw_write_reg(reg_mode, mode_reg | (bus->channel << 4)); 421 kw_write_reg(reg_status, 0); 422 423 /* Set up address and r/w bit, strip possible stale bus number from 424 * address top bits 425 */ 426 kw_write_reg(reg_addr, addrdir & 0xff); 427 428 /* Set up the sub address */ 429 if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB 430 || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED) 431 kw_write_reg(reg_subaddr, subaddr); 432 433 /* Prepare for async operations */ 434 host->data = data; 435 host->len = len; 436 host->state = state_addr; 437 host->result = 0; 438 host->rw = (addrdir & 1); 439 host->polled = bus->polled; 440 441 /* Enable interrupt if not using polled mode and interrupt is 442 * available 443 */ 444 if (use_irq) { 445 /* Clear completion */ 446 INIT_COMPLETION(host->complete); 447 /* Ack stale interrupts */ 448 kw_write_reg(reg_isr, kw_read_reg(reg_isr)); 449 /* Arm timeout */ 450 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; 451 add_timer(&host->timeout_timer); 452 /* Enable emission */ 453 kw_write_reg(reg_ier, KW_I2C_IRQ_MASK); 454 } 455 456 /* Start sending address */ 457 kw_write_reg(reg_control, KW_I2C_CTL_XADDR); 458 459 /* Wait for completion */ 460 if (use_irq) 461 wait_for_completion(&host->complete); 462 else { 463 while(host->state != state_idle) { 464 unsigned long flags; 465 466 u8 isr = kw_i2c_wait_interrupt(host); 467 spin_lock_irqsave(&host->lock, flags); 468 kw_i2c_handle_interrupt(host, isr); 469 spin_unlock_irqrestore(&host->lock, flags); 470 } 471 } 472 473 /* Disable emission */ 474 kw_write_reg(reg_ier, 0); 475 476 return host->result; 477 } 478 479 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np) 480 { 481 struct pmac_i2c_host_kw *host; 482 const u32 *psteps, *prate, *addrp; 483 u32 steps; 484 485 host = kzalloc(sizeof(struct pmac_i2c_host_kw), GFP_KERNEL); 486 if (host == NULL) { 487 printk(KERN_ERR "low_i2c: Can't allocate host for %s\n", 488 np->full_name); 489 return NULL; 490 } 491 492 /* Apple is kind enough to provide a valid AAPL,address property 493 * on all i2c keywest nodes so far ... we would have to fallback 494 * to macio parsing if that wasn't the case 495 */ 496 addrp = of_get_property(np, "AAPL,address", NULL); 497 if (addrp == NULL) { 498 printk(KERN_ERR "low_i2c: Can't find address for %s\n", 499 np->full_name); 500 kfree(host); 501 return NULL; 502 } 503 mutex_init(&host->mutex); 504 init_completion(&host->complete); 505 spin_lock_init(&host->lock); 506 init_timer(&host->timeout_timer); 507 host->timeout_timer.function = kw_i2c_timeout; 508 host->timeout_timer.data = (unsigned long)host; 509 510 psteps = of_get_property(np, "AAPL,address-step", NULL); 511 steps = psteps ? (*psteps) : 0x10; 512 for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++) 513 steps >>= 1; 514 /* Select interface rate */ 515 host->speed = KW_I2C_MODE_25KHZ; 516 prate = of_get_property(np, "AAPL,i2c-rate", NULL); 517 if (prate) switch(*prate) { 518 case 100: 519 host->speed = KW_I2C_MODE_100KHZ; 520 break; 521 case 50: 522 host->speed = KW_I2C_MODE_50KHZ; 523 break; 524 case 25: 525 host->speed = KW_I2C_MODE_25KHZ; 526 break; 527 } 528 host->irq = irq_of_parse_and_map(np, 0); 529 if (host->irq == NO_IRQ) 530 printk(KERN_WARNING 531 "low_i2c: Failed to map interrupt for %s\n", 532 np->full_name); 533 534 host->base = ioremap((*addrp), 0x1000); 535 if (host->base == NULL) { 536 printk(KERN_ERR "low_i2c: Can't map registers for %s\n", 537 np->full_name); 538 kfree(host); 539 return NULL; 540 } 541 542 /* Make sure IRQ is disabled */ 543 kw_write_reg(reg_ier, 0); 544 545 /* Request chip interrupt. We set IRQF_TIMER because we don't 546 * want that interrupt disabled between the 2 passes of driver 547 * suspend or we'll have issues running the pfuncs 548 */ 549 if (request_irq(host->irq, kw_i2c_irq, IRQF_TIMER, "keywest i2c", host)) 550 host->irq = NO_IRQ; 551 552 printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n", 553 *addrp, host->irq, np->full_name); 554 555 return host; 556 } 557 558 559 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host, 560 struct device_node *controller, 561 struct device_node *busnode, 562 int channel) 563 { 564 struct pmac_i2c_bus *bus; 565 566 bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL); 567 if (bus == NULL) 568 return; 569 570 bus->controller = of_node_get(controller); 571 bus->busnode = of_node_get(busnode); 572 bus->type = pmac_i2c_bus_keywest; 573 bus->hostdata = host; 574 bus->channel = channel; 575 bus->mode = pmac_i2c_mode_std; 576 bus->open = kw_i2c_open; 577 bus->close = kw_i2c_close; 578 bus->xfer = kw_i2c_xfer; 579 mutex_init(&bus->mutex); 580 if (controller == busnode) 581 bus->flags = pmac_i2c_multibus; 582 list_add(&bus->link, &pmac_i2c_busses); 583 584 printk(KERN_INFO " channel %d bus %s\n", channel, 585 (controller == busnode) ? "<multibus>" : busnode->full_name); 586 } 587 588 static void __init kw_i2c_probe(void) 589 { 590 struct device_node *np, *child, *parent; 591 592 /* Probe keywest-i2c busses */ 593 for_each_compatible_node(np, "i2c","keywest-i2c") { 594 struct pmac_i2c_host_kw *host; 595 int multibus, chans, i; 596 597 /* Found one, init a host structure */ 598 host = kw_i2c_host_init(np); 599 if (host == NULL) 600 continue; 601 602 /* Now check if we have a multibus setup (old style) or if we 603 * have proper bus nodes. Note that the "new" way (proper bus 604 * nodes) might cause us to not create some busses that are 605 * kept hidden in the device-tree. In the future, we might 606 * want to work around that by creating busses without a node 607 * but not for now 608 */ 609 child = of_get_next_child(np, NULL); 610 multibus = !child || strcmp(child->name, "i2c-bus"); 611 of_node_put(child); 612 613 /* For a multibus setup, we get the bus count based on the 614 * parent type 615 */ 616 if (multibus) { 617 parent = of_get_parent(np); 618 if (parent == NULL) 619 continue; 620 chans = parent->name[0] == 'u' ? 2 : 1; 621 for (i = 0; i < chans; i++) 622 kw_i2c_add(host, np, np, i); 623 } else { 624 for (child = NULL; 625 (child = of_get_next_child(np, child)) != NULL;) { 626 const u32 *reg = of_get_property(child, 627 "reg", NULL); 628 if (reg == NULL) 629 continue; 630 kw_i2c_add(host, np, child, *reg); 631 } 632 } 633 } 634 } 635 636 637 /* 638 * 639 * PMU implementation 640 * 641 */ 642 643 #ifdef CONFIG_ADB_PMU 644 645 /* 646 * i2c command block to the PMU 647 */ 648 struct pmu_i2c_hdr { 649 u8 bus; 650 u8 mode; 651 u8 bus2; 652 u8 address; 653 u8 sub_addr; 654 u8 comb_addr; 655 u8 count; 656 u8 data[]; 657 }; 658 659 static void pmu_i2c_complete(struct adb_request *req) 660 { 661 complete(req->arg); 662 } 663 664 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 665 u32 subaddr, u8 *data, int len) 666 { 667 struct adb_request *req = bus->hostdata; 668 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1]; 669 struct completion comp; 670 int read = addrdir & 1; 671 int retry; 672 int rc = 0; 673 674 /* For now, limit ourselves to 16 bytes transfers */ 675 if (len > 16) 676 return -EINVAL; 677 678 init_completion(&comp); 679 680 for (retry = 0; retry < 16; retry++) { 681 memset(req, 0, sizeof(struct adb_request)); 682 hdr->bus = bus->channel; 683 hdr->count = len; 684 685 switch(bus->mode) { 686 case pmac_i2c_mode_std: 687 if (subsize != 0) 688 return -EINVAL; 689 hdr->address = addrdir; 690 hdr->mode = PMU_I2C_MODE_SIMPLE; 691 break; 692 case pmac_i2c_mode_stdsub: 693 case pmac_i2c_mode_combined: 694 if (subsize != 1) 695 return -EINVAL; 696 hdr->address = addrdir & 0xfe; 697 hdr->comb_addr = addrdir; 698 hdr->sub_addr = subaddr; 699 if (bus->mode == pmac_i2c_mode_stdsub) 700 hdr->mode = PMU_I2C_MODE_STDSUB; 701 else 702 hdr->mode = PMU_I2C_MODE_COMBINED; 703 break; 704 default: 705 return -EINVAL; 706 } 707 708 INIT_COMPLETION(comp); 709 req->data[0] = PMU_I2C_CMD; 710 req->reply[0] = 0xff; 711 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1; 712 req->done = pmu_i2c_complete; 713 req->arg = ∁ 714 if (!read && len) { 715 memcpy(hdr->data, data, len); 716 req->nbytes += len; 717 } 718 rc = pmu_queue_request(req); 719 if (rc) 720 return rc; 721 wait_for_completion(&comp); 722 if (req->reply[0] == PMU_I2C_STATUS_OK) 723 break; 724 msleep(15); 725 } 726 if (req->reply[0] != PMU_I2C_STATUS_OK) 727 return -EIO; 728 729 for (retry = 0; retry < 16; retry++) { 730 memset(req, 0, sizeof(struct adb_request)); 731 732 /* I know that looks like a lot, slow as hell, but darwin 733 * does it so let's be on the safe side for now 734 */ 735 msleep(15); 736 737 hdr->bus = PMU_I2C_BUS_STATUS; 738 739 INIT_COMPLETION(comp); 740 req->data[0] = PMU_I2C_CMD; 741 req->reply[0] = 0xff; 742 req->nbytes = 2; 743 req->done = pmu_i2c_complete; 744 req->arg = ∁ 745 rc = pmu_queue_request(req); 746 if (rc) 747 return rc; 748 wait_for_completion(&comp); 749 750 if (req->reply[0] == PMU_I2C_STATUS_OK && !read) 751 return 0; 752 if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) { 753 int rlen = req->reply_len - 1; 754 755 if (rlen != len) { 756 printk(KERN_WARNING "low_i2c: PMU returned %d" 757 " bytes, expected %d !\n", rlen, len); 758 return -EIO; 759 } 760 if (len) 761 memcpy(data, &req->reply[1], len); 762 return 0; 763 } 764 } 765 return -EIO; 766 } 767 768 static void __init pmu_i2c_probe(void) 769 { 770 struct pmac_i2c_bus *bus; 771 struct device_node *busnode; 772 int channel, sz; 773 774 if (!pmu_present()) 775 return; 776 777 /* There might or might not be a "pmu-i2c" node, we use that 778 * or via-pmu itself, whatever we find. I haven't seen a machine 779 * with separate bus nodes, so we assume a multibus setup 780 */ 781 busnode = of_find_node_by_name(NULL, "pmu-i2c"); 782 if (busnode == NULL) 783 busnode = of_find_node_by_name(NULL, "via-pmu"); 784 if (busnode == NULL) 785 return; 786 787 printk(KERN_INFO "PMU i2c %s\n", busnode->full_name); 788 789 /* 790 * We add bus 1 and 2 only for now, bus 0 is "special" 791 */ 792 for (channel = 1; channel <= 2; channel++) { 793 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request); 794 bus = kzalloc(sz, GFP_KERNEL); 795 if (bus == NULL) 796 return; 797 798 bus->controller = busnode; 799 bus->busnode = busnode; 800 bus->type = pmac_i2c_bus_pmu; 801 bus->channel = channel; 802 bus->mode = pmac_i2c_mode_std; 803 bus->hostdata = bus + 1; 804 bus->xfer = pmu_i2c_xfer; 805 mutex_init(&bus->mutex); 806 bus->flags = pmac_i2c_multibus; 807 list_add(&bus->link, &pmac_i2c_busses); 808 809 printk(KERN_INFO " channel %d bus <multibus>\n", channel); 810 } 811 } 812 813 #endif /* CONFIG_ADB_PMU */ 814 815 816 /* 817 * 818 * SMU implementation 819 * 820 */ 821 822 #ifdef CONFIG_PMAC_SMU 823 824 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc) 825 { 826 complete(misc); 827 } 828 829 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 830 u32 subaddr, u8 *data, int len) 831 { 832 struct smu_i2c_cmd *cmd = bus->hostdata; 833 struct completion comp; 834 int read = addrdir & 1; 835 int rc = 0; 836 837 if ((read && len > SMU_I2C_READ_MAX) || 838 ((!read) && len > SMU_I2C_WRITE_MAX)) 839 return -EINVAL; 840 841 memset(cmd, 0, sizeof(struct smu_i2c_cmd)); 842 cmd->info.bus = bus->channel; 843 cmd->info.devaddr = addrdir; 844 cmd->info.datalen = len; 845 846 switch(bus->mode) { 847 case pmac_i2c_mode_std: 848 if (subsize != 0) 849 return -EINVAL; 850 cmd->info.type = SMU_I2C_TRANSFER_SIMPLE; 851 break; 852 case pmac_i2c_mode_stdsub: 853 case pmac_i2c_mode_combined: 854 if (subsize > 3 || subsize < 1) 855 return -EINVAL; 856 cmd->info.sublen = subsize; 857 /* that's big-endian only but heh ! */ 858 memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize), 859 subsize); 860 if (bus->mode == pmac_i2c_mode_stdsub) 861 cmd->info.type = SMU_I2C_TRANSFER_STDSUB; 862 else 863 cmd->info.type = SMU_I2C_TRANSFER_COMBINED; 864 break; 865 default: 866 return -EINVAL; 867 } 868 if (!read && len) 869 memcpy(cmd->info.data, data, len); 870 871 init_completion(&comp); 872 cmd->done = smu_i2c_complete; 873 cmd->misc = ∁ 874 rc = smu_queue_i2c(cmd); 875 if (rc < 0) 876 return rc; 877 wait_for_completion(&comp); 878 rc = cmd->status; 879 880 if (read && len) 881 memcpy(data, cmd->info.data, len); 882 return rc < 0 ? rc : 0; 883 } 884 885 static void __init smu_i2c_probe(void) 886 { 887 struct device_node *controller, *busnode; 888 struct pmac_i2c_bus *bus; 889 const u32 *reg; 890 int sz; 891 892 if (!smu_present()) 893 return; 894 895 controller = of_find_node_by_name(NULL, "smu-i2c-control"); 896 if (controller == NULL) 897 controller = of_find_node_by_name(NULL, "smu"); 898 if (controller == NULL) 899 return; 900 901 printk(KERN_INFO "SMU i2c %s\n", controller->full_name); 902 903 /* Look for childs, note that they might not be of the right 904 * type as older device trees mix i2c busses and other thigns 905 * at the same level 906 */ 907 for (busnode = NULL; 908 (busnode = of_get_next_child(controller, busnode)) != NULL;) { 909 if (strcmp(busnode->type, "i2c") && 910 strcmp(busnode->type, "i2c-bus")) 911 continue; 912 reg = of_get_property(busnode, "reg", NULL); 913 if (reg == NULL) 914 continue; 915 916 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd); 917 bus = kzalloc(sz, GFP_KERNEL); 918 if (bus == NULL) 919 return; 920 921 bus->controller = controller; 922 bus->busnode = of_node_get(busnode); 923 bus->type = pmac_i2c_bus_smu; 924 bus->channel = *reg; 925 bus->mode = pmac_i2c_mode_std; 926 bus->hostdata = bus + 1; 927 bus->xfer = smu_i2c_xfer; 928 mutex_init(&bus->mutex); 929 bus->flags = 0; 930 list_add(&bus->link, &pmac_i2c_busses); 931 932 printk(KERN_INFO " channel %x bus %s\n", 933 bus->channel, busnode->full_name); 934 } 935 } 936 937 #endif /* CONFIG_PMAC_SMU */ 938 939 /* 940 * 941 * Core code 942 * 943 */ 944 945 946 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node) 947 { 948 struct device_node *p = of_node_get(node); 949 struct device_node *prev = NULL; 950 struct pmac_i2c_bus *bus; 951 952 while(p) { 953 list_for_each_entry(bus, &pmac_i2c_busses, link) { 954 if (p == bus->busnode) { 955 if (prev && bus->flags & pmac_i2c_multibus) { 956 const u32 *reg; 957 reg = of_get_property(prev, "reg", 958 NULL); 959 if (!reg) 960 continue; 961 if (((*reg) >> 8) != bus->channel) 962 continue; 963 } 964 of_node_put(p); 965 of_node_put(prev); 966 return bus; 967 } 968 } 969 of_node_put(prev); 970 prev = p; 971 p = of_get_parent(p); 972 } 973 return NULL; 974 } 975 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus); 976 977 u8 pmac_i2c_get_dev_addr(struct device_node *device) 978 { 979 const u32 *reg = of_get_property(device, "reg", NULL); 980 981 if (reg == NULL) 982 return 0; 983 984 return (*reg) & 0xff; 985 } 986 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr); 987 988 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus) 989 { 990 return bus->controller; 991 } 992 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller); 993 994 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus) 995 { 996 return bus->busnode; 997 } 998 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node); 999 1000 int pmac_i2c_get_type(struct pmac_i2c_bus *bus) 1001 { 1002 return bus->type; 1003 } 1004 EXPORT_SYMBOL_GPL(pmac_i2c_get_type); 1005 1006 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus) 1007 { 1008 return bus->flags; 1009 } 1010 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags); 1011 1012 int pmac_i2c_get_channel(struct pmac_i2c_bus *bus) 1013 { 1014 return bus->channel; 1015 } 1016 EXPORT_SYMBOL_GPL(pmac_i2c_get_channel); 1017 1018 1019 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus) 1020 { 1021 return &bus->adapter; 1022 } 1023 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter); 1024 1025 struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter) 1026 { 1027 struct pmac_i2c_bus *bus; 1028 1029 list_for_each_entry(bus, &pmac_i2c_busses, link) 1030 if (&bus->adapter == adapter) 1031 return bus; 1032 return NULL; 1033 } 1034 EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus); 1035 1036 int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter) 1037 { 1038 struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev); 1039 1040 if (bus == NULL) 1041 return 0; 1042 return (&bus->adapter == adapter); 1043 } 1044 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter); 1045 1046 int pmac_low_i2c_lock(struct device_node *np) 1047 { 1048 struct pmac_i2c_bus *bus, *found = NULL; 1049 1050 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1051 if (np == bus->controller) { 1052 found = bus; 1053 break; 1054 } 1055 } 1056 if (!found) 1057 return -ENODEV; 1058 return pmac_i2c_open(bus, 0); 1059 } 1060 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock); 1061 1062 int pmac_low_i2c_unlock(struct device_node *np) 1063 { 1064 struct pmac_i2c_bus *bus, *found = NULL; 1065 1066 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1067 if (np == bus->controller) { 1068 found = bus; 1069 break; 1070 } 1071 } 1072 if (!found) 1073 return -ENODEV; 1074 pmac_i2c_close(bus); 1075 return 0; 1076 } 1077 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock); 1078 1079 1080 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled) 1081 { 1082 int rc; 1083 1084 mutex_lock(&bus->mutex); 1085 bus->polled = polled || pmac_i2c_force_poll; 1086 bus->opened = 1; 1087 bus->mode = pmac_i2c_mode_std; 1088 if (bus->open && (rc = bus->open(bus)) != 0) { 1089 bus->opened = 0; 1090 mutex_unlock(&bus->mutex); 1091 return rc; 1092 } 1093 return 0; 1094 } 1095 EXPORT_SYMBOL_GPL(pmac_i2c_open); 1096 1097 void pmac_i2c_close(struct pmac_i2c_bus *bus) 1098 { 1099 WARN_ON(!bus->opened); 1100 if (bus->close) 1101 bus->close(bus); 1102 bus->opened = 0; 1103 mutex_unlock(&bus->mutex); 1104 } 1105 EXPORT_SYMBOL_GPL(pmac_i2c_close); 1106 1107 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode) 1108 { 1109 WARN_ON(!bus->opened); 1110 1111 /* Report me if you see the error below as there might be a new 1112 * "combined4" mode that I need to implement for the SMU bus 1113 */ 1114 if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) { 1115 printk(KERN_ERR "low_i2c: Invalid mode %d requested on" 1116 " bus %s !\n", mode, bus->busnode->full_name); 1117 return -EINVAL; 1118 } 1119 bus->mode = mode; 1120 1121 return 0; 1122 } 1123 EXPORT_SYMBOL_GPL(pmac_i2c_setmode); 1124 1125 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 1126 u32 subaddr, u8 *data, int len) 1127 { 1128 int rc; 1129 1130 WARN_ON(!bus->opened); 1131 1132 DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x," 1133 " %d bytes, bus %s\n", bus->channel, addrdir, bus->mode, subsize, 1134 subaddr, len, bus->busnode->full_name); 1135 1136 rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len); 1137 1138 #ifdef DEBUG 1139 if (rc) 1140 DBG("xfer error %d\n", rc); 1141 #endif 1142 return rc; 1143 } 1144 EXPORT_SYMBOL_GPL(pmac_i2c_xfer); 1145 1146 /* some quirks for platform function decoding */ 1147 enum { 1148 pmac_i2c_quirk_invmask = 0x00000001u, 1149 pmac_i2c_quirk_skip = 0x00000002u, 1150 }; 1151 1152 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev, 1153 int quirks)) 1154 { 1155 struct pmac_i2c_bus *bus; 1156 struct device_node *np; 1157 static struct whitelist_ent { 1158 char *name; 1159 char *compatible; 1160 int quirks; 1161 } whitelist[] = { 1162 /* XXX Study device-tree's & apple drivers are get the quirks 1163 * right ! 1164 */ 1165 /* Workaround: It seems that running the clockspreading 1166 * properties on the eMac will cause lockups during boot. 1167 * The machine seems to work fine without that. So for now, 1168 * let's make sure i2c-hwclock doesn't match about "imic" 1169 * clocks and we'll figure out if we really need to do 1170 * something special about those later. 1171 */ 1172 { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip }, 1173 { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip }, 1174 { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask }, 1175 { "i2c-cpu-voltage", NULL, 0}, 1176 { "temp-monitor", NULL, 0 }, 1177 { "supply-monitor", NULL, 0 }, 1178 { NULL, NULL, 0 }, 1179 }; 1180 1181 /* Only some devices need to have platform functions instanciated 1182 * here. For now, we have a table. Others, like 9554 i2c GPIOs used 1183 * on Xserve, if we ever do a driver for them, will use their own 1184 * platform function instance 1185 */ 1186 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1187 for (np = NULL; 1188 (np = of_get_next_child(bus->busnode, np)) != NULL;) { 1189 struct whitelist_ent *p; 1190 /* If multibus, check if device is on that bus */ 1191 if (bus->flags & pmac_i2c_multibus) 1192 if (bus != pmac_i2c_find_bus(np)) 1193 continue; 1194 for (p = whitelist; p->name != NULL; p++) { 1195 if (strcmp(np->name, p->name)) 1196 continue; 1197 if (p->compatible && 1198 !of_device_is_compatible(np, p->compatible)) 1199 continue; 1200 if (p->quirks & pmac_i2c_quirk_skip) 1201 break; 1202 callback(np, p->quirks); 1203 break; 1204 } 1205 } 1206 } 1207 } 1208 1209 #define MAX_I2C_DATA 64 1210 1211 struct pmac_i2c_pf_inst 1212 { 1213 struct pmac_i2c_bus *bus; 1214 u8 addr; 1215 u8 buffer[MAX_I2C_DATA]; 1216 u8 scratch[MAX_I2C_DATA]; 1217 int bytes; 1218 int quirks; 1219 }; 1220 1221 static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args) 1222 { 1223 struct pmac_i2c_pf_inst *inst; 1224 struct pmac_i2c_bus *bus; 1225 1226 bus = pmac_i2c_find_bus(func->node); 1227 if (bus == NULL) { 1228 printk(KERN_ERR "low_i2c: Can't find bus for %s (pfunc)\n", 1229 func->node->full_name); 1230 return NULL; 1231 } 1232 if (pmac_i2c_open(bus, 0)) { 1233 printk(KERN_ERR "low_i2c: Can't open i2c bus for %s (pfunc)\n", 1234 func->node->full_name); 1235 return NULL; 1236 } 1237 1238 /* XXX might need GFP_ATOMIC when called during the suspend process, 1239 * but then, there are already lots of issues with suspending when 1240 * near OOM that need to be resolved, the allocator itself should 1241 * probably make GFP_NOIO implicit during suspend 1242 */ 1243 inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL); 1244 if (inst == NULL) { 1245 pmac_i2c_close(bus); 1246 return NULL; 1247 } 1248 inst->bus = bus; 1249 inst->addr = pmac_i2c_get_dev_addr(func->node); 1250 inst->quirks = (int)(long)func->driver_data; 1251 return inst; 1252 } 1253 1254 static void pmac_i2c_do_end(struct pmf_function *func, void *instdata) 1255 { 1256 struct pmac_i2c_pf_inst *inst = instdata; 1257 1258 if (inst == NULL) 1259 return; 1260 pmac_i2c_close(inst->bus); 1261 if (inst) 1262 kfree(inst); 1263 } 1264 1265 static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len) 1266 { 1267 struct pmac_i2c_pf_inst *inst = instdata; 1268 1269 inst->bytes = len; 1270 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0, 1271 inst->buffer, len); 1272 } 1273 1274 static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data) 1275 { 1276 struct pmac_i2c_pf_inst *inst = instdata; 1277 1278 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0, 1279 (u8 *)data, len); 1280 } 1281 1282 /* This function is used to do the masking & OR'ing for the "rmw" type 1283 * callbacks. Ze should apply the mask and OR in the values in the 1284 * buffer before writing back. The problem is that it seems that 1285 * various darwin drivers implement the mask/or differently, thus 1286 * we need to check the quirks first 1287 */ 1288 static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst, 1289 u32 len, const u8 *mask, const u8 *val) 1290 { 1291 int i; 1292 1293 if (inst->quirks & pmac_i2c_quirk_invmask) { 1294 for (i = 0; i < len; i ++) 1295 inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i]; 1296 } else { 1297 for (i = 0; i < len; i ++) 1298 inst->scratch[i] = (inst->buffer[i] & ~mask[i]) 1299 | (val[i] & mask[i]); 1300 } 1301 } 1302 1303 static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen, 1304 u32 totallen, const u8 *maskdata, 1305 const u8 *valuedata) 1306 { 1307 struct pmac_i2c_pf_inst *inst = instdata; 1308 1309 if (masklen > inst->bytes || valuelen > inst->bytes || 1310 totallen > inst->bytes || valuelen > masklen) 1311 return -EINVAL; 1312 1313 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata); 1314 1315 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0, 1316 inst->scratch, totallen); 1317 } 1318 1319 static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len) 1320 { 1321 struct pmac_i2c_pf_inst *inst = instdata; 1322 1323 inst->bytes = len; 1324 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr, 1325 inst->buffer, len); 1326 } 1327 1328 static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len, 1329 const u8 *data) 1330 { 1331 struct pmac_i2c_pf_inst *inst = instdata; 1332 1333 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1, 1334 subaddr, (u8 *)data, len); 1335 } 1336 1337 static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode) 1338 { 1339 struct pmac_i2c_pf_inst *inst = instdata; 1340 1341 return pmac_i2c_setmode(inst->bus, mode); 1342 } 1343 1344 static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen, 1345 u32 valuelen, u32 totallen, const u8 *maskdata, 1346 const u8 *valuedata) 1347 { 1348 struct pmac_i2c_pf_inst *inst = instdata; 1349 1350 if (masklen > inst->bytes || valuelen > inst->bytes || 1351 totallen > inst->bytes || valuelen > masklen) 1352 return -EINVAL; 1353 1354 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata); 1355 1356 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1, 1357 subaddr, inst->scratch, totallen); 1358 } 1359 1360 static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len, 1361 const u8 *maskdata, 1362 const u8 *valuedata) 1363 { 1364 struct pmac_i2c_pf_inst *inst = instdata; 1365 int i, match; 1366 1367 /* Get return value pointer, it's assumed to be a u32 */ 1368 if (!args || !args->count || !args->u[0].p) 1369 return -EINVAL; 1370 1371 /* Check buffer */ 1372 if (len > inst->bytes) 1373 return -EINVAL; 1374 1375 for (i = 0, match = 1; match && i < len; i ++) 1376 if ((inst->buffer[i] & maskdata[i]) != valuedata[i]) 1377 match = 0; 1378 *args->u[0].p = match; 1379 return 0; 1380 } 1381 1382 static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration) 1383 { 1384 msleep((duration + 999) / 1000); 1385 return 0; 1386 } 1387 1388 1389 static struct pmf_handlers pmac_i2c_pfunc_handlers = { 1390 .begin = pmac_i2c_do_begin, 1391 .end = pmac_i2c_do_end, 1392 .read_i2c = pmac_i2c_do_read, 1393 .write_i2c = pmac_i2c_do_write, 1394 .rmw_i2c = pmac_i2c_do_rmw, 1395 .read_i2c_sub = pmac_i2c_do_read_sub, 1396 .write_i2c_sub = pmac_i2c_do_write_sub, 1397 .rmw_i2c_sub = pmac_i2c_do_rmw_sub, 1398 .set_i2c_mode = pmac_i2c_do_set_mode, 1399 .mask_and_compare = pmac_i2c_do_mask_and_comp, 1400 .delay = pmac_i2c_do_delay, 1401 }; 1402 1403 static void __init pmac_i2c_dev_create(struct device_node *np, int quirks) 1404 { 1405 DBG("dev_create(%s)\n", np->full_name); 1406 1407 pmf_register_driver(np, &pmac_i2c_pfunc_handlers, 1408 (void *)(long)quirks); 1409 } 1410 1411 static void __init pmac_i2c_dev_init(struct device_node *np, int quirks) 1412 { 1413 DBG("dev_create(%s)\n", np->full_name); 1414 1415 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL); 1416 } 1417 1418 static void pmac_i2c_dev_suspend(struct device_node *np, int quirks) 1419 { 1420 DBG("dev_suspend(%s)\n", np->full_name); 1421 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL); 1422 } 1423 1424 static void pmac_i2c_dev_resume(struct device_node *np, int quirks) 1425 { 1426 DBG("dev_resume(%s)\n", np->full_name); 1427 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL); 1428 } 1429 1430 void pmac_pfunc_i2c_suspend(void) 1431 { 1432 pmac_i2c_devscan(pmac_i2c_dev_suspend); 1433 } 1434 1435 void pmac_pfunc_i2c_resume(void) 1436 { 1437 pmac_i2c_devscan(pmac_i2c_dev_resume); 1438 } 1439 1440 /* 1441 * Initialize us: probe all i2c busses on the machine, instantiate 1442 * busses and platform functions as needed. 1443 */ 1444 /* This is non-static as it might be called early by smp code */ 1445 int __init pmac_i2c_init(void) 1446 { 1447 static int i2c_inited; 1448 1449 if (i2c_inited) 1450 return 0; 1451 i2c_inited = 1; 1452 1453 /* Probe keywest-i2c busses */ 1454 kw_i2c_probe(); 1455 1456 #ifdef CONFIG_ADB_PMU 1457 /* Probe PMU i2c busses */ 1458 pmu_i2c_probe(); 1459 #endif 1460 1461 #ifdef CONFIG_PMAC_SMU 1462 /* Probe SMU i2c busses */ 1463 smu_i2c_probe(); 1464 #endif 1465 1466 /* Now add plaform functions for some known devices */ 1467 pmac_i2c_devscan(pmac_i2c_dev_create); 1468 1469 return 0; 1470 } 1471 machine_arch_initcall(powermac, pmac_i2c_init); 1472 1473 /* Since pmac_i2c_init can be called too early for the platform device 1474 * registration, we need to do it at a later time. In our case, subsys 1475 * happens to fit well, though I agree it's a bit of a hack... 1476 */ 1477 static int __init pmac_i2c_create_platform_devices(void) 1478 { 1479 struct pmac_i2c_bus *bus; 1480 int i = 0; 1481 1482 /* In the case where we are initialized from smp_init(), we must 1483 * not use the timer (and thus the irq). It's safe from now on 1484 * though 1485 */ 1486 pmac_i2c_force_poll = 0; 1487 1488 /* Create platform devices */ 1489 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1490 bus->platform_dev = 1491 platform_device_alloc("i2c-powermac", i++); 1492 if (bus->platform_dev == NULL) 1493 return -ENOMEM; 1494 bus->platform_dev->dev.platform_data = bus; 1495 platform_device_add(bus->platform_dev); 1496 } 1497 1498 /* Now call platform "init" functions */ 1499 pmac_i2c_devscan(pmac_i2c_dev_init); 1500 1501 return 0; 1502 } 1503 machine_subsys_initcall(powermac, pmac_i2c_create_platform_devices); 1504