xref: /openbmc/linux/arch/powerpc/platforms/embedded6xx/holly.c (revision f15cbe6f1a4b4d9df59142fc8e4abb973302cf44)
1 /*
2  * Board setup routines for the IBM 750GX/CL platform w/ TSI10x bridge
3  *
4  * Copyright 2007 IBM Corporation
5  *
6  * Stephen Winiecki <stevewin@us.ibm.com>
7  * Josh Boyer <jwboyer@linux.vnet.ibm.com>
8  *
9  * Based on code from mpc7448_hpc2.c
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * version 2 as published by the Free Software Foundation.
14  */
15 
16 #include <linux/stddef.h>
17 #include <linux/kernel.h>
18 #include <linux/pci.h>
19 #include <linux/kdev_t.h>
20 #include <linux/console.h>
21 #include <linux/delay.h>
22 #include <linux/irq.h>
23 #include <linux/seq_file.h>
24 #include <linux/root_dev.h>
25 #include <linux/serial.h>
26 #include <linux/tty.h>
27 #include <linux/serial_core.h>
28 #include <linux/of_platform.h>
29 
30 #include <asm/system.h>
31 #include <asm/time.h>
32 #include <asm/machdep.h>
33 #include <asm/prom.h>
34 #include <asm/udbg.h>
35 #include <asm/tsi108.h>
36 #include <asm/pci-bridge.h>
37 #include <asm/reg.h>
38 #include <mm/mmu_decl.h>
39 #include <asm/tsi108_irq.h>
40 #include <asm/tsi108_pci.h>
41 #include <asm/mpic.h>
42 
43 #undef DEBUG
44 
45 #define HOLLY_PCI_CFG_PHYS 0x7c000000
46 
47 int holly_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn)
48 {
49 	if (bus == 0 && PCI_SLOT(devfn) == 0)
50 		return PCIBIOS_DEVICE_NOT_FOUND;
51 	else
52 		return PCIBIOS_SUCCESSFUL;
53 }
54 
55 static void holly_remap_bridge(void)
56 {
57 	u32 lut_val, lut_addr;
58 	int i;
59 
60 	printk(KERN_INFO "Remapping PCI bridge\n");
61 
62 	/* Re-init the PCI bridge and LUT registers to have mappings that don't
63 	 * rely on PIBS
64 	 */
65 	lut_addr = 0x900;
66 	for (i = 0; i < 31; i++) {
67 		tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x00000201);
68 		lut_addr += 4;
69 		tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x0);
70 		lut_addr += 4;
71 	}
72 
73 	/* Reserve the last LUT entry for PCI I/O space */
74 	tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x00000241);
75 	lut_addr += 4;
76 	tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x0);
77 
78 	/* Map PCI I/O space */
79 	tsi108_write_reg(TSI108_PCI_PFAB_IO_UPPER, 0x0);
80 	tsi108_write_reg(TSI108_PCI_PFAB_IO, 0x1);
81 
82 	/* Map PCI CFG space */
83 	tsi108_write_reg(TSI108_PCI_PFAB_BAR0_UPPER, 0x0);
84 	tsi108_write_reg(TSI108_PCI_PFAB_BAR0, 0x7c000000 | 0x01);
85 
86 	/* We don't need MEM32 and PRM remapping so disable them */
87 	tsi108_write_reg(TSI108_PCI_PFAB_MEM32, 0x0);
88 	tsi108_write_reg(TSI108_PCI_PFAB_PFM3, 0x0);
89 	tsi108_write_reg(TSI108_PCI_PFAB_PFM4, 0x0);
90 
91 	/* Set P2O_BAR0 */
92 	tsi108_write_reg(TSI108_PCI_P2O_BAR0_UPPER, 0x0);
93 	tsi108_write_reg(TSI108_PCI_P2O_BAR0, 0xc0000000);
94 
95 	/* Init the PCI LUTs to do no remapping */
96 	lut_addr = 0x500;
97 	lut_val = 0x00000002;
98 
99 	for (i = 0; i < 32; i++) {
100 		tsi108_write_reg(TSI108_PCI_OFFSET + lut_addr, lut_val);
101 		lut_addr += 4;
102 		tsi108_write_reg(TSI108_PCI_OFFSET + lut_addr, 0x40000000);
103 		lut_addr += 4;
104 		lut_val += 0x02000000;
105 	}
106 	tsi108_write_reg(TSI108_PCI_P2O_PAGE_SIZES, 0x00007900);
107 
108 	/* Set 64-bit PCI bus address for system memory */
109 	tsi108_write_reg(TSI108_PCI_P2O_BAR2_UPPER, 0x0);
110 	tsi108_write_reg(TSI108_PCI_P2O_BAR2, 0x0);
111 }
112 
113 static void __init holly_setup_arch(void)
114 {
115 	struct device_node *np;
116 
117 	if (ppc_md.progress)
118 		ppc_md.progress("holly_setup_arch():set_bridge", 0);
119 
120 	tsi108_csr_vir_base = get_vir_csrbase();
121 
122 	/* setup PCI host bridge */
123 	holly_remap_bridge();
124 
125 	np = of_find_node_by_type(NULL, "pci");
126 	if (np)
127 		tsi108_setup_pci(np, HOLLY_PCI_CFG_PHYS, 1);
128 
129 	ppc_md.pci_exclude_device = holly_exclude_device;
130 	if (ppc_md.progress)
131 		ppc_md.progress("tsi108: resources set", 0x100);
132 
133 	printk(KERN_INFO "PPC750GX/CL Platform\n");
134 }
135 
136 /*
137  * Interrupt setup and service.  Interrupts on the holly come
138  * from the four external INT pins, PCI interrupts are routed via
139  * PCI interrupt control registers, it generates internal IRQ23
140  *
141  * Interrupt routing on the Holly Board:
142  * TSI108:PB_INT[0] -> CPU0:INT#
143  * TSI108:PB_INT[1] -> CPU0:MCP#
144  * TSI108:PB_INT[2] -> N/C
145  * TSI108:PB_INT[3] -> N/C
146  */
147 static void __init holly_init_IRQ(void)
148 {
149 	struct mpic *mpic;
150 	phys_addr_t mpic_paddr = 0;
151 	struct device_node *tsi_pic;
152 #ifdef CONFIG_PCI
153 	unsigned int cascade_pci_irq;
154 	struct device_node *tsi_pci;
155 	struct device_node *cascade_node = NULL;
156 #endif
157 
158 	tsi_pic = of_find_node_by_type(NULL, "open-pic");
159 	if (tsi_pic) {
160 		unsigned int size;
161 		const void *prop = of_get_property(tsi_pic, "reg", &size);
162 		mpic_paddr = of_translate_address(tsi_pic, prop);
163 	}
164 
165 	if (mpic_paddr == 0) {
166 		printk(KERN_ERR "%s: No tsi108 PIC found !\n", __func__);
167 		return;
168 	}
169 
170 	pr_debug("%s: tsi108 pic phys_addr = 0x%x\n", __func__, (u32) mpic_paddr);
171 
172 	mpic = mpic_alloc(tsi_pic, mpic_paddr,
173 			MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
174 			MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
175 			24,
176 			NR_IRQS-4, /* num_sources used */
177 			"Tsi108_PIC");
178 
179 	BUG_ON(mpic == NULL);
180 
181 	mpic_assign_isu(mpic, 0, mpic_paddr + 0x100);
182 
183 	mpic_init(mpic);
184 
185 #ifdef CONFIG_PCI
186 	tsi_pci = of_find_node_by_type(NULL, "pci");
187 	if (tsi_pci == NULL) {
188 		printk(KERN_ERR "%s: No tsi108 pci node found !\n", __func__);
189 		return;
190 	}
191 
192 	cascade_node = of_find_node_by_type(NULL, "pic-router");
193 	if (cascade_node == NULL) {
194 		printk(KERN_ERR "%s: No tsi108 pci cascade node found !\n", __func__);
195 		return;
196 	}
197 
198 	cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0);
199 	pr_debug("%s: tsi108 cascade_pci_irq = 0x%x\n", __func__, (u32) cascade_pci_irq);
200 	tsi108_pci_int_init(cascade_node);
201 	set_irq_data(cascade_pci_irq, mpic);
202 	set_irq_chained_handler(cascade_pci_irq, tsi108_irq_cascade);
203 #endif
204 	/* Configure MPIC outputs to CPU0 */
205 	tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
206 	of_node_put(tsi_pic);
207 }
208 
209 void holly_show_cpuinfo(struct seq_file *m)
210 {
211 	seq_printf(m, "vendor\t\t: IBM\n");
212 	seq_printf(m, "machine\t\t: PPC750 GX/CL\n");
213 }
214 
215 void holly_restart(char *cmd)
216 {
217 	__be32 __iomem *ocn_bar1 = NULL;
218 	unsigned long bar;
219 	struct device_node *bridge = NULL;
220 	const void *prop;
221 	int size;
222 	phys_addr_t addr = 0xc0000000;
223 
224 	local_irq_disable();
225 
226 	bridge = of_find_node_by_type(NULL, "tsi-bridge");
227 	if (bridge) {
228 		prop = of_get_property(bridge, "reg", &size);
229 		addr = of_translate_address(bridge, prop);
230 	}
231 	addr += (TSI108_PB_OFFSET + 0x414);
232 
233 	ocn_bar1 = ioremap(addr, 0x4);
234 
235 	/* Turn on the BOOT bit so the addresses are correctly
236 	 * routed to the HLP interface */
237 	bar = ioread32be(ocn_bar1);
238 	bar |= 2;
239 	iowrite32be(bar, ocn_bar1);
240 	iosync();
241 
242 	/* Set SRR0 to the reset vector and turn on MSR_IP */
243 	mtspr(SPRN_SRR0, 0xfff00100);
244 	mtspr(SPRN_SRR1, MSR_IP);
245 
246 	/* Do an rfi to jump back to firmware.  Somewhat evil,
247 	 * but it works
248 	 */
249 	__asm__ __volatile__("rfi" : : : "memory");
250 
251 	/* Spin until reset happens.  Shouldn't really get here */
252 	for (;;) ;
253 }
254 
255 void holly_power_off(void)
256 {
257 	local_irq_disable();
258 	/* No way to shut power off with software */
259 	for (;;) ;
260 }
261 
262 void holly_halt(void)
263 {
264 	holly_power_off();
265 }
266 
267 /*
268  * Called very early, device-tree isn't unflattened
269  */
270 static int __init holly_probe(void)
271 {
272 	unsigned long root = of_get_flat_dt_root();
273 
274 	if (!of_flat_dt_is_compatible(root, "ibm,holly"))
275 		return 0;
276 	return 1;
277 }
278 
279 static int ppc750_machine_check_exception(struct pt_regs *regs)
280 {
281 	const struct exception_table_entry *entry;
282 
283 	/* Are we prepared to handle this fault */
284 	if ((entry = search_exception_tables(regs->nip)) != NULL) {
285 		tsi108_clear_pci_cfg_error();
286 		regs->msr |= MSR_RI;
287 		regs->nip = entry->fixup;
288 		return 1;
289 	}
290 	return 0;
291 }
292 
293 define_machine(holly){
294 	.name                   	= "PPC750 GX/CL TSI",
295 	.probe                  	= holly_probe,
296 	.setup_arch             	= holly_setup_arch,
297 	.init_IRQ               	= holly_init_IRQ,
298 	.show_cpuinfo           	= holly_show_cpuinfo,
299 	.get_irq                	= mpic_get_irq,
300 	.restart                	= holly_restart,
301 	.calibrate_decr         	= generic_calibrate_decr,
302 	.machine_check_exception	= ppc750_machine_check_exception,
303 	.progress               	= udbg_progress,
304 };
305