1 /* 2 * arch/powerpc/platforms/embedded6xx/flipper-pic.c 3 * 4 * Nintendo GameCube/Wii "Flipper" interrupt controller support. 5 * Copyright (C) 2004-2009 The GameCube Linux Team 6 * Copyright (C) 2007,2008,2009 Albert Herranz 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * as published by the Free Software Foundation; either version 2 11 * of the License, or (at your option) any later version. 12 * 13 */ 14 #define DRV_MODULE_NAME "flipper-pic" 15 #define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt 16 17 #include <linux/kernel.h> 18 #include <linux/init.h> 19 #include <linux/irq.h> 20 #include <linux/of.h> 21 #include <linux/of_address.h> 22 #include <asm/io.h> 23 24 #include "flipper-pic.h" 25 26 #define FLIPPER_NR_IRQS 32 27 28 /* 29 * Each interrupt has a corresponding bit in both 30 * the Interrupt Cause (ICR) and Interrupt Mask (IMR) registers. 31 * 32 * Enabling/disabling an interrupt line involves setting/clearing 33 * the corresponding bit in IMR. 34 * Except for the RSW interrupt, all interrupts get deasserted automatically 35 * when the source deasserts the interrupt. 36 */ 37 #define FLIPPER_ICR 0x00 38 #define FLIPPER_ICR_RSS (1<<16) /* reset switch state */ 39 40 #define FLIPPER_IMR 0x04 41 42 #define FLIPPER_RESET 0x24 43 44 45 /* 46 * IRQ chip hooks. 47 * 48 */ 49 50 static void flipper_pic_mask_and_ack(struct irq_data *d) 51 { 52 int irq = irqd_to_hwirq(d); 53 void __iomem *io_base = irq_data_get_irq_chip_data(d); 54 u32 mask = 1 << irq; 55 56 clrbits32(io_base + FLIPPER_IMR, mask); 57 /* this is at least needed for RSW */ 58 out_be32(io_base + FLIPPER_ICR, mask); 59 } 60 61 static void flipper_pic_ack(struct irq_data *d) 62 { 63 int irq = irqd_to_hwirq(d); 64 void __iomem *io_base = irq_data_get_irq_chip_data(d); 65 66 /* this is at least needed for RSW */ 67 out_be32(io_base + FLIPPER_ICR, 1 << irq); 68 } 69 70 static void flipper_pic_mask(struct irq_data *d) 71 { 72 int irq = irqd_to_hwirq(d); 73 void __iomem *io_base = irq_data_get_irq_chip_data(d); 74 75 clrbits32(io_base + FLIPPER_IMR, 1 << irq); 76 } 77 78 static void flipper_pic_unmask(struct irq_data *d) 79 { 80 int irq = irqd_to_hwirq(d); 81 void __iomem *io_base = irq_data_get_irq_chip_data(d); 82 83 setbits32(io_base + FLIPPER_IMR, 1 << irq); 84 } 85 86 87 static struct irq_chip flipper_pic = { 88 .name = "flipper-pic", 89 .irq_ack = flipper_pic_ack, 90 .irq_mask_ack = flipper_pic_mask_and_ack, 91 .irq_mask = flipper_pic_mask, 92 .irq_unmask = flipper_pic_unmask, 93 }; 94 95 /* 96 * IRQ host hooks. 97 * 98 */ 99 100 static struct irq_domain *flipper_irq_host; 101 102 static int flipper_pic_map(struct irq_domain *h, unsigned int virq, 103 irq_hw_number_t hwirq) 104 { 105 irq_set_chip_data(virq, h->host_data); 106 irq_set_status_flags(virq, IRQ_LEVEL); 107 irq_set_chip_and_handler(virq, &flipper_pic, handle_level_irq); 108 return 0; 109 } 110 111 static const struct irq_domain_ops flipper_irq_domain_ops = { 112 .map = flipper_pic_map, 113 }; 114 115 /* 116 * Platform hooks. 117 * 118 */ 119 120 static void __flipper_quiesce(void __iomem *io_base) 121 { 122 /* mask and ack all IRQs */ 123 out_be32(io_base + FLIPPER_IMR, 0x00000000); 124 out_be32(io_base + FLIPPER_ICR, 0xffffffff); 125 } 126 127 static struct irq_domain * __init flipper_pic_init(struct device_node *np) 128 { 129 struct device_node *pi; 130 struct irq_domain *irq_domain = NULL; 131 struct resource res; 132 void __iomem *io_base; 133 int retval; 134 135 pi = of_get_parent(np); 136 if (!pi) { 137 pr_err("no parent found\n"); 138 goto out; 139 } 140 if (!of_device_is_compatible(pi, "nintendo,flipper-pi")) { 141 pr_err("unexpected parent compatible\n"); 142 goto out; 143 } 144 145 retval = of_address_to_resource(pi, 0, &res); 146 if (retval) { 147 pr_err("no io memory range found\n"); 148 goto out; 149 } 150 io_base = ioremap(res.start, resource_size(&res)); 151 152 pr_info("controller at 0x%08x mapped to 0x%p\n", res.start, io_base); 153 154 __flipper_quiesce(io_base); 155 156 irq_domain = irq_domain_add_linear(np, FLIPPER_NR_IRQS, 157 &flipper_irq_domain_ops, io_base); 158 if (!irq_domain) { 159 pr_err("failed to allocate irq_domain\n"); 160 return NULL; 161 } 162 163 out: 164 return irq_domain; 165 } 166 167 unsigned int flipper_pic_get_irq(void) 168 { 169 void __iomem *io_base = flipper_irq_host->host_data; 170 int irq; 171 u32 irq_status; 172 173 irq_status = in_be32(io_base + FLIPPER_ICR) & 174 in_be32(io_base + FLIPPER_IMR); 175 if (irq_status == 0) 176 return 0; /* no more IRQs pending */ 177 178 irq = __ffs(irq_status); 179 return irq_linear_revmap(flipper_irq_host, irq); 180 } 181 182 /* 183 * Probe function. 184 * 185 */ 186 187 void __init flipper_pic_probe(void) 188 { 189 struct device_node *np; 190 191 np = of_find_compatible_node(NULL, NULL, "nintendo,flipper-pic"); 192 BUG_ON(!np); 193 194 flipper_irq_host = flipper_pic_init(np); 195 BUG_ON(!flipper_irq_host); 196 197 irq_set_default_host(flipper_irq_host); 198 199 of_node_put(np); 200 } 201 202 /* 203 * Misc functions related to the flipper chipset. 204 * 205 */ 206 207 /** 208 * flipper_quiesce() - quiesce flipper irq controller 209 * 210 * Mask and ack all interrupt sources. 211 * 212 */ 213 void flipper_quiesce(void) 214 { 215 void __iomem *io_base = flipper_irq_host->host_data; 216 217 __flipper_quiesce(io_base); 218 } 219 220 /* 221 * Resets the platform. 222 */ 223 void flipper_platform_reset(void) 224 { 225 void __iomem *io_base; 226 227 if (flipper_irq_host && flipper_irq_host->host_data) { 228 io_base = flipper_irq_host->host_data; 229 out_8(io_base + FLIPPER_RESET, 0x00); 230 } 231 } 232 233 /* 234 * Returns non-zero if the reset button is pressed. 235 */ 236 int flipper_is_reset_button_pressed(void) 237 { 238 void __iomem *io_base; 239 u32 icr; 240 241 if (flipper_irq_host && flipper_irq_host->host_data) { 242 io_base = flipper_irq_host->host_data; 243 icr = in_be32(io_base + FLIPPER_ICR); 244 return !(icr & FLIPPER_ICR_RSS); 245 } 246 return 0; 247 } 248 249