1 /*
2  * Low-level SPU handling
3  *
4  * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
5  *
6  * Author: Arnd Bergmann <arndb@de.ibm.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2, or (at your option)
11  * any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22 
23 #undef DEBUG
24 
25 #include <linux/interrupt.h>
26 #include <linux/list.h>
27 #include <linux/init.h>
28 #include <linux/ptrace.h>
29 #include <linux/slab.h>
30 #include <linux/wait.h>
31 #include <linux/mm.h>
32 #include <linux/io.h>
33 #include <linux/mutex.h>
34 #include <linux/linux_logo.h>
35 #include <linux/syscore_ops.h>
36 #include <asm/spu.h>
37 #include <asm/spu_priv1.h>
38 #include <asm/spu_csa.h>
39 #include <asm/xmon.h>
40 #include <asm/prom.h>
41 #include <asm/kexec.h>
42 
43 const struct spu_management_ops *spu_management_ops;
44 EXPORT_SYMBOL_GPL(spu_management_ops);
45 
46 const struct spu_priv1_ops *spu_priv1_ops;
47 EXPORT_SYMBOL_GPL(spu_priv1_ops);
48 
49 struct cbe_spu_info cbe_spu_info[MAX_NUMNODES];
50 EXPORT_SYMBOL_GPL(cbe_spu_info);
51 
52 /*
53  * The spufs fault-handling code needs to call force_sig_info to raise signals
54  * on DMA errors. Export it here to avoid general kernel-wide access to this
55  * function
56  */
57 EXPORT_SYMBOL_GPL(force_sig_info);
58 
59 /*
60  * Protects cbe_spu_info and spu->number.
61  */
62 static DEFINE_SPINLOCK(spu_lock);
63 
64 /*
65  * List of all spus in the system.
66  *
67  * This list is iterated by callers from irq context and callers that
68  * want to sleep.  Thus modifications need to be done with both
69  * spu_full_list_lock and spu_full_list_mutex held, while iterating
70  * through it requires either of these locks.
71  *
72  * In addition spu_full_list_lock protects all assignments to
73  * spu->mm.
74  */
75 static LIST_HEAD(spu_full_list);
76 static DEFINE_SPINLOCK(spu_full_list_lock);
77 static DEFINE_MUTEX(spu_full_list_mutex);
78 
79 void spu_invalidate_slbs(struct spu *spu)
80 {
81 	struct spu_priv2 __iomem *priv2 = spu->priv2;
82 	unsigned long flags;
83 
84 	spin_lock_irqsave(&spu->register_lock, flags);
85 	if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK)
86 		out_be64(&priv2->slb_invalidate_all_W, 0UL);
87 	spin_unlock_irqrestore(&spu->register_lock, flags);
88 }
89 EXPORT_SYMBOL_GPL(spu_invalidate_slbs);
90 
91 /* This is called by the MM core when a segment size is changed, to
92  * request a flush of all the SPEs using a given mm
93  */
94 void spu_flush_all_slbs(struct mm_struct *mm)
95 {
96 	struct spu *spu;
97 	unsigned long flags;
98 
99 	spin_lock_irqsave(&spu_full_list_lock, flags);
100 	list_for_each_entry(spu, &spu_full_list, full_list) {
101 		if (spu->mm == mm)
102 			spu_invalidate_slbs(spu);
103 	}
104 	spin_unlock_irqrestore(&spu_full_list_lock, flags);
105 }
106 
107 /* The hack below stinks... try to do something better one of
108  * these days... Does it even work properly with NR_CPUS == 1 ?
109  */
110 static inline void mm_needs_global_tlbie(struct mm_struct *mm)
111 {
112 	int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1;
113 
114 	/* Global TLBIE broadcast required with SPEs. */
115 	bitmap_fill(cpumask_bits(mm_cpumask(mm)), nr);
116 }
117 
118 void spu_associate_mm(struct spu *spu, struct mm_struct *mm)
119 {
120 	unsigned long flags;
121 
122 	spin_lock_irqsave(&spu_full_list_lock, flags);
123 	spu->mm = mm;
124 	spin_unlock_irqrestore(&spu_full_list_lock, flags);
125 	if (mm)
126 		mm_needs_global_tlbie(mm);
127 }
128 EXPORT_SYMBOL_GPL(spu_associate_mm);
129 
130 int spu_64k_pages_available(void)
131 {
132 	return mmu_psize_defs[MMU_PAGE_64K].shift != 0;
133 }
134 EXPORT_SYMBOL_GPL(spu_64k_pages_available);
135 
136 static void spu_restart_dma(struct spu *spu)
137 {
138 	struct spu_priv2 __iomem *priv2 = spu->priv2;
139 
140 	if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
141 		out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
142 	else {
143 		set_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags);
144 		mb();
145 	}
146 }
147 
148 static inline void spu_load_slb(struct spu *spu, int slbe, struct copro_slb *slb)
149 {
150 	struct spu_priv2 __iomem *priv2 = spu->priv2;
151 
152 	pr_debug("%s: adding SLB[%d] 0x%016llx 0x%016llx\n",
153 			__func__, slbe, slb->vsid, slb->esid);
154 
155 	out_be64(&priv2->slb_index_W, slbe);
156 	/* set invalid before writing vsid */
157 	out_be64(&priv2->slb_esid_RW, 0);
158 	/* now it's safe to write the vsid */
159 	out_be64(&priv2->slb_vsid_RW, slb->vsid);
160 	/* setting the new esid makes the entry valid again */
161 	out_be64(&priv2->slb_esid_RW, slb->esid);
162 }
163 
164 static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
165 {
166 	struct copro_slb slb;
167 	int ret;
168 
169 	ret = copro_calculate_slb(spu->mm, ea, &slb);
170 	if (ret)
171 		return ret;
172 
173 	spu_load_slb(spu, spu->slb_replace, &slb);
174 
175 	spu->slb_replace++;
176 	if (spu->slb_replace >= 8)
177 		spu->slb_replace = 0;
178 
179 	spu_restart_dma(spu);
180 	spu->stats.slb_flt++;
181 	return 0;
182 }
183 
184 extern int hash_page(unsigned long ea, unsigned long access,
185 		     unsigned long trap, unsigned long dsisr); //XXX
186 static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
187 {
188 	int ret;
189 
190 	pr_debug("%s, %llx, %lx\n", __func__, dsisr, ea);
191 
192 	/*
193 	 * Handle kernel space hash faults immediately. User hash
194 	 * faults need to be deferred to process context.
195 	 */
196 	if ((dsisr & MFC_DSISR_PTE_NOT_FOUND) &&
197 	    (REGION_ID(ea) != USER_REGION_ID)) {
198 
199 		spin_unlock(&spu->register_lock);
200 		ret = hash_page(ea,
201 				_PAGE_PRESENT | _PAGE_READ | _PAGE_PRIVILEGED,
202 				0x300, dsisr);
203 		spin_lock(&spu->register_lock);
204 
205 		if (!ret) {
206 			spu_restart_dma(spu);
207 			return 0;
208 		}
209 	}
210 
211 	spu->class_1_dar = ea;
212 	spu->class_1_dsisr = dsisr;
213 
214 	spu->stop_callback(spu, 1);
215 
216 	spu->class_1_dar = 0;
217 	spu->class_1_dsisr = 0;
218 
219 	return 0;
220 }
221 
222 static void __spu_kernel_slb(void *addr, struct copro_slb *slb)
223 {
224 	unsigned long ea = (unsigned long)addr;
225 	u64 llp;
226 
227 	if (REGION_ID(ea) == KERNEL_REGION_ID)
228 		llp = mmu_psize_defs[mmu_linear_psize].sllp;
229 	else
230 		llp = mmu_psize_defs[mmu_virtual_psize].sllp;
231 
232 	slb->vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
233 		SLB_VSID_KERNEL | llp;
234 	slb->esid = (ea & ESID_MASK) | SLB_ESID_V;
235 }
236 
237 /**
238  * Given an array of @nr_slbs SLB entries, @slbs, return non-zero if the
239  * address @new_addr is present.
240  */
241 static inline int __slb_present(struct copro_slb *slbs, int nr_slbs,
242 		void *new_addr)
243 {
244 	unsigned long ea = (unsigned long)new_addr;
245 	int i;
246 
247 	for (i = 0; i < nr_slbs; i++)
248 		if (!((slbs[i].esid ^ ea) & ESID_MASK))
249 			return 1;
250 
251 	return 0;
252 }
253 
254 /**
255  * Setup the SPU kernel SLBs, in preparation for a context save/restore. We
256  * need to map both the context save area, and the save/restore code.
257  *
258  * Because the lscsa and code may cross segment boundaries, we check to see
259  * if mappings are required for the start and end of each range. We currently
260  * assume that the mappings are smaller that one segment - if not, something
261  * is seriously wrong.
262  */
263 void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa,
264 		void *code, int code_size)
265 {
266 	struct copro_slb slbs[4];
267 	int i, nr_slbs = 0;
268 	/* start and end addresses of both mappings */
269 	void *addrs[] = {
270 		lscsa, (void *)lscsa + sizeof(*lscsa) - 1,
271 		code, code + code_size - 1
272 	};
273 
274 	/* check the set of addresses, and create a new entry in the slbs array
275 	 * if there isn't already a SLB for that address */
276 	for (i = 0; i < ARRAY_SIZE(addrs); i++) {
277 		if (__slb_present(slbs, nr_slbs, addrs[i]))
278 			continue;
279 
280 		__spu_kernel_slb(addrs[i], &slbs[nr_slbs]);
281 		nr_slbs++;
282 	}
283 
284 	spin_lock_irq(&spu->register_lock);
285 	/* Add the set of SLBs */
286 	for (i = 0; i < nr_slbs; i++)
287 		spu_load_slb(spu, i, &slbs[i]);
288 	spin_unlock_irq(&spu->register_lock);
289 }
290 EXPORT_SYMBOL_GPL(spu_setup_kernel_slbs);
291 
292 static irqreturn_t
293 spu_irq_class_0(int irq, void *data)
294 {
295 	struct spu *spu;
296 	unsigned long stat, mask;
297 
298 	spu = data;
299 
300 	spin_lock(&spu->register_lock);
301 	mask = spu_int_mask_get(spu, 0);
302 	stat = spu_int_stat_get(spu, 0) & mask;
303 
304 	spu->class_0_pending |= stat;
305 	spu->class_0_dar = spu_mfc_dar_get(spu);
306 	spu->stop_callback(spu, 0);
307 	spu->class_0_pending = 0;
308 	spu->class_0_dar = 0;
309 
310 	spu_int_stat_clear(spu, 0, stat);
311 	spin_unlock(&spu->register_lock);
312 
313 	return IRQ_HANDLED;
314 }
315 
316 static irqreturn_t
317 spu_irq_class_1(int irq, void *data)
318 {
319 	struct spu *spu;
320 	unsigned long stat, mask, dar, dsisr;
321 
322 	spu = data;
323 
324 	/* atomically read & clear class1 status. */
325 	spin_lock(&spu->register_lock);
326 	mask  = spu_int_mask_get(spu, 1);
327 	stat  = spu_int_stat_get(spu, 1) & mask;
328 	dar   = spu_mfc_dar_get(spu);
329 	dsisr = spu_mfc_dsisr_get(spu);
330 	if (stat & CLASS1_STORAGE_FAULT_INTR)
331 		spu_mfc_dsisr_set(spu, 0ul);
332 	spu_int_stat_clear(spu, 1, stat);
333 
334 	pr_debug("%s: %lx %lx %lx %lx\n", __func__, mask, stat,
335 			dar, dsisr);
336 
337 	if (stat & CLASS1_SEGMENT_FAULT_INTR)
338 		__spu_trap_data_seg(spu, dar);
339 
340 	if (stat & CLASS1_STORAGE_FAULT_INTR)
341 		__spu_trap_data_map(spu, dar, dsisr);
342 
343 	if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_GET_INTR)
344 		;
345 
346 	if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR)
347 		;
348 
349 	spu->class_1_dsisr = 0;
350 	spu->class_1_dar = 0;
351 
352 	spin_unlock(&spu->register_lock);
353 
354 	return stat ? IRQ_HANDLED : IRQ_NONE;
355 }
356 
357 static irqreturn_t
358 spu_irq_class_2(int irq, void *data)
359 {
360 	struct spu *spu;
361 	unsigned long stat;
362 	unsigned long mask;
363 	const int mailbox_intrs =
364 		CLASS2_MAILBOX_THRESHOLD_INTR | CLASS2_MAILBOX_INTR;
365 
366 	spu = data;
367 	spin_lock(&spu->register_lock);
368 	stat = spu_int_stat_get(spu, 2);
369 	mask = spu_int_mask_get(spu, 2);
370 	/* ignore interrupts we're not waiting for */
371 	stat &= mask;
372 	/* mailbox interrupts are level triggered. mask them now before
373 	 * acknowledging */
374 	if (stat & mailbox_intrs)
375 		spu_int_mask_and(spu, 2, ~(stat & mailbox_intrs));
376 	/* acknowledge all interrupts before the callbacks */
377 	spu_int_stat_clear(spu, 2, stat);
378 
379 	pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
380 
381 	if (stat & CLASS2_MAILBOX_INTR)
382 		spu->ibox_callback(spu);
383 
384 	if (stat & CLASS2_SPU_STOP_INTR)
385 		spu->stop_callback(spu, 2);
386 
387 	if (stat & CLASS2_SPU_HALT_INTR)
388 		spu->stop_callback(spu, 2);
389 
390 	if (stat & CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR)
391 		spu->mfc_callback(spu);
392 
393 	if (stat & CLASS2_MAILBOX_THRESHOLD_INTR)
394 		spu->wbox_callback(spu);
395 
396 	spu->stats.class2_intr++;
397 
398 	spin_unlock(&spu->register_lock);
399 
400 	return stat ? IRQ_HANDLED : IRQ_NONE;
401 }
402 
403 static int spu_request_irqs(struct spu *spu)
404 {
405 	int ret = 0;
406 
407 	if (spu->irqs[0]) {
408 		snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
409 			 spu->number);
410 		ret = request_irq(spu->irqs[0], spu_irq_class_0,
411 				  0, spu->irq_c0, spu);
412 		if (ret)
413 			goto bail0;
414 	}
415 	if (spu->irqs[1]) {
416 		snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
417 			 spu->number);
418 		ret = request_irq(spu->irqs[1], spu_irq_class_1,
419 				  0, spu->irq_c1, spu);
420 		if (ret)
421 			goto bail1;
422 	}
423 	if (spu->irqs[2]) {
424 		snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
425 			 spu->number);
426 		ret = request_irq(spu->irqs[2], spu_irq_class_2,
427 				  0, spu->irq_c2, spu);
428 		if (ret)
429 			goto bail2;
430 	}
431 	return 0;
432 
433 bail2:
434 	if (spu->irqs[1])
435 		free_irq(spu->irqs[1], spu);
436 bail1:
437 	if (spu->irqs[0])
438 		free_irq(spu->irqs[0], spu);
439 bail0:
440 	return ret;
441 }
442 
443 static void spu_free_irqs(struct spu *spu)
444 {
445 	if (spu->irqs[0])
446 		free_irq(spu->irqs[0], spu);
447 	if (spu->irqs[1])
448 		free_irq(spu->irqs[1], spu);
449 	if (spu->irqs[2])
450 		free_irq(spu->irqs[2], spu);
451 }
452 
453 void spu_init_channels(struct spu *spu)
454 {
455 	static const struct {
456 		 unsigned channel;
457 		 unsigned count;
458 	} zero_list[] = {
459 		{ 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
460 		{ 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
461 	}, count_list[] = {
462 		{ 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
463 		{ 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
464 		{ 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
465 	};
466 	struct spu_priv2 __iomem *priv2;
467 	int i;
468 
469 	priv2 = spu->priv2;
470 
471 	/* initialize all channel data to zero */
472 	for (i = 0; i < ARRAY_SIZE(zero_list); i++) {
473 		int count;
474 
475 		out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel);
476 		for (count = 0; count < zero_list[i].count; count++)
477 			out_be64(&priv2->spu_chnldata_RW, 0);
478 	}
479 
480 	/* initialize channel counts to meaningful values */
481 	for (i = 0; i < ARRAY_SIZE(count_list); i++) {
482 		out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel);
483 		out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count);
484 	}
485 }
486 EXPORT_SYMBOL_GPL(spu_init_channels);
487 
488 static struct bus_type spu_subsys = {
489 	.name = "spu",
490 	.dev_name = "spu",
491 };
492 
493 int spu_add_dev_attr(struct device_attribute *attr)
494 {
495 	struct spu *spu;
496 
497 	mutex_lock(&spu_full_list_mutex);
498 	list_for_each_entry(spu, &spu_full_list, full_list)
499 		device_create_file(&spu->dev, attr);
500 	mutex_unlock(&spu_full_list_mutex);
501 
502 	return 0;
503 }
504 EXPORT_SYMBOL_GPL(spu_add_dev_attr);
505 
506 int spu_add_dev_attr_group(struct attribute_group *attrs)
507 {
508 	struct spu *spu;
509 	int rc = 0;
510 
511 	mutex_lock(&spu_full_list_mutex);
512 	list_for_each_entry(spu, &spu_full_list, full_list) {
513 		rc = sysfs_create_group(&spu->dev.kobj, attrs);
514 
515 		/* we're in trouble here, but try unwinding anyway */
516 		if (rc) {
517 			printk(KERN_ERR "%s: can't create sysfs group '%s'\n",
518 					__func__, attrs->name);
519 
520 			list_for_each_entry_continue_reverse(spu,
521 					&spu_full_list, full_list)
522 				sysfs_remove_group(&spu->dev.kobj, attrs);
523 			break;
524 		}
525 	}
526 
527 	mutex_unlock(&spu_full_list_mutex);
528 
529 	return rc;
530 }
531 EXPORT_SYMBOL_GPL(spu_add_dev_attr_group);
532 
533 
534 void spu_remove_dev_attr(struct device_attribute *attr)
535 {
536 	struct spu *spu;
537 
538 	mutex_lock(&spu_full_list_mutex);
539 	list_for_each_entry(spu, &spu_full_list, full_list)
540 		device_remove_file(&spu->dev, attr);
541 	mutex_unlock(&spu_full_list_mutex);
542 }
543 EXPORT_SYMBOL_GPL(spu_remove_dev_attr);
544 
545 void spu_remove_dev_attr_group(struct attribute_group *attrs)
546 {
547 	struct spu *spu;
548 
549 	mutex_lock(&spu_full_list_mutex);
550 	list_for_each_entry(spu, &spu_full_list, full_list)
551 		sysfs_remove_group(&spu->dev.kobj, attrs);
552 	mutex_unlock(&spu_full_list_mutex);
553 }
554 EXPORT_SYMBOL_GPL(spu_remove_dev_attr_group);
555 
556 static int spu_create_dev(struct spu *spu)
557 {
558 	int ret;
559 
560 	spu->dev.id = spu->number;
561 	spu->dev.bus = &spu_subsys;
562 	ret = device_register(&spu->dev);
563 	if (ret) {
564 		printk(KERN_ERR "Can't register SPU %d with sysfs\n",
565 				spu->number);
566 		return ret;
567 	}
568 
569 	sysfs_add_device_to_node(&spu->dev, spu->node);
570 
571 	return 0;
572 }
573 
574 static int __init create_spu(void *data)
575 {
576 	struct spu *spu;
577 	int ret;
578 	static int number;
579 	unsigned long flags;
580 
581 	ret = -ENOMEM;
582 	spu = kzalloc(sizeof (*spu), GFP_KERNEL);
583 	if (!spu)
584 		goto out;
585 
586 	spu->alloc_state = SPU_FREE;
587 
588 	spin_lock_init(&spu->register_lock);
589 	spin_lock(&spu_lock);
590 	spu->number = number++;
591 	spin_unlock(&spu_lock);
592 
593 	ret = spu_create_spu(spu, data);
594 
595 	if (ret)
596 		goto out_free;
597 
598 	spu_mfc_sdr_setup(spu);
599 	spu_mfc_sr1_set(spu, 0x33);
600 	ret = spu_request_irqs(spu);
601 	if (ret)
602 		goto out_destroy;
603 
604 	ret = spu_create_dev(spu);
605 	if (ret)
606 		goto out_free_irqs;
607 
608 	mutex_lock(&cbe_spu_info[spu->node].list_mutex);
609 	list_add(&spu->cbe_list, &cbe_spu_info[spu->node].spus);
610 	cbe_spu_info[spu->node].n_spus++;
611 	mutex_unlock(&cbe_spu_info[spu->node].list_mutex);
612 
613 	mutex_lock(&spu_full_list_mutex);
614 	spin_lock_irqsave(&spu_full_list_lock, flags);
615 	list_add(&spu->full_list, &spu_full_list);
616 	spin_unlock_irqrestore(&spu_full_list_lock, flags);
617 	mutex_unlock(&spu_full_list_mutex);
618 
619 	spu->stats.util_state = SPU_UTIL_IDLE_LOADED;
620 	spu->stats.tstamp = ktime_get_ns();
621 
622 	INIT_LIST_HEAD(&spu->aff_list);
623 
624 	goto out;
625 
626 out_free_irqs:
627 	spu_free_irqs(spu);
628 out_destroy:
629 	spu_destroy_spu(spu);
630 out_free:
631 	kfree(spu);
632 out:
633 	return ret;
634 }
635 
636 static const char *spu_state_names[] = {
637 	"user", "system", "iowait", "idle"
638 };
639 
640 static unsigned long long spu_acct_time(struct spu *spu,
641 		enum spu_utilization_state state)
642 {
643 	unsigned long long time = spu->stats.times[state];
644 
645 	/*
646 	 * If the spu is idle or the context is stopped, utilization
647 	 * statistics are not updated.  Apply the time delta from the
648 	 * last recorded state of the spu.
649 	 */
650 	if (spu->stats.util_state == state)
651 		time += ktime_get_ns() - spu->stats.tstamp;
652 
653 	return time / NSEC_PER_MSEC;
654 }
655 
656 
657 static ssize_t spu_stat_show(struct device *dev,
658 				struct device_attribute *attr, char *buf)
659 {
660 	struct spu *spu = container_of(dev, struct spu, dev);
661 
662 	return sprintf(buf, "%s %llu %llu %llu %llu "
663 		      "%llu %llu %llu %llu %llu %llu %llu %llu\n",
664 		spu_state_names[spu->stats.util_state],
665 		spu_acct_time(spu, SPU_UTIL_USER),
666 		spu_acct_time(spu, SPU_UTIL_SYSTEM),
667 		spu_acct_time(spu, SPU_UTIL_IOWAIT),
668 		spu_acct_time(spu, SPU_UTIL_IDLE_LOADED),
669 		spu->stats.vol_ctx_switch,
670 		spu->stats.invol_ctx_switch,
671 		spu->stats.slb_flt,
672 		spu->stats.hash_flt,
673 		spu->stats.min_flt,
674 		spu->stats.maj_flt,
675 		spu->stats.class2_intr,
676 		spu->stats.libassist);
677 }
678 
679 static DEVICE_ATTR(stat, 0444, spu_stat_show, NULL);
680 
681 #ifdef CONFIG_KEXEC_CORE
682 
683 struct crash_spu_info {
684 	struct spu *spu;
685 	u32 saved_spu_runcntl_RW;
686 	u32 saved_spu_status_R;
687 	u32 saved_spu_npc_RW;
688 	u64 saved_mfc_sr1_RW;
689 	u64 saved_mfc_dar;
690 	u64 saved_mfc_dsisr;
691 };
692 
693 #define CRASH_NUM_SPUS	16	/* Enough for current hardware */
694 static struct crash_spu_info crash_spu_info[CRASH_NUM_SPUS];
695 
696 static void crash_kexec_stop_spus(void)
697 {
698 	struct spu *spu;
699 	int i;
700 	u64 tmp;
701 
702 	for (i = 0; i < CRASH_NUM_SPUS; i++) {
703 		if (!crash_spu_info[i].spu)
704 			continue;
705 
706 		spu = crash_spu_info[i].spu;
707 
708 		crash_spu_info[i].saved_spu_runcntl_RW =
709 			in_be32(&spu->problem->spu_runcntl_RW);
710 		crash_spu_info[i].saved_spu_status_R =
711 			in_be32(&spu->problem->spu_status_R);
712 		crash_spu_info[i].saved_spu_npc_RW =
713 			in_be32(&spu->problem->spu_npc_RW);
714 
715 		crash_spu_info[i].saved_mfc_dar    = spu_mfc_dar_get(spu);
716 		crash_spu_info[i].saved_mfc_dsisr  = spu_mfc_dsisr_get(spu);
717 		tmp = spu_mfc_sr1_get(spu);
718 		crash_spu_info[i].saved_mfc_sr1_RW = tmp;
719 
720 		tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
721 		spu_mfc_sr1_set(spu, tmp);
722 
723 		__delay(200);
724 	}
725 }
726 
727 static void crash_register_spus(struct list_head *list)
728 {
729 	struct spu *spu;
730 	int ret;
731 
732 	list_for_each_entry(spu, list, full_list) {
733 		if (WARN_ON(spu->number >= CRASH_NUM_SPUS))
734 			continue;
735 
736 		crash_spu_info[spu->number].spu = spu;
737 	}
738 
739 	ret = crash_shutdown_register(&crash_kexec_stop_spus);
740 	if (ret)
741 		printk(KERN_ERR "Could not register SPU crash handler");
742 }
743 
744 #else
745 static inline void crash_register_spus(struct list_head *list)
746 {
747 }
748 #endif
749 
750 static void spu_shutdown(void)
751 {
752 	struct spu *spu;
753 
754 	mutex_lock(&spu_full_list_mutex);
755 	list_for_each_entry(spu, &spu_full_list, full_list) {
756 		spu_free_irqs(spu);
757 		spu_destroy_spu(spu);
758 	}
759 	mutex_unlock(&spu_full_list_mutex);
760 }
761 
762 static struct syscore_ops spu_syscore_ops = {
763 	.shutdown = spu_shutdown,
764 };
765 
766 static int __init init_spu_base(void)
767 {
768 	int i, ret = 0;
769 
770 	for (i = 0; i < MAX_NUMNODES; i++) {
771 		mutex_init(&cbe_spu_info[i].list_mutex);
772 		INIT_LIST_HEAD(&cbe_spu_info[i].spus);
773 	}
774 
775 	if (!spu_management_ops)
776 		goto out;
777 
778 	/* create system subsystem for spus */
779 	ret = subsys_system_register(&spu_subsys, NULL);
780 	if (ret)
781 		goto out;
782 
783 	ret = spu_enumerate_spus(create_spu);
784 
785 	if (ret < 0) {
786 		printk(KERN_WARNING "%s: Error initializing spus\n",
787 			__func__);
788 		goto out_unregister_subsys;
789 	}
790 
791 	if (ret > 0)
792 		fb_append_extra_logo(&logo_spe_clut224, ret);
793 
794 	mutex_lock(&spu_full_list_mutex);
795 	xmon_register_spus(&spu_full_list);
796 	crash_register_spus(&spu_full_list);
797 	mutex_unlock(&spu_full_list_mutex);
798 	spu_add_dev_attr(&dev_attr_stat);
799 	register_syscore_ops(&spu_syscore_ops);
800 
801 	spu_init_affinity();
802 
803 	return 0;
804 
805  out_unregister_subsys:
806 	bus_unregister(&spu_subsys);
807  out:
808 	return ret;
809 }
810 device_initcall(init_spu_base);
811