1 /* 2 * Low-level SPU handling 3 * 4 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005 5 * 6 * Author: Arnd Bergmann <arndb@de.ibm.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2, or (at your option) 11 * any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 */ 22 23 #undef DEBUG 24 25 #include <linux/interrupt.h> 26 #include <linux/list.h> 27 #include <linux/module.h> 28 #include <linux/ptrace.h> 29 #include <linux/slab.h> 30 #include <linux/wait.h> 31 #include <linux/mm.h> 32 #include <linux/io.h> 33 #include <linux/mutex.h> 34 #include <linux/linux_logo.h> 35 #include <linux/syscore_ops.h> 36 #include <asm/spu.h> 37 #include <asm/spu_priv1.h> 38 #include <asm/spu_csa.h> 39 #include <asm/xmon.h> 40 #include <asm/prom.h> 41 #include <asm/kexec.h> 42 43 const struct spu_management_ops *spu_management_ops; 44 EXPORT_SYMBOL_GPL(spu_management_ops); 45 46 const struct spu_priv1_ops *spu_priv1_ops; 47 EXPORT_SYMBOL_GPL(spu_priv1_ops); 48 49 struct cbe_spu_info cbe_spu_info[MAX_NUMNODES]; 50 EXPORT_SYMBOL_GPL(cbe_spu_info); 51 52 /* 53 * The spufs fault-handling code needs to call force_sig_info to raise signals 54 * on DMA errors. Export it here to avoid general kernel-wide access to this 55 * function 56 */ 57 EXPORT_SYMBOL_GPL(force_sig_info); 58 59 /* 60 * Protects cbe_spu_info and spu->number. 61 */ 62 static DEFINE_SPINLOCK(spu_lock); 63 64 /* 65 * List of all spus in the system. 66 * 67 * This list is iterated by callers from irq context and callers that 68 * want to sleep. Thus modifications need to be done with both 69 * spu_full_list_lock and spu_full_list_mutex held, while iterating 70 * through it requires either of these locks. 71 * 72 * In addition spu_full_list_lock protects all assignmens to 73 * spu->mm. 74 */ 75 static LIST_HEAD(spu_full_list); 76 static DEFINE_SPINLOCK(spu_full_list_lock); 77 static DEFINE_MUTEX(spu_full_list_mutex); 78 79 void spu_invalidate_slbs(struct spu *spu) 80 { 81 struct spu_priv2 __iomem *priv2 = spu->priv2; 82 unsigned long flags; 83 84 spin_lock_irqsave(&spu->register_lock, flags); 85 if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK) 86 out_be64(&priv2->slb_invalidate_all_W, 0UL); 87 spin_unlock_irqrestore(&spu->register_lock, flags); 88 } 89 EXPORT_SYMBOL_GPL(spu_invalidate_slbs); 90 91 /* This is called by the MM core when a segment size is changed, to 92 * request a flush of all the SPEs using a given mm 93 */ 94 void spu_flush_all_slbs(struct mm_struct *mm) 95 { 96 struct spu *spu; 97 unsigned long flags; 98 99 spin_lock_irqsave(&spu_full_list_lock, flags); 100 list_for_each_entry(spu, &spu_full_list, full_list) { 101 if (spu->mm == mm) 102 spu_invalidate_slbs(spu); 103 } 104 spin_unlock_irqrestore(&spu_full_list_lock, flags); 105 } 106 107 /* The hack below stinks... try to do something better one of 108 * these days... Does it even work properly with NR_CPUS == 1 ? 109 */ 110 static inline void mm_needs_global_tlbie(struct mm_struct *mm) 111 { 112 int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1; 113 114 /* Global TLBIE broadcast required with SPEs. */ 115 bitmap_fill(cpumask_bits(mm_cpumask(mm)), nr); 116 } 117 118 void spu_associate_mm(struct spu *spu, struct mm_struct *mm) 119 { 120 unsigned long flags; 121 122 spin_lock_irqsave(&spu_full_list_lock, flags); 123 spu->mm = mm; 124 spin_unlock_irqrestore(&spu_full_list_lock, flags); 125 if (mm) 126 mm_needs_global_tlbie(mm); 127 } 128 EXPORT_SYMBOL_GPL(spu_associate_mm); 129 130 int spu_64k_pages_available(void) 131 { 132 return mmu_psize_defs[MMU_PAGE_64K].shift != 0; 133 } 134 EXPORT_SYMBOL_GPL(spu_64k_pages_available); 135 136 static void spu_restart_dma(struct spu *spu) 137 { 138 struct spu_priv2 __iomem *priv2 = spu->priv2; 139 140 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags)) 141 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND); 142 else { 143 set_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags); 144 mb(); 145 } 146 } 147 148 static inline void spu_load_slb(struct spu *spu, int slbe, struct copro_slb *slb) 149 { 150 struct spu_priv2 __iomem *priv2 = spu->priv2; 151 152 pr_debug("%s: adding SLB[%d] 0x%016llx 0x%016llx\n", 153 __func__, slbe, slb->vsid, slb->esid); 154 155 out_be64(&priv2->slb_index_W, slbe); 156 /* set invalid before writing vsid */ 157 out_be64(&priv2->slb_esid_RW, 0); 158 /* now it's safe to write the vsid */ 159 out_be64(&priv2->slb_vsid_RW, slb->vsid); 160 /* setting the new esid makes the entry valid again */ 161 out_be64(&priv2->slb_esid_RW, slb->esid); 162 } 163 164 static int __spu_trap_data_seg(struct spu *spu, unsigned long ea) 165 { 166 struct copro_slb slb; 167 int ret; 168 169 ret = copro_calculate_slb(spu->mm, ea, &slb); 170 if (ret) 171 return ret; 172 173 spu_load_slb(spu, spu->slb_replace, &slb); 174 175 spu->slb_replace++; 176 if (spu->slb_replace >= 8) 177 spu->slb_replace = 0; 178 179 spu_restart_dma(spu); 180 spu->stats.slb_flt++; 181 return 0; 182 } 183 184 extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX 185 static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr) 186 { 187 int ret; 188 189 pr_debug("%s, %llx, %lx\n", __func__, dsisr, ea); 190 191 /* 192 * Handle kernel space hash faults immediately. User hash 193 * faults need to be deferred to process context. 194 */ 195 if ((dsisr & MFC_DSISR_PTE_NOT_FOUND) && 196 (REGION_ID(ea) != USER_REGION_ID)) { 197 198 spin_unlock(&spu->register_lock); 199 ret = hash_page(ea, _PAGE_PRESENT, 0x300); 200 spin_lock(&spu->register_lock); 201 202 if (!ret) { 203 spu_restart_dma(spu); 204 return 0; 205 } 206 } 207 208 spu->class_1_dar = ea; 209 spu->class_1_dsisr = dsisr; 210 211 spu->stop_callback(spu, 1); 212 213 spu->class_1_dar = 0; 214 spu->class_1_dsisr = 0; 215 216 return 0; 217 } 218 219 static void __spu_kernel_slb(void *addr, struct copro_slb *slb) 220 { 221 unsigned long ea = (unsigned long)addr; 222 u64 llp; 223 224 if (REGION_ID(ea) == KERNEL_REGION_ID) 225 llp = mmu_psize_defs[mmu_linear_psize].sllp; 226 else 227 llp = mmu_psize_defs[mmu_virtual_psize].sllp; 228 229 slb->vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) | 230 SLB_VSID_KERNEL | llp; 231 slb->esid = (ea & ESID_MASK) | SLB_ESID_V; 232 } 233 234 /** 235 * Given an array of @nr_slbs SLB entries, @slbs, return non-zero if the 236 * address @new_addr is present. 237 */ 238 static inline int __slb_present(struct copro_slb *slbs, int nr_slbs, 239 void *new_addr) 240 { 241 unsigned long ea = (unsigned long)new_addr; 242 int i; 243 244 for (i = 0; i < nr_slbs; i++) 245 if (!((slbs[i].esid ^ ea) & ESID_MASK)) 246 return 1; 247 248 return 0; 249 } 250 251 /** 252 * Setup the SPU kernel SLBs, in preparation for a context save/restore. We 253 * need to map both the context save area, and the save/restore code. 254 * 255 * Because the lscsa and code may cross segment boundaires, we check to see 256 * if mappings are required for the start and end of each range. We currently 257 * assume that the mappings are smaller that one segment - if not, something 258 * is seriously wrong. 259 */ 260 void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa, 261 void *code, int code_size) 262 { 263 struct copro_slb slbs[4]; 264 int i, nr_slbs = 0; 265 /* start and end addresses of both mappings */ 266 void *addrs[] = { 267 lscsa, (void *)lscsa + sizeof(*lscsa) - 1, 268 code, code + code_size - 1 269 }; 270 271 /* check the set of addresses, and create a new entry in the slbs array 272 * if there isn't already a SLB for that address */ 273 for (i = 0; i < ARRAY_SIZE(addrs); i++) { 274 if (__slb_present(slbs, nr_slbs, addrs[i])) 275 continue; 276 277 __spu_kernel_slb(addrs[i], &slbs[nr_slbs]); 278 nr_slbs++; 279 } 280 281 spin_lock_irq(&spu->register_lock); 282 /* Add the set of SLBs */ 283 for (i = 0; i < nr_slbs; i++) 284 spu_load_slb(spu, i, &slbs[i]); 285 spin_unlock_irq(&spu->register_lock); 286 } 287 EXPORT_SYMBOL_GPL(spu_setup_kernel_slbs); 288 289 static irqreturn_t 290 spu_irq_class_0(int irq, void *data) 291 { 292 struct spu *spu; 293 unsigned long stat, mask; 294 295 spu = data; 296 297 spin_lock(&spu->register_lock); 298 mask = spu_int_mask_get(spu, 0); 299 stat = spu_int_stat_get(spu, 0) & mask; 300 301 spu->class_0_pending |= stat; 302 spu->class_0_dar = spu_mfc_dar_get(spu); 303 spu->stop_callback(spu, 0); 304 spu->class_0_pending = 0; 305 spu->class_0_dar = 0; 306 307 spu_int_stat_clear(spu, 0, stat); 308 spin_unlock(&spu->register_lock); 309 310 return IRQ_HANDLED; 311 } 312 313 static irqreturn_t 314 spu_irq_class_1(int irq, void *data) 315 { 316 struct spu *spu; 317 unsigned long stat, mask, dar, dsisr; 318 319 spu = data; 320 321 /* atomically read & clear class1 status. */ 322 spin_lock(&spu->register_lock); 323 mask = spu_int_mask_get(spu, 1); 324 stat = spu_int_stat_get(spu, 1) & mask; 325 dar = spu_mfc_dar_get(spu); 326 dsisr = spu_mfc_dsisr_get(spu); 327 if (stat & CLASS1_STORAGE_FAULT_INTR) 328 spu_mfc_dsisr_set(spu, 0ul); 329 spu_int_stat_clear(spu, 1, stat); 330 331 pr_debug("%s: %lx %lx %lx %lx\n", __func__, mask, stat, 332 dar, dsisr); 333 334 if (stat & CLASS1_SEGMENT_FAULT_INTR) 335 __spu_trap_data_seg(spu, dar); 336 337 if (stat & CLASS1_STORAGE_FAULT_INTR) 338 __spu_trap_data_map(spu, dar, dsisr); 339 340 if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_GET_INTR) 341 ; 342 343 if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR) 344 ; 345 346 spu->class_1_dsisr = 0; 347 spu->class_1_dar = 0; 348 349 spin_unlock(&spu->register_lock); 350 351 return stat ? IRQ_HANDLED : IRQ_NONE; 352 } 353 354 static irqreturn_t 355 spu_irq_class_2(int irq, void *data) 356 { 357 struct spu *spu; 358 unsigned long stat; 359 unsigned long mask; 360 const int mailbox_intrs = 361 CLASS2_MAILBOX_THRESHOLD_INTR | CLASS2_MAILBOX_INTR; 362 363 spu = data; 364 spin_lock(&spu->register_lock); 365 stat = spu_int_stat_get(spu, 2); 366 mask = spu_int_mask_get(spu, 2); 367 /* ignore interrupts we're not waiting for */ 368 stat &= mask; 369 /* mailbox interrupts are level triggered. mask them now before 370 * acknowledging */ 371 if (stat & mailbox_intrs) 372 spu_int_mask_and(spu, 2, ~(stat & mailbox_intrs)); 373 /* acknowledge all interrupts before the callbacks */ 374 spu_int_stat_clear(spu, 2, stat); 375 376 pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask); 377 378 if (stat & CLASS2_MAILBOX_INTR) 379 spu->ibox_callback(spu); 380 381 if (stat & CLASS2_SPU_STOP_INTR) 382 spu->stop_callback(spu, 2); 383 384 if (stat & CLASS2_SPU_HALT_INTR) 385 spu->stop_callback(spu, 2); 386 387 if (stat & CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR) 388 spu->mfc_callback(spu); 389 390 if (stat & CLASS2_MAILBOX_THRESHOLD_INTR) 391 spu->wbox_callback(spu); 392 393 spu->stats.class2_intr++; 394 395 spin_unlock(&spu->register_lock); 396 397 return stat ? IRQ_HANDLED : IRQ_NONE; 398 } 399 400 static int spu_request_irqs(struct spu *spu) 401 { 402 int ret = 0; 403 404 if (spu->irqs[0] != NO_IRQ) { 405 snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0", 406 spu->number); 407 ret = request_irq(spu->irqs[0], spu_irq_class_0, 408 0, spu->irq_c0, spu); 409 if (ret) 410 goto bail0; 411 } 412 if (spu->irqs[1] != NO_IRQ) { 413 snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1", 414 spu->number); 415 ret = request_irq(spu->irqs[1], spu_irq_class_1, 416 0, spu->irq_c1, spu); 417 if (ret) 418 goto bail1; 419 } 420 if (spu->irqs[2] != NO_IRQ) { 421 snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2", 422 spu->number); 423 ret = request_irq(spu->irqs[2], spu_irq_class_2, 424 0, spu->irq_c2, spu); 425 if (ret) 426 goto bail2; 427 } 428 return 0; 429 430 bail2: 431 if (spu->irqs[1] != NO_IRQ) 432 free_irq(spu->irqs[1], spu); 433 bail1: 434 if (spu->irqs[0] != NO_IRQ) 435 free_irq(spu->irqs[0], spu); 436 bail0: 437 return ret; 438 } 439 440 static void spu_free_irqs(struct spu *spu) 441 { 442 if (spu->irqs[0] != NO_IRQ) 443 free_irq(spu->irqs[0], spu); 444 if (spu->irqs[1] != NO_IRQ) 445 free_irq(spu->irqs[1], spu); 446 if (spu->irqs[2] != NO_IRQ) 447 free_irq(spu->irqs[2], spu); 448 } 449 450 void spu_init_channels(struct spu *spu) 451 { 452 static const struct { 453 unsigned channel; 454 unsigned count; 455 } zero_list[] = { 456 { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, }, 457 { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, }, 458 }, count_list[] = { 459 { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, }, 460 { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, }, 461 { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, }, 462 }; 463 struct spu_priv2 __iomem *priv2; 464 int i; 465 466 priv2 = spu->priv2; 467 468 /* initialize all channel data to zero */ 469 for (i = 0; i < ARRAY_SIZE(zero_list); i++) { 470 int count; 471 472 out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel); 473 for (count = 0; count < zero_list[i].count; count++) 474 out_be64(&priv2->spu_chnldata_RW, 0); 475 } 476 477 /* initialize channel counts to meaningful values */ 478 for (i = 0; i < ARRAY_SIZE(count_list); i++) { 479 out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel); 480 out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count); 481 } 482 } 483 EXPORT_SYMBOL_GPL(spu_init_channels); 484 485 static struct bus_type spu_subsys = { 486 .name = "spu", 487 .dev_name = "spu", 488 }; 489 490 int spu_add_dev_attr(struct device_attribute *attr) 491 { 492 struct spu *spu; 493 494 mutex_lock(&spu_full_list_mutex); 495 list_for_each_entry(spu, &spu_full_list, full_list) 496 device_create_file(&spu->dev, attr); 497 mutex_unlock(&spu_full_list_mutex); 498 499 return 0; 500 } 501 EXPORT_SYMBOL_GPL(spu_add_dev_attr); 502 503 int spu_add_dev_attr_group(struct attribute_group *attrs) 504 { 505 struct spu *spu; 506 int rc = 0; 507 508 mutex_lock(&spu_full_list_mutex); 509 list_for_each_entry(spu, &spu_full_list, full_list) { 510 rc = sysfs_create_group(&spu->dev.kobj, attrs); 511 512 /* we're in trouble here, but try unwinding anyway */ 513 if (rc) { 514 printk(KERN_ERR "%s: can't create sysfs group '%s'\n", 515 __func__, attrs->name); 516 517 list_for_each_entry_continue_reverse(spu, 518 &spu_full_list, full_list) 519 sysfs_remove_group(&spu->dev.kobj, attrs); 520 break; 521 } 522 } 523 524 mutex_unlock(&spu_full_list_mutex); 525 526 return rc; 527 } 528 EXPORT_SYMBOL_GPL(spu_add_dev_attr_group); 529 530 531 void spu_remove_dev_attr(struct device_attribute *attr) 532 { 533 struct spu *spu; 534 535 mutex_lock(&spu_full_list_mutex); 536 list_for_each_entry(spu, &spu_full_list, full_list) 537 device_remove_file(&spu->dev, attr); 538 mutex_unlock(&spu_full_list_mutex); 539 } 540 EXPORT_SYMBOL_GPL(spu_remove_dev_attr); 541 542 void spu_remove_dev_attr_group(struct attribute_group *attrs) 543 { 544 struct spu *spu; 545 546 mutex_lock(&spu_full_list_mutex); 547 list_for_each_entry(spu, &spu_full_list, full_list) 548 sysfs_remove_group(&spu->dev.kobj, attrs); 549 mutex_unlock(&spu_full_list_mutex); 550 } 551 EXPORT_SYMBOL_GPL(spu_remove_dev_attr_group); 552 553 static int spu_create_dev(struct spu *spu) 554 { 555 int ret; 556 557 spu->dev.id = spu->number; 558 spu->dev.bus = &spu_subsys; 559 ret = device_register(&spu->dev); 560 if (ret) { 561 printk(KERN_ERR "Can't register SPU %d with sysfs\n", 562 spu->number); 563 return ret; 564 } 565 566 sysfs_add_device_to_node(&spu->dev, spu->node); 567 568 return 0; 569 } 570 571 static int __init create_spu(void *data) 572 { 573 struct spu *spu; 574 int ret; 575 static int number; 576 unsigned long flags; 577 578 ret = -ENOMEM; 579 spu = kzalloc(sizeof (*spu), GFP_KERNEL); 580 if (!spu) 581 goto out; 582 583 spu->alloc_state = SPU_FREE; 584 585 spin_lock_init(&spu->register_lock); 586 spin_lock(&spu_lock); 587 spu->number = number++; 588 spin_unlock(&spu_lock); 589 590 ret = spu_create_spu(spu, data); 591 592 if (ret) 593 goto out_free; 594 595 spu_mfc_sdr_setup(spu); 596 spu_mfc_sr1_set(spu, 0x33); 597 ret = spu_request_irqs(spu); 598 if (ret) 599 goto out_destroy; 600 601 ret = spu_create_dev(spu); 602 if (ret) 603 goto out_free_irqs; 604 605 mutex_lock(&cbe_spu_info[spu->node].list_mutex); 606 list_add(&spu->cbe_list, &cbe_spu_info[spu->node].spus); 607 cbe_spu_info[spu->node].n_spus++; 608 mutex_unlock(&cbe_spu_info[spu->node].list_mutex); 609 610 mutex_lock(&spu_full_list_mutex); 611 spin_lock_irqsave(&spu_full_list_lock, flags); 612 list_add(&spu->full_list, &spu_full_list); 613 spin_unlock_irqrestore(&spu_full_list_lock, flags); 614 mutex_unlock(&spu_full_list_mutex); 615 616 spu->stats.util_state = SPU_UTIL_IDLE_LOADED; 617 spu->stats.tstamp = ktime_get_ns(); 618 619 INIT_LIST_HEAD(&spu->aff_list); 620 621 goto out; 622 623 out_free_irqs: 624 spu_free_irqs(spu); 625 out_destroy: 626 spu_destroy_spu(spu); 627 out_free: 628 kfree(spu); 629 out: 630 return ret; 631 } 632 633 static const char *spu_state_names[] = { 634 "user", "system", "iowait", "idle" 635 }; 636 637 static unsigned long long spu_acct_time(struct spu *spu, 638 enum spu_utilization_state state) 639 { 640 unsigned long long time = spu->stats.times[state]; 641 642 /* 643 * If the spu is idle or the context is stopped, utilization 644 * statistics are not updated. Apply the time delta from the 645 * last recorded state of the spu. 646 */ 647 if (spu->stats.util_state == state) 648 time += ktime_get_ns() - spu->stats.tstamp; 649 650 return time / NSEC_PER_MSEC; 651 } 652 653 654 static ssize_t spu_stat_show(struct device *dev, 655 struct device_attribute *attr, char *buf) 656 { 657 struct spu *spu = container_of(dev, struct spu, dev); 658 659 return sprintf(buf, "%s %llu %llu %llu %llu " 660 "%llu %llu %llu %llu %llu %llu %llu %llu\n", 661 spu_state_names[spu->stats.util_state], 662 spu_acct_time(spu, SPU_UTIL_USER), 663 spu_acct_time(spu, SPU_UTIL_SYSTEM), 664 spu_acct_time(spu, SPU_UTIL_IOWAIT), 665 spu_acct_time(spu, SPU_UTIL_IDLE_LOADED), 666 spu->stats.vol_ctx_switch, 667 spu->stats.invol_ctx_switch, 668 spu->stats.slb_flt, 669 spu->stats.hash_flt, 670 spu->stats.min_flt, 671 spu->stats.maj_flt, 672 spu->stats.class2_intr, 673 spu->stats.libassist); 674 } 675 676 static DEVICE_ATTR(stat, 0444, spu_stat_show, NULL); 677 678 #ifdef CONFIG_KEXEC 679 680 struct crash_spu_info { 681 struct spu *spu; 682 u32 saved_spu_runcntl_RW; 683 u32 saved_spu_status_R; 684 u32 saved_spu_npc_RW; 685 u64 saved_mfc_sr1_RW; 686 u64 saved_mfc_dar; 687 u64 saved_mfc_dsisr; 688 }; 689 690 #define CRASH_NUM_SPUS 16 /* Enough for current hardware */ 691 static struct crash_spu_info crash_spu_info[CRASH_NUM_SPUS]; 692 693 static void crash_kexec_stop_spus(void) 694 { 695 struct spu *spu; 696 int i; 697 u64 tmp; 698 699 for (i = 0; i < CRASH_NUM_SPUS; i++) { 700 if (!crash_spu_info[i].spu) 701 continue; 702 703 spu = crash_spu_info[i].spu; 704 705 crash_spu_info[i].saved_spu_runcntl_RW = 706 in_be32(&spu->problem->spu_runcntl_RW); 707 crash_spu_info[i].saved_spu_status_R = 708 in_be32(&spu->problem->spu_status_R); 709 crash_spu_info[i].saved_spu_npc_RW = 710 in_be32(&spu->problem->spu_npc_RW); 711 712 crash_spu_info[i].saved_mfc_dar = spu_mfc_dar_get(spu); 713 crash_spu_info[i].saved_mfc_dsisr = spu_mfc_dsisr_get(spu); 714 tmp = spu_mfc_sr1_get(spu); 715 crash_spu_info[i].saved_mfc_sr1_RW = tmp; 716 717 tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; 718 spu_mfc_sr1_set(spu, tmp); 719 720 __delay(200); 721 } 722 } 723 724 static void crash_register_spus(struct list_head *list) 725 { 726 struct spu *spu; 727 int ret; 728 729 list_for_each_entry(spu, list, full_list) { 730 if (WARN_ON(spu->number >= CRASH_NUM_SPUS)) 731 continue; 732 733 crash_spu_info[spu->number].spu = spu; 734 } 735 736 ret = crash_shutdown_register(&crash_kexec_stop_spus); 737 if (ret) 738 printk(KERN_ERR "Could not register SPU crash handler"); 739 } 740 741 #else 742 static inline void crash_register_spus(struct list_head *list) 743 { 744 } 745 #endif 746 747 static void spu_shutdown(void) 748 { 749 struct spu *spu; 750 751 mutex_lock(&spu_full_list_mutex); 752 list_for_each_entry(spu, &spu_full_list, full_list) { 753 spu_free_irqs(spu); 754 spu_destroy_spu(spu); 755 } 756 mutex_unlock(&spu_full_list_mutex); 757 } 758 759 static struct syscore_ops spu_syscore_ops = { 760 .shutdown = spu_shutdown, 761 }; 762 763 static int __init init_spu_base(void) 764 { 765 int i, ret = 0; 766 767 for (i = 0; i < MAX_NUMNODES; i++) { 768 mutex_init(&cbe_spu_info[i].list_mutex); 769 INIT_LIST_HEAD(&cbe_spu_info[i].spus); 770 } 771 772 if (!spu_management_ops) 773 goto out; 774 775 /* create system subsystem for spus */ 776 ret = subsys_system_register(&spu_subsys, NULL); 777 if (ret) 778 goto out; 779 780 ret = spu_enumerate_spus(create_spu); 781 782 if (ret < 0) { 783 printk(KERN_WARNING "%s: Error initializing spus\n", 784 __func__); 785 goto out_unregister_subsys; 786 } 787 788 if (ret > 0) 789 fb_append_extra_logo(&logo_spe_clut224, ret); 790 791 mutex_lock(&spu_full_list_mutex); 792 xmon_register_spus(&spu_full_list); 793 crash_register_spus(&spu_full_list); 794 mutex_unlock(&spu_full_list_mutex); 795 spu_add_dev_attr(&dev_attr_stat); 796 register_syscore_ops(&spu_syscore_ops); 797 798 spu_init_affinity(); 799 800 return 0; 801 802 out_unregister_subsys: 803 bus_unregister(&spu_subsys); 804 out: 805 return ret; 806 } 807 module_init(init_spu_base); 808 809 MODULE_LICENSE("GPL"); 810 MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>"); 811