1*def434c2SBenjamin Krillobj-$(CONFIG_PPC_CELL_COMMON)		+= cbe_regs.o interrupt.o pervasive.o
2*def434c2SBenjamin Krill
3*def434c2SBenjamin Krillobj-$(CONFIG_PPC_CELL_NATIVE)		+= iommu.o setup.o spider-pic.o \
4*def434c2SBenjamin Krill					   pmu.o io-workarounds.o spider-pci.o
5acf7d768SBenjamin Herrenschmidtobj-$(CONFIG_CBE_RAS)			+= ras.o
6c902be71SArnd Bergmann
7b3d7dc19SChristian Krafftobj-$(CONFIG_CBE_THERM)			+= cbe_thermal.o
874889e41SChristian Krafftobj-$(CONFIG_CBE_CPUFREQ_PMI)		+= cbe_cpufreq_pmi.o
974889e41SChristian Krafftobj-$(CONFIG_CBE_CPUFREQ)		+= cbe-cpufreq.o
1074889e41SChristian Krafftcbe-cpufreq-y				+= cbe_cpufreq_pervasive.o cbe_cpufreq.o
11880e7105SChristian Krafftobj-$(CONFIG_CBE_CPUFREQ_SPU_GOVERNOR)	+= cpufreq_spudemand.o
12b3d7dc19SChristian Krafft
134795b780SChristian Krafftobj-$(CONFIG_PPC_IBM_CELL_POWERBUTTON)	+= cbe_powerbutton.o
144795b780SChristian Krafft
15c01ea72aSGeoff Levandifeq ($(CONFIG_SMP),y)
16c01ea72aSGeoff Levandobj-$(CONFIG_PPC_CELL_NATIVE)		+= smp.o
17*def434c2SBenjamin Krillobj-$(CONFIG_PPC_CELL_QPACE)		+= smp.o
18c01ea72aSGeoff Levandendif
19f0831accSArnd Bergmann
202dd14934SArnd Bergmann# needed only when building loadable spufs.ko
21*def434c2SBenjamin Krillspu-priv1-$(CONFIG_PPC_CELL_COMMON)	+= spu_priv1_mmio.o
22*def434c2SBenjamin Krillspu-manage-$(CONFIG_PPC_CELL_COMMON)	+= spu_manage.o
23c9868fe0SIshizaki Kou
24c01ea72aSGeoff Levandobj-$(CONFIG_SPU_BASE)			+= spu_callbacks.o spu_base.o \
25aed3a8c9SBob Nelson					   spu_notify.o \
267cd58e43SJeremy Kerr					   spu_syscalls.o spu_fault.o \
27c9868fe0SIshizaki Kou					   $(spu-priv1-y) \
28c9868fe0SIshizaki Kou					   $(spu-manage-y) \
29c9868fe0SIshizaki Kou					   spufs/
30ce21b3c9SMichael Ellerman
31ce21b3c9SMichael Ellermanobj-$(CONFIG_PCI_MSI)			+= axon_msi.o
326ec859e1SIshizaki Kou
33*def434c2SBenjamin Krill# qpace setup
34*def434c2SBenjamin Krillobj-$(CONFIG_PPC_CELL_QPACE)		+= qpace_setup.o
356ec859e1SIshizaki Kou
366ec859e1SIshizaki Kou# celleb stuff
376ec859e1SIshizaki Kouifeq ($(CONFIG_PPC_CELLEB),y)
38116bdc42SIshizaki Kouobj-y					+= celleb_setup.o \
3911eef455SIshizaki Kou					   celleb_pci.o celleb_scc_epci.o \
40884d04cdSIshizaki Kou					   celleb_scc_pciex.o \
4111eef455SIshizaki Kou					   celleb_scc_uhc.o \
425a96dfe8SIshizaki Kou					   io-workarounds.o spider-pci.o \
43ad2c6987SIshizaki Kou					   beat.o beat_htab.o beat_hvCall.o \
44ad2c6987SIshizaki Kou					   beat_interrupt.o beat_iommu.o
4511eef455SIshizaki Kou
46ad2c6987SIshizaki Kouobj-$(CONFIG_SMP)			+= beat_smp.o
47ad2c6987SIshizaki Kouobj-$(CONFIG_PPC_UDBG_BEAT)		+= beat_udbg.o
4811eef455SIshizaki Kouobj-$(CONFIG_SERIAL_TXX9)		+= celleb_scc_sio.o
49c11dde85SIshizaki Kouobj-$(CONFIG_SPU_BASE)			+= beat_spu_priv1.o
506ec859e1SIshizaki Kouendif
51