1config PPC_CELL 2 bool 3 default n 4 5config PPC_CELL_NATIVE 6 bool 7 select PPC_CELL 8 select PPC_DCR_MMIO 9 select PPC_OF_PLATFORM_PCI 10 select PPC_INDIRECT_IO 11 select PPC_NATIVE 12 select MPIC 13 select IBM_NEW_EMAC_EMAC4 14 select IBM_NEW_EMAC_RGMII 15 select IBM_NEW_EMAC_ZMII #test only 16 select IBM_NEW_EMAC_TAH #test only 17 default n 18 19config PPC_IBM_CELL_BLADE 20 bool "IBM Cell Blade" 21 depends on PPC_MULTIPLATFORM && PPC64 22 select PPC_CELL_NATIVE 23 select PPC_RTAS 24 select MMIO_NVRAM 25 select PPC_UDBG_16550 26 select UDBG_RTAS_CONSOLE 27 28menu "Cell Broadband Engine options" 29 depends on PPC_CELL 30 31config SPU_FS 32 tristate "SPU file system" 33 default m 34 depends on PPC_CELL 35 select SPU_BASE 36 select MEMORY_HOTPLUG 37 help 38 The SPU file system is used to access Synergistic Processing 39 Units on machines implementing the Broadband Processor 40 Architecture. 41 42config SPU_FS_64K_LS 43 bool "Use 64K pages to map SPE local store" 44 # we depend on PPC_MM_SLICES for now rather than selecting 45 # it because we depend on hugetlbfs hooks being present. We 46 # will fix that when the generic code has been improved to 47 # not require hijacking hugetlbfs hooks. 48 depends on SPU_FS && PPC_MM_SLICES && !PPC_64K_PAGES 49 default y 50 select PPC_HAS_HASH_64K 51 help 52 This option causes SPE local stores to be mapped in process 53 address spaces using 64K pages while the rest of the kernel 54 uses 4K pages. This can improve performances of applications 55 using multiple SPEs by lowering the TLB pressure on them. 56 57config SPU_TRACE 58 tristate "SPU event tracing support" 59 depends on SPU_FS && MARKERS 60 help 61 This option allows reading a trace of spu-related events through 62 the sputrace file in procfs. 63 64config SPU_BASE 65 bool 66 default n 67 68config CBE_RAS 69 bool "RAS features for bare metal Cell BE" 70 depends on PPC_CELL_NATIVE 71 default y 72 73config CBE_THERM 74 tristate "CBE thermal support" 75 default m 76 depends on CBE_RAS 77 78config CBE_CPUFREQ 79 tristate "CBE frequency scaling" 80 depends on CBE_RAS && CPU_FREQ 81 default m 82 help 83 This adds the cpufreq driver for Cell BE processors. 84 For details, take a look at <file:Documentation/cpu-freq/>. 85 If you don't have such processor, say N 86 87config CBE_CPUFREQ_PMI 88 tristate "CBE frequency scaling using PMI interface" 89 depends on CBE_CPUFREQ && PPC_PMI && EXPERIMENTAL 90 default n 91 help 92 Select this, if you want to use the PMI interface 93 to switch frequencies. Using PMI, the 94 processor will not only be able to run at lower speed, 95 but also at lower core voltage. 96 97endmenu 98 99config OPROFILE_CELL 100 def_bool y 101 depends on PPC_CELL_NATIVE && (OPROFILE = m || OPROFILE = y) 102 103