1config PPC_CELL
2	bool
3	default n
4
5config PPC_CELL_NATIVE
6	bool
7	select PPC_CELL
8	select PPC_DCR_MMIO
9	select PPC_OF_PLATFORM_PCI
10	select PPC_INDIRECT_IO
11	select PPC_NATIVE
12	select MPIC
13	select IBM_NEW_EMAC_EMAC4
14	select IBM_NEW_EMAC_RGMII
15	select IBM_NEW_EMAC_ZMII #test only
16	select IBM_NEW_EMAC_TAH  #test only
17	default n
18
19config PPC_IBM_CELL_BLADE
20	bool "IBM Cell Blade"
21	depends on PPC_MULTIPLATFORM && PPC64
22	select PPC_CELL_NATIVE
23	select PPC_RTAS
24	select MMIO_NVRAM
25	select PPC_UDBG_16550
26	select UDBG_RTAS_CONSOLE
27
28config PPC_CELLEB
29	bool "Toshiba's Cell Reference Set 'Celleb' Architecture"
30	depends on PPC_MULTIPLATFORM && PPC64
31	select PPC_CELL
32	select PPC_CELL_NATIVE
33	select PPC_RTAS
34	select PPC_INDIRECT_IO
35	select PPC_OF_PLATFORM_PCI
36	select HAS_TXX9_SERIAL
37	select PPC_UDBG_BEAT
38	select USB_OHCI_BIG_ENDIAN_MMIO
39	select USB_EHCI_BIG_ENDIAN_MMIO
40
41menu "Cell Broadband Engine options"
42	depends on PPC_CELL
43
44config SPU_FS
45	tristate "SPU file system"
46	default m
47	depends on PPC_CELL
48	select SPU_BASE
49	select MEMORY_HOTPLUG
50	help
51	  The SPU file system is used to access Synergistic Processing
52	  Units on machines implementing the Broadband Processor
53	  Architecture.
54
55config SPU_FS_64K_LS
56	bool "Use 64K pages to map SPE local  store"
57	# we depend on PPC_MM_SLICES for now rather than selecting
58	# it because we depend on hugetlbfs hooks being present. We
59	# will fix that when the generic code has been improved to
60	# not require hijacking hugetlbfs hooks.
61	depends on SPU_FS && PPC_MM_SLICES && !PPC_64K_PAGES
62	default y
63	select PPC_HAS_HASH_64K
64	help
65	  This option causes SPE local stores to be mapped in process
66	  address spaces using 64K pages while the rest of the kernel
67	  uses 4K pages. This can improve performances of applications
68	  using multiple SPEs by lowering the TLB pressure on them.
69
70config SPU_TRACE
71	tristate "SPU event tracing support"
72	depends on SPU_FS && MARKERS
73	help
74	  This option allows reading a trace of spu-related events through
75	  the sputrace file in procfs.
76
77config SPU_BASE
78	bool
79	default n
80
81config CBE_RAS
82	bool "RAS features for bare metal Cell BE"
83	depends on PPC_CELL_NATIVE
84	default y
85
86config CBE_THERM
87	tristate "CBE thermal support"
88	default m
89	depends on CBE_RAS
90
91config CBE_CPUFREQ
92	tristate "CBE frequency scaling"
93	depends on CBE_RAS && CPU_FREQ
94	default m
95	help
96	  This adds the cpufreq driver for Cell BE processors.
97	  For details, take a look at <file:Documentation/cpu-freq/>.
98	  If you don't have such processor, say N
99
100config CBE_CPUFREQ_PMI
101	tristate "CBE frequency scaling using PMI interface"
102	depends on CBE_CPUFREQ && PPC_PMI && EXPERIMENTAL
103	default n
104	help
105	  Select this, if you want to use the PMI interface
106	  to switch frequencies. Using PMI, the
107	  processor will not only be able to run at lower speed,
108	  but also at lower core voltage.
109
110endmenu
111
112config OPROFILE_CELL
113	def_bool y
114	depends on PPC_CELL_NATIVE && (OPROFILE = m || OPROFILE = y)
115
116