1menu "Platform support" 2 3source "arch/powerpc/platforms/powernv/Kconfig" 4source "arch/powerpc/platforms/pseries/Kconfig" 5source "arch/powerpc/platforms/chrp/Kconfig" 6source "arch/powerpc/platforms/512x/Kconfig" 7source "arch/powerpc/platforms/52xx/Kconfig" 8source "arch/powerpc/platforms/powermac/Kconfig" 9source "arch/powerpc/platforms/maple/Kconfig" 10source "arch/powerpc/platforms/pasemi/Kconfig" 11source "arch/powerpc/platforms/ps3/Kconfig" 12source "arch/powerpc/platforms/cell/Kconfig" 13source "arch/powerpc/platforms/8xx/Kconfig" 14source "arch/powerpc/platforms/82xx/Kconfig" 15source "arch/powerpc/platforms/83xx/Kconfig" 16source "arch/powerpc/platforms/85xx/Kconfig" 17source "arch/powerpc/platforms/86xx/Kconfig" 18source "arch/powerpc/platforms/embedded6xx/Kconfig" 19source "arch/powerpc/platforms/44x/Kconfig" 20source "arch/powerpc/platforms/40x/Kconfig" 21source "arch/powerpc/platforms/amigaone/Kconfig" 22 23config KVM_GUEST 24 bool "KVM Guest support" 25 default n 26 select EPAPR_PARAVIRT 27 ---help--- 28 This option enables various optimizations for running under the KVM 29 hypervisor. Overhead for the kernel when not running inside KVM should 30 be minimal. 31 32 In case of doubt, say Y 33 34config EPAPR_PARAVIRT 35 bool "ePAPR para-virtualization support" 36 default n 37 help 38 Enables ePAPR para-virtualization support for guests. 39 40 In case of doubt, say Y 41 42config PPC_NATIVE 43 bool 44 depends on 6xx || PPC64 45 help 46 Support for running natively on the hardware, i.e. without 47 a hypervisor. This option is not user-selectable but should 48 be selected by all platforms that need it. 49 50config PPC_OF_BOOT_TRAMPOLINE 51 bool "Support booting from Open Firmware or yaboot" 52 depends on 6xx || PPC64 53 default y 54 help 55 Support from booting from Open Firmware or yaboot using an 56 Open Firmware client interface. This enables the kernel to 57 communicate with open firmware to retrieve system information 58 such as the device tree. 59 60 In case of doubt, say Y 61 62config UDBG_RTAS_CONSOLE 63 bool "RTAS based debug console" 64 depends on PPC_RTAS 65 default n 66 67config PPC_SMP_MUXED_IPI 68 bool 69 help 70 Select this opton if your platform supports SMP and your 71 interrupt controller provides less than 4 interrupts to each 72 cpu. This will enable the generic code to multiplex the 4 73 messages on to one ipi. 74 75config IPIC 76 bool 77 default n 78 79config MPIC 80 bool 81 default n 82 83config MPIC_TIMER 84 bool "MPIC Global Timer" 85 depends on MPIC && FSL_SOC 86 default n 87 help 88 The MPIC global timer is a hardware timer inside the 89 Freescale PIC complying with OpenPIC standard. When the 90 specified interval times out, the hardware timer generates 91 an interrupt. The driver currently is only tested on fsl 92 chip, but it can potentially support other global timers 93 complying with the OpenPIC standard. 94 95config FSL_MPIC_TIMER_WAKEUP 96 tristate "Freescale MPIC global timer wakeup driver" 97 depends on FSL_SOC && MPIC_TIMER && PM 98 default n 99 help 100 The driver provides a way to wake up the system by MPIC 101 timer. 102 e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup" 103 104config PPC_EPAPR_HV_PIC 105 bool 106 default n 107 select EPAPR_PARAVIRT 108 109config MPIC_WEIRD 110 bool 111 default n 112 113config MPIC_MSGR 114 bool "MPIC message register support" 115 depends on MPIC 116 default n 117 help 118 Enables support for the MPIC message registers. These 119 registers are used for inter-processor communication. 120 121config PPC_I8259 122 bool 123 default n 124 125config U3_DART 126 bool 127 depends on PPC64 128 default n 129 130config PPC_RTAS 131 bool 132 default n 133 134config RTAS_ERROR_LOGGING 135 bool 136 depends on PPC_RTAS 137 default n 138 139config PPC_RTAS_DAEMON 140 bool 141 depends on PPC_RTAS 142 default n 143 144config RTAS_PROC 145 bool "Proc interface to RTAS" 146 depends on PPC_RTAS && PROC_FS 147 default y 148 149config RTAS_FLASH 150 tristate "Firmware flash interface" 151 depends on PPC64 && RTAS_PROC 152 153config MMIO_NVRAM 154 bool 155 default n 156 157config MPIC_U3_HT_IRQS 158 bool 159 default n 160 161config MPIC_BROKEN_REGREAD 162 bool 163 depends on MPIC 164 help 165 This option enables a MPIC driver workaround for some chips 166 that have a bug that causes some interrupt source information 167 to not read back properly. It is safe to use on other chips as 168 well, but enabling it uses about 8KB of memory to keep copies 169 of the register contents in software. 170 171config IBMVIO 172 depends on PPC_PSERIES 173 bool 174 default y 175 176config IBMEBUS 177 depends on PPC_PSERIES 178 bool "Support for GX bus based adapters" 179 help 180 Bus device driver for GX bus based adapters. 181 182config EEH 183 bool 184 depends on (PPC_POWERNV || PPC_PSERIES) && PCI 185 default y 186 187config PPC_MPC106 188 bool 189 default n 190 191config PPC_970_NAP 192 bool 193 default n 194 195config PPC_P7_NAP 196 bool 197 default n 198 199config PPC_INDIRECT_PIO 200 bool 201 select GENERIC_IOMAP 202 203config PPC_INDIRECT_MMIO 204 bool 205 206config PPC_IO_WORKAROUNDS 207 bool 208 209source "drivers/cpufreq/Kconfig" 210 211menu "CPUIdle driver" 212 213source "drivers/cpuidle/Kconfig" 214 215endmenu 216 217config PPC601_SYNC_FIX 218 bool "Workarounds for PPC601 bugs" 219 depends on 6xx && PPC_PMAC 220 help 221 Some versions of the PPC601 (the first PowerPC chip) have bugs which 222 mean that extra synchronization instructions are required near 223 certain instructions, typically those that make major changes to the 224 CPU state. These extra instructions reduce performance slightly. 225 If you say N here, these extra instructions will not be included, 226 resulting in a kernel which will run faster but may not run at all 227 on some systems with the PPC601 chip. 228 229 If in doubt, say Y here. 230 231config TAU 232 bool "On-chip CPU temperature sensor support" 233 depends on 6xx 234 help 235 G3 and G4 processors have an on-chip temperature sensor called the 236 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die 237 temperature within 2-4 degrees Celsius. This option shows the current 238 on-die temperature in /proc/cpuinfo if the cpu supports it. 239 240 Unfortunately, on some chip revisions, this sensor is very inaccurate 241 and in many cases, does not work at all, so don't assume the cpu 242 temp is actually what /proc/cpuinfo says it is. 243 244config TAU_INT 245 bool "Interrupt driven TAU driver (DANGEROUS)" 246 depends on TAU 247 ---help--- 248 The TAU supports an interrupt driven mode which causes an interrupt 249 whenever the temperature goes out of range. This is the fastest way 250 to get notified the temp has exceeded a range. With this option off, 251 a timer is used to re-check the temperature periodically. 252 253 However, on some cpus it appears that the TAU interrupt hardware 254 is buggy and can cause a situation which would lead unexplained hard 255 lockups. 256 257 Unless you are extending the TAU driver, or enjoy kernel/hardware 258 debugging, leave this option off. 259 260config TAU_AVERAGE 261 bool "Average high and low temp" 262 depends on TAU 263 ---help--- 264 The TAU hardware can compare the temperature to an upper and lower 265 bound. The default behavior is to show both the upper and lower 266 bound in /proc/cpuinfo. If the range is large, the temperature is 267 either changing a lot, or the TAU hardware is broken (likely on some 268 G4's). If the range is small (around 4 degrees), the temperature is 269 relatively stable. If you say Y here, a single temperature value, 270 halfway between the upper and lower bounds, will be reported in 271 /proc/cpuinfo. 272 273 If in doubt, say N here. 274 275config QUICC_ENGINE 276 bool "Freescale QUICC Engine (QE) Support" 277 depends on FSL_SOC && PPC32 278 select PPC_LIB_RHEAP 279 select CRC32 280 help 281 The QUICC Engine (QE) is a new generation of communications 282 coprocessors on Freescale embedded CPUs (akin to CPM in older chips). 283 Selecting this option means that you wish to build a kernel 284 for a machine with a QE coprocessor. 285 286config QE_GPIO 287 bool "QE GPIO support" 288 depends on QUICC_ENGINE 289 select ARCH_REQUIRE_GPIOLIB 290 help 291 Say Y here if you're going to use hardware that connects to the 292 QE GPIOs. 293 294config CPM2 295 bool "Enable support for the CPM2 (Communications Processor Module)" 296 depends on (FSL_SOC_BOOKE && PPC32) || 8260 297 select CPM 298 select PPC_LIB_RHEAP 299 select PPC_PCI_CHOICE 300 select ARCH_REQUIRE_GPIOLIB 301 help 302 The CPM2 (Communications Processor Module) is a coprocessor on 303 embedded CPUs made by Freescale. Selecting this option means that 304 you wish to build a kernel for a machine with a CPM2 coprocessor 305 on it (826x, 827x, 8560). 306 307config AXON_RAM 308 tristate "Axon DDR2 memory device driver" 309 depends on PPC_IBM_CELL_BLADE && BLOCK 310 default m 311 help 312 It registers one block device per Axon's DDR2 memory bank found 313 on a system. Block devices are called axonram?, their major and 314 minor numbers are available in /proc/devices, /proc/partitions or 315 in /sys/block/axonram?/dev. 316 317config FSL_ULI1575 318 bool 319 default n 320 select GENERIC_ISA_DMA 321 help 322 Supports for the ULI1575 PCIe south bridge that exists on some 323 Freescale reference boards. The boards all use the ULI in pretty 324 much the same way. 325 326config CPM 327 bool 328 329config OF_RTC 330 bool 331 help 332 Uses information from the OF or flattened device tree to instantiate 333 platform devices for direct mapped RTC chips like the DS1742 or DS1743. 334 335config SIMPLE_GPIO 336 bool "Support for simple, memory-mapped GPIO controllers" 337 depends on PPC 338 select ARCH_REQUIRE_GPIOLIB 339 help 340 Say Y here to support simple, memory-mapped GPIO controllers. 341 These are usually BCSRs used to control board's switches, LEDs, 342 chip-selects, Ethernet/USB PHY's power and various other small 343 on-board peripherals. 344 345config MCU_MPC8349EMITX 346 bool "MPC8349E-mITX MCU driver" 347 depends on I2C=y && PPC_83xx 348 select ARCH_REQUIRE_GPIOLIB 349 help 350 Say Y here to enable soft power-off functionality on the Freescale 351 boards with the MPC8349E-mITX-compatible MCU chips. This driver will 352 also register MCU GPIOs with the generic GPIO API, so you'll able 353 to use MCU pins as GPIOs. 354 355config XILINX_PCI 356 bool "Xilinx PCI host bridge support" 357 depends on PCI && XILINX_VIRTEX 358 359endmenu 360