1menu "Platform support" 2 3source "arch/powerpc/platforms/powernv/Kconfig" 4source "arch/powerpc/platforms/pseries/Kconfig" 5source "arch/powerpc/platforms/chrp/Kconfig" 6source "arch/powerpc/platforms/512x/Kconfig" 7source "arch/powerpc/platforms/52xx/Kconfig" 8source "arch/powerpc/platforms/powermac/Kconfig" 9source "arch/powerpc/platforms/maple/Kconfig" 10source "arch/powerpc/platforms/pasemi/Kconfig" 11source "arch/powerpc/platforms/ps3/Kconfig" 12source "arch/powerpc/platforms/cell/Kconfig" 13source "arch/powerpc/platforms/8xx/Kconfig" 14source "arch/powerpc/platforms/82xx/Kconfig" 15source "arch/powerpc/platforms/83xx/Kconfig" 16source "arch/powerpc/platforms/85xx/Kconfig" 17source "arch/powerpc/platforms/86xx/Kconfig" 18source "arch/powerpc/platforms/embedded6xx/Kconfig" 19source "arch/powerpc/platforms/44x/Kconfig" 20source "arch/powerpc/platforms/40x/Kconfig" 21source "arch/powerpc/platforms/amigaone/Kconfig" 22source "arch/powerpc/platforms/wsp/Kconfig" 23 24config KVM_GUEST 25 bool "KVM Guest support" 26 default n 27 select EPAPR_PARAVIRT 28 ---help--- 29 This option enables various optimizations for running under the KVM 30 hypervisor. Overhead for the kernel when not running inside KVM should 31 be minimal. 32 33 In case of doubt, say Y 34 35config EPAPR_PARAVIRT 36 bool "ePAPR para-virtualization support" 37 default n 38 help 39 Enables ePAPR para-virtualization support for guests. 40 41 In case of doubt, say Y 42 43config PPC_NATIVE 44 bool 45 depends on 6xx || PPC64 46 help 47 Support for running natively on the hardware, i.e. without 48 a hypervisor. This option is not user-selectable but should 49 be selected by all platforms that need it. 50 51config PPC_OF_BOOT_TRAMPOLINE 52 bool "Support booting from Open Firmware or yaboot" 53 depends on 6xx || PPC64 54 default y 55 help 56 Support from booting from Open Firmware or yaboot using an 57 Open Firmware client interface. This enables the kernel to 58 communicate with open firmware to retrieve system information 59 such as the device tree. 60 61 In case of doubt, say Y 62 63config UDBG_RTAS_CONSOLE 64 bool "RTAS based debug console" 65 depends on PPC_RTAS 66 default n 67 68config PPC_SMP_MUXED_IPI 69 bool 70 help 71 Select this opton if your platform supports SMP and your 72 interrupt controller provides less than 4 interrupts to each 73 cpu. This will enable the generic code to multiplex the 4 74 messages on to one ipi. 75 76config PPC_UDBG_BEAT 77 bool "BEAT based debug console" 78 depends on PPC_CELLEB 79 default n 80 81config IPIC 82 bool 83 default n 84 85config MPIC 86 bool 87 default n 88 89config MPIC_TIMER 90 bool "MPIC Global Timer" 91 depends on MPIC && FSL_SOC 92 default n 93 help 94 The MPIC global timer is a hardware timer inside the 95 Freescale PIC complying with OpenPIC standard. When the 96 specified interval times out, the hardware timer generates 97 an interrupt. The driver currently is only tested on fsl 98 chip, but it can potentially support other global timers 99 complying with the OpenPIC standard. 100 101config FSL_MPIC_TIMER_WAKEUP 102 tristate "Freescale MPIC global timer wakeup driver" 103 depends on FSL_SOC && MPIC_TIMER && PM 104 default n 105 help 106 The driver provides a way to wake up the system by MPIC 107 timer. 108 e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup" 109 110config PPC_EPAPR_HV_PIC 111 bool 112 default n 113 select EPAPR_PARAVIRT 114 115config MPIC_WEIRD 116 bool 117 default n 118 119config MPIC_MSGR 120 bool "MPIC message register support" 121 depends on MPIC 122 default n 123 help 124 Enables support for the MPIC message registers. These 125 registers are used for inter-processor communication. 126 127config PPC_I8259 128 bool 129 default n 130 131config U3_DART 132 bool 133 depends on PPC64 134 default n 135 136config PPC_RTAS 137 bool 138 default n 139 140config RTAS_ERROR_LOGGING 141 bool 142 depends on PPC_RTAS 143 default n 144 145config PPC_RTAS_DAEMON 146 bool 147 depends on PPC_RTAS 148 default n 149 150config RTAS_PROC 151 bool "Proc interface to RTAS" 152 depends on PPC_RTAS && PROC_FS 153 default y 154 155config RTAS_FLASH 156 tristate "Firmware flash interface" 157 depends on PPC64 && RTAS_PROC 158 159config MMIO_NVRAM 160 bool 161 default n 162 163config MPIC_U3_HT_IRQS 164 bool 165 default n 166 167config MPIC_BROKEN_REGREAD 168 bool 169 depends on MPIC 170 help 171 This option enables a MPIC driver workaround for some chips 172 that have a bug that causes some interrupt source information 173 to not read back properly. It is safe to use on other chips as 174 well, but enabling it uses about 8KB of memory to keep copies 175 of the register contents in software. 176 177config IBMVIO 178 depends on PPC_PSERIES 179 bool 180 default y 181 182config IBMEBUS 183 depends on PPC_PSERIES 184 bool "Support for GX bus based adapters" 185 help 186 Bus device driver for GX bus based adapters. 187 188config EEH 189 bool 190 depends on (PPC_POWERNV || PPC_PSERIES) && PCI 191 default y 192 193config PPC_MPC106 194 bool 195 default n 196 197config PPC_970_NAP 198 bool 199 default n 200 201config PPC_P7_NAP 202 bool 203 default n 204 205config PPC_INDIRECT_IO 206 bool 207 select GENERIC_IOMAP 208 209config PPC_INDIRECT_PIO 210 bool 211 select PPC_INDIRECT_IO 212 213config PPC_INDIRECT_MMIO 214 bool 215 select PPC_INDIRECT_IO 216 217config PPC_IO_WORKAROUNDS 218 bool 219 220source "drivers/cpufreq/Kconfig" 221 222menu "CPUIdle driver" 223 224source "drivers/cpuidle/Kconfig" 225 226endmenu 227 228config PPC601_SYNC_FIX 229 bool "Workarounds for PPC601 bugs" 230 depends on 6xx && PPC_PMAC 231 help 232 Some versions of the PPC601 (the first PowerPC chip) have bugs which 233 mean that extra synchronization instructions are required near 234 certain instructions, typically those that make major changes to the 235 CPU state. These extra instructions reduce performance slightly. 236 If you say N here, these extra instructions will not be included, 237 resulting in a kernel which will run faster but may not run at all 238 on some systems with the PPC601 chip. 239 240 If in doubt, say Y here. 241 242config TAU 243 bool "On-chip CPU temperature sensor support" 244 depends on 6xx 245 help 246 G3 and G4 processors have an on-chip temperature sensor called the 247 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die 248 temperature within 2-4 degrees Celsius. This option shows the current 249 on-die temperature in /proc/cpuinfo if the cpu supports it. 250 251 Unfortunately, on some chip revisions, this sensor is very inaccurate 252 and in many cases, does not work at all, so don't assume the cpu 253 temp is actually what /proc/cpuinfo says it is. 254 255config TAU_INT 256 bool "Interrupt driven TAU driver (DANGEROUS)" 257 depends on TAU 258 ---help--- 259 The TAU supports an interrupt driven mode which causes an interrupt 260 whenever the temperature goes out of range. This is the fastest way 261 to get notified the temp has exceeded a range. With this option off, 262 a timer is used to re-check the temperature periodically. 263 264 However, on some cpus it appears that the TAU interrupt hardware 265 is buggy and can cause a situation which would lead unexplained hard 266 lockups. 267 268 Unless you are extending the TAU driver, or enjoy kernel/hardware 269 debugging, leave this option off. 270 271config TAU_AVERAGE 272 bool "Average high and low temp" 273 depends on TAU 274 ---help--- 275 The TAU hardware can compare the temperature to an upper and lower 276 bound. The default behavior is to show both the upper and lower 277 bound in /proc/cpuinfo. If the range is large, the temperature is 278 either changing a lot, or the TAU hardware is broken (likely on some 279 G4's). If the range is small (around 4 degrees), the temperature is 280 relatively stable. If you say Y here, a single temperature value, 281 halfway between the upper and lower bounds, will be reported in 282 /proc/cpuinfo. 283 284 If in doubt, say N here. 285 286config QUICC_ENGINE 287 bool "Freescale QUICC Engine (QE) Support" 288 depends on FSL_SOC && PPC32 289 select PPC_LIB_RHEAP 290 select CRC32 291 help 292 The QUICC Engine (QE) is a new generation of communications 293 coprocessors on Freescale embedded CPUs (akin to CPM in older chips). 294 Selecting this option means that you wish to build a kernel 295 for a machine with a QE coprocessor. 296 297config QE_GPIO 298 bool "QE GPIO support" 299 depends on QUICC_ENGINE 300 select ARCH_REQUIRE_GPIOLIB 301 help 302 Say Y here if you're going to use hardware that connects to the 303 QE GPIOs. 304 305config CPM2 306 bool "Enable support for the CPM2 (Communications Processor Module)" 307 depends on (FSL_SOC_BOOKE && PPC32) || 8260 308 select CPM 309 select PPC_LIB_RHEAP 310 select PPC_PCI_CHOICE 311 select ARCH_REQUIRE_GPIOLIB 312 help 313 The CPM2 (Communications Processor Module) is a coprocessor on 314 embedded CPUs made by Freescale. Selecting this option means that 315 you wish to build a kernel for a machine with a CPM2 coprocessor 316 on it (826x, 827x, 8560). 317 318config AXON_RAM 319 tristate "Axon DDR2 memory device driver" 320 depends on PPC_IBM_CELL_BLADE && BLOCK 321 default m 322 help 323 It registers one block device per Axon's DDR2 memory bank found 324 on a system. Block devices are called axonram?, their major and 325 minor numbers are available in /proc/devices, /proc/partitions or 326 in /sys/block/axonram?/dev. 327 328config FSL_ULI1575 329 bool 330 default n 331 select GENERIC_ISA_DMA 332 help 333 Supports for the ULI1575 PCIe south bridge that exists on some 334 Freescale reference boards. The boards all use the ULI in pretty 335 much the same way. 336 337config CPM 338 bool 339 340config OF_RTC 341 bool 342 help 343 Uses information from the OF or flattened device tree to instantiate 344 platform devices for direct mapped RTC chips like the DS1742 or DS1743. 345 346config SIMPLE_GPIO 347 bool "Support for simple, memory-mapped GPIO controllers" 348 depends on PPC 349 select ARCH_REQUIRE_GPIOLIB 350 help 351 Say Y here to support simple, memory-mapped GPIO controllers. 352 These are usually BCSRs used to control board's switches, LEDs, 353 chip-selects, Ethernet/USB PHY's power and various other small 354 on-board peripherals. 355 356config MCU_MPC8349EMITX 357 bool "MPC8349E-mITX MCU driver" 358 depends on I2C=y && PPC_83xx 359 select ARCH_REQUIRE_GPIOLIB 360 help 361 Say Y here to enable soft power-off functionality on the Freescale 362 boards with the MPC8349E-mITX-compatible MCU chips. This driver will 363 also register MCU GPIOs with the generic GPIO API, so you'll able 364 to use MCU pins as GPIOs. 365 366config XILINX_PCI 367 bool "Xilinx PCI host bridge support" 368 depends on PCI && XILINX_VIRTEX 369 370endmenu 371