1config PPC64 2 bool "64-bit kernel" 3 default n 4 select HAVE_VIRT_CPU_ACCOUNTING 5 help 6 This option selects whether a 32-bit or a 64-bit kernel 7 will be built. 8 9menu "Processor support" 10choice 11 prompt "Processor Type" 12 depends on PPC32 13 help 14 There are five families of 32 bit PowerPC chips supported. 15 The most common ones are the desktop and server CPUs (601, 603, 16 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their 17 embedded 512x/52xx/82xx/83xx/86xx counterparts. 18 The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500 19 (85xx) each form a family of their own that is not compatible 20 with the others. 21 22 If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx. 23 24config PPC_BOOK3S_32 25 bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx" 26 select PPC_FPU 27 28config PPC_85xx 29 bool "Freescale 85xx" 30 select E500 31 32config PPC_8xx 33 bool "Freescale 8xx" 34 select FSL_SOC 35 select 8xx 36 select PPC_LIB_RHEAP 37 38config 40x 39 bool "AMCC 40x" 40 select PPC_DCR_NATIVE 41 select PPC_UDBG_16550 42 select 4xx_SOC 43 select PPC_PCI_CHOICE 44 45config 44x 46 bool "AMCC 44x, 46x or 47x" 47 select PPC_DCR_NATIVE 48 select PPC_UDBG_16550 49 select 4xx_SOC 50 select PPC_PCI_CHOICE 51 select PHYS_64BIT 52 53config E200 54 bool "Freescale e200" 55 56endchoice 57 58choice 59 prompt "Processor Type" 60 depends on PPC64 61 help 62 There are two families of 64 bit PowerPC chips supported. 63 The most common ones are the desktop and server CPUs 64 (POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...) 65 66 The other are the "embedded" processors compliant with the 67 "Book 3E" variant of the architecture 68 69config PPC_BOOK3S_64 70 bool "Server processors" 71 select PPC_FPU 72 select PPC_HAVE_PMU_SUPPORT 73 select SYS_SUPPORTS_HUGETLBFS 74 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if PPC_64K_PAGES 75 76config PPC_BOOK3E_64 77 bool "Embedded processors" 78 select PPC_FPU # Make it a choice ? 79 select PPC_SMP_MUXED_IPI 80 select PPC_DOORBELL 81 82endchoice 83 84choice 85 prompt "CPU selection" 86 depends on PPC64 87 default GENERIC_CPU 88 help 89 This will create a kernel which is optimised for a particular CPU. 90 The resulting kernel may not run on other CPUs, so use this with care. 91 92 If unsure, select Generic. 93 94config GENERIC_CPU 95 bool "Generic" 96 97config CELL_CPU 98 bool "Cell Broadband Engine" 99 100config POWER4_CPU 101 bool "POWER4" 102 103config POWER5_CPU 104 bool "POWER5" 105 106config POWER6_CPU 107 bool "POWER6" 108 109config POWER7_CPU 110 bool "POWER7" 111 112endchoice 113 114config PPC_BOOK3S 115 def_bool y 116 depends on PPC_BOOK3S_32 || PPC_BOOK3S_64 117 118config PPC_BOOK3E 119 def_bool y 120 depends on PPC_BOOK3E_64 121 122config 6xx 123 def_bool y 124 depends on PPC32 && PPC_BOOK3S 125 select PPC_HAVE_PMU_SUPPORT 126 127config POWER3 128 depends on PPC64 && PPC_BOOK3S 129 def_bool y 130 131config POWER4 132 depends on PPC64 && PPC_BOOK3S 133 def_bool y 134 135config PPC_A2 136 bool 137 depends on PPC_BOOK3E_64 138 139config TUNE_CELL 140 bool "Optimize for Cell Broadband Engine" 141 depends on PPC64 && PPC_BOOK3S 142 help 143 Cause the compiler to optimize for the PPE of the Cell Broadband 144 Engine. This will make the code run considerably faster on Cell 145 but somewhat slower on other machines. This option only changes 146 the scheduling of instructions, not the selection of instructions 147 itself, so the resulting kernel will keep running on all other 148 machines. 149 150# this is temp to handle compat with arch=ppc 151config 8xx 152 bool 153 154config E500 155 select FSL_EMB_PERFMON 156 select PPC_FSL_BOOK3E 157 bool 158 159config PPC_E500MC 160 bool "e500mc Support" 161 select PPC_FPU 162 select COMMON_CLK 163 depends on E500 164 help 165 This must be enabled for running on e500mc (and derivatives 166 such as e5500/e6500), and must be disabled for running on 167 e500v1 or e500v2. 168 169config PPC_FPU 170 bool 171 default y if PPC64 172 173config FSL_EMB_PERFMON 174 bool "Freescale Embedded Perfmon" 175 depends on E500 || PPC_83xx 176 help 177 This is the Performance Monitor support found on the e500 core 178 and some e300 cores (c3 and c4). Select this only if your 179 core supports the Embedded Performance Monitor APU 180 181config FSL_EMB_PERF_EVENT 182 bool 183 depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS 184 default y 185 186config FSL_EMB_PERF_EVENT_E500 187 bool 188 depends on FSL_EMB_PERF_EVENT && E500 189 default y 190 191config 4xx 192 bool 193 depends on 40x || 44x 194 default y 195 196config BOOKE 197 bool 198 depends on E200 || E500 || 44x || PPC_BOOK3E 199 default y 200 201config FSL_BOOKE 202 bool 203 depends on (E200 || E500) && PPC32 204 default y 205 206# this is for common code between PPC32 & PPC64 FSL BOOKE 207config PPC_FSL_BOOK3E 208 bool 209 select FSL_EMB_PERFMON 210 select PPC_SMP_MUXED_IPI 211 select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64 212 select PPC_DOORBELL 213 default y if FSL_BOOKE 214 215config PTE_64BIT 216 bool 217 depends on 44x || E500 || PPC_86xx 218 default y if PHYS_64BIT 219 220config PHYS_64BIT 221 bool 'Large physical address support' if E500 || PPC_86xx 222 depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx 223 ---help--- 224 This option enables kernel support for larger than 32-bit physical 225 addresses. This feature may not be available on all cores. 226 227 If you have more than 3.5GB of RAM or so, you also need to enable 228 SWIOTLB under Kernel Options for this to work. The actual number 229 is platform-dependent. 230 231 If in doubt, say N here. 232 233config ALTIVEC 234 bool "AltiVec Support" 235 depends on 6xx || POWER4 || (PPC_E500MC && PPC64) 236 ---help--- 237 This option enables kernel support for the Altivec extensions to the 238 PowerPC processor. The kernel currently supports saving and restoring 239 altivec registers, and turning on the 'altivec enable' bit so user 240 processes can execute altivec instructions. 241 242 This option is only usefully if you have a processor that supports 243 altivec (G4, otherwise known as 74xx series), but does not have 244 any affect on a non-altivec cpu (it does, however add code to the 245 kernel). 246 247 If in doubt, say Y here. 248 249config VSX 250 bool "VSX Support" 251 depends on POWER4 && ALTIVEC && PPC_FPU 252 ---help--- 253 254 This option enables kernel support for the Vector Scaler extensions 255 to the PowerPC processor. The kernel currently supports saving and 256 restoring VSX registers, and turning on the 'VSX enable' bit so user 257 processes can execute VSX instructions. 258 259 This option is only useful if you have a processor that supports 260 VSX (P7 and above), but does not have any affect on a non-VSX 261 CPUs (it does, however add code to the kernel). 262 263 If in doubt, say Y here. 264 265config PPC_ICSWX 266 bool "Support for PowerPC icswx coprocessor instruction" 267 depends on POWER4 || PPC_A2 268 default n 269 ---help--- 270 271 This option enables kernel support for the PowerPC Initiate 272 Coprocessor Store Word (icswx) coprocessor instruction on POWER7 273 or newer processors. 274 275 This option is only useful if you have a processor that supports 276 the icswx coprocessor instruction. It does not have any effect 277 on processors without the icswx coprocessor instruction. 278 279 This option slightly increases kernel memory usage. 280 281 If in doubt, say N here. 282 283config PPC_ICSWX_PID 284 bool "icswx requires direct PID management" 285 depends on PPC_ICSWX && POWER4 286 default y 287 ---help--- 288 The PID register in server is used explicitly for ICSWX. In 289 embedded systems PID management is done by the system. 290 291config PPC_ICSWX_USE_SIGILL 292 bool "Should a bad CT cause a SIGILL?" 293 depends on PPC_ICSWX 294 default n 295 ---help--- 296 Should a bad CT used for "non-record form ICSWX" cause an 297 illegal instruction signal or should it be silent as 298 architected. 299 300 If in doubt, say N here. 301 302config SPE 303 bool "SPE Support" 304 depends on E200 || (E500 && !PPC_E500MC) 305 default y 306 ---help--- 307 This option enables kernel support for the Signal Processing 308 Extensions (SPE) to the PowerPC processor. The kernel currently 309 supports saving and restoring SPE registers, and turning on the 310 'spe enable' bit so user processes can execute SPE instructions. 311 312 This option is only useful if you have a processor that supports 313 SPE (e500, otherwise known as 85xx series), but does not have any 314 effect on a non-spe cpu (it does, however add code to the kernel). 315 316 If in doubt, say Y here. 317 318config PPC_STD_MMU 319 def_bool y 320 depends on PPC_BOOK3S 321 322config PPC_STD_MMU_32 323 def_bool y 324 depends on PPC_STD_MMU && PPC32 325 326config PPC_STD_MMU_64 327 def_bool y 328 depends on PPC_STD_MMU && PPC64 329 330config PPC_MMU_NOHASH 331 def_bool y 332 depends on !PPC_STD_MMU 333 334config PPC_BOOK3E_MMU 335 def_bool y 336 depends on FSL_BOOKE || PPC_BOOK3E 337 338config PPC_MM_SLICES 339 bool 340 default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES) 341 default n 342 343config PPC_HAVE_PMU_SUPPORT 344 bool 345 346config PPC_PERF_CTRS 347 def_bool y 348 depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT 349 help 350 This enables the powerpc-specific perf_event back-end. 351 352config SMP 353 depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x 354 bool "Symmetric multi-processing support" 355 ---help--- 356 This enables support for systems with more than one CPU. If you have 357 a system with only one CPU, say N. If you have a system with more 358 than one CPU, say Y. Note that the kernel does not currently 359 support SMP machines with 603/603e/603ev or PPC750 ("G3") processors 360 since they have inadequate hardware support for multiprocessor 361 operation. 362 363 If you say N here, the kernel will run on single and multiprocessor 364 machines, but will use only one CPU of a multiprocessor machine. If 365 you say Y here, the kernel will run on single-processor machines. 366 On a single-processor machine, the kernel will run faster if you say 367 N here. 368 369 If you don't know what to do here, say N. 370 371config NR_CPUS 372 int "Maximum number of CPUs (2-8192)" 373 range 2 8192 374 depends on SMP 375 default "32" if PPC64 376 default "4" 377 378config NOT_COHERENT_CACHE 379 bool 380 depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON 381 default n if PPC_47x 382 default y 383 384config CHECK_CACHE_COHERENCY 385 bool 386 387config PPC_DOORBELL 388 bool 389 default n 390 391endmenu 392