1 /*arch/powerpc/platforms/8xx/mpc86xads_setup.c 2 * 3 * Platform setup for the Freescale mpc86xads board 4 * 5 * Vitaly Bordug <vbordug@ru.mvista.com> 6 * 7 * Copyright 2005 MontaVista Software Inc. 8 * 9 * Heavily modified by Scott Wood <scottwood@freescale.com> 10 * Copyright 2007 Freescale Semiconductor, Inc. 11 * 12 * This file is licensed under the terms of the GNU General Public License 13 * version 2. This program is licensed "as is" without any warranty of any 14 * kind, whether express or implied. 15 */ 16 17 #include <linux/init.h> 18 #include <linux/of_platform.h> 19 20 #include <asm/io.h> 21 #include <asm/machdep.h> 22 #include <asm/system.h> 23 #include <asm/time.h> 24 #include <asm/8xx_immap.h> 25 #include <asm/cpm1.h> 26 #include <asm/fs_pd.h> 27 #include <asm/udbg.h> 28 29 #include "mpc86xads.h" 30 #include "mpc8xx.h" 31 32 struct cpm_pin { 33 int port, pin, flags; 34 }; 35 36 static struct cpm_pin mpc866ads_pins[] = { 37 /* SMC1 */ 38 {CPM_PORTB, 24, CPM_PIN_INPUT}, /* RX */ 39 {CPM_PORTB, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */ 40 41 /* SMC2 */ 42 {CPM_PORTB, 21, CPM_PIN_INPUT}, /* RX */ 43 {CPM_PORTB, 20, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */ 44 45 /* SCC1 */ 46 {CPM_PORTA, 6, CPM_PIN_INPUT}, /* CLK1 */ 47 {CPM_PORTA, 7, CPM_PIN_INPUT}, /* CLK2 */ 48 {CPM_PORTA, 14, CPM_PIN_INPUT}, /* TX */ 49 {CPM_PORTA, 15, CPM_PIN_INPUT}, /* RX */ 50 {CPM_PORTB, 19, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TENA */ 51 {CPM_PORTC, 10, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* RENA */ 52 {CPM_PORTC, 11, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CLSN */ 53 54 /* MII */ 55 {CPM_PORTD, 3, CPM_PIN_OUTPUT}, 56 {CPM_PORTD, 4, CPM_PIN_OUTPUT}, 57 {CPM_PORTD, 5, CPM_PIN_OUTPUT}, 58 {CPM_PORTD, 6, CPM_PIN_OUTPUT}, 59 {CPM_PORTD, 7, CPM_PIN_OUTPUT}, 60 {CPM_PORTD, 8, CPM_PIN_OUTPUT}, 61 {CPM_PORTD, 9, CPM_PIN_OUTPUT}, 62 {CPM_PORTD, 10, CPM_PIN_OUTPUT}, 63 {CPM_PORTD, 11, CPM_PIN_OUTPUT}, 64 {CPM_PORTD, 12, CPM_PIN_OUTPUT}, 65 {CPM_PORTD, 13, CPM_PIN_OUTPUT}, 66 {CPM_PORTD, 14, CPM_PIN_OUTPUT}, 67 {CPM_PORTD, 15, CPM_PIN_OUTPUT}, 68 }; 69 70 static void __init init_ioports(void) 71 { 72 int i; 73 74 for (i = 0; i < ARRAY_SIZE(mpc866ads_pins); i++) { 75 struct cpm_pin *pin = &mpc866ads_pins[i]; 76 cpm1_set_pin(pin->port, pin->pin, pin->flags); 77 } 78 79 cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX); 80 cpm1_clk_setup(CPM_CLK_SMC2, CPM_BRG2, CPM_CLK_RTX); 81 cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK1, CPM_CLK_TX); 82 cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_RX); 83 84 /* Set FEC1 and FEC2 to MII mode */ 85 clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180); 86 } 87 88 static void __init mpc86xads_setup_arch(void) 89 { 90 struct device_node *np; 91 u32 __iomem *bcsr_io; 92 93 cpm_reset(); 94 init_ioports(); 95 96 np = of_find_compatible_node(NULL, NULL, "fsl,mpc866ads-bcsr"); 97 if (!np) { 98 printk(KERN_CRIT "Could not find fsl,mpc866ads-bcsr node\n"); 99 return; 100 } 101 102 bcsr_io = of_iomap(np, 0); 103 of_node_put(np); 104 105 if (bcsr_io == NULL) { 106 printk(KERN_CRIT "Could not remap BCSR\n"); 107 return; 108 } 109 110 clrbits32(bcsr_io, BCSR1_RS232EN_1 | BCSR1_RS232EN_2 | BCSR1_ETHEN); 111 iounmap(bcsr_io); 112 } 113 114 static int __init mpc86xads_probe(void) 115 { 116 unsigned long root = of_get_flat_dt_root(); 117 return of_flat_dt_is_compatible(root, "fsl,mpc866ads"); 118 } 119 120 static struct of_device_id __initdata of_bus_ids[] = { 121 { .name = "soc", }, 122 { .name = "cpm", }, 123 { .name = "localbus", }, 124 {}, 125 }; 126 127 static int __init declare_of_platform_devices(void) 128 { 129 of_platform_bus_probe(NULL, of_bus_ids, NULL); 130 131 return 0; 132 } 133 machine_device_initcall(mpc86x_ads, declare_of_platform_devices); 134 135 define_machine(mpc86x_ads) { 136 .name = "MPC86x ADS", 137 .probe = mpc86xads_probe, 138 .setup_arch = mpc86xads_setup_arch, 139 .init_IRQ = mpc8xx_pics_init, 140 .get_irq = mpc8xx_get_irq, 141 .restart = mpc8xx_restart, 142 .calibrate_decr = mpc8xx_calibrate_decr, 143 .set_rtc_time = mpc8xx_set_rtc_time, 144 .get_rtc_time = mpc8xx_get_rtc_time, 145 .progress = udbg_progress, 146 }; 147