xref: /openbmc/linux/arch/powerpc/platforms/8xx/Kconfig (revision 275876e2)
1config FADS
2	bool
3
4config CPM1
5	bool
6	select CPM
7
8choice
9	prompt "8xx Machine Type"
10	depends on PPC_8xx
11	depends on 8xx
12	default MPC885ADS
13
14config MPC8XXFADS
15	bool "FADS"
16	select FADS
17
18config MPC86XADS
19	bool "MPC86XADS"
20	select CPM1
21	help
22	  MPC86x Application Development System by Freescale Semiconductor.
23	  The MPC86xADS is meant to serve as a platform for s/w and h/w
24	  development around the MPC86X processor families.
25
26config MPC885ADS
27	bool "MPC885ADS"
28	select CPM1
29	select OF_DYNAMIC
30	help
31	  Freescale Semiconductor MPC885 Application Development System (ADS).
32	  Also known as DUET.
33	  The MPC885ADS is meant to serve as a platform for s/w and h/w
34	  development around the MPC885 processor family.
35
36config PPC_EP88XC
37	bool "Embedded Planet EP88xC (a.k.a. CWH-PPC-885XN-VE)"
38	select CPM1
39	help
40	  This enables support for the Embedded Planet EP88xC board.
41
42	  This board is also resold by Freescale as the QUICCStart
43	  MPC885 Evaluation System and/or the CWH-PPC-885XN-VE.
44
45config PPC_ADDER875
46	bool "Analogue & Micro Adder 875"
47	select CPM1
48	help
49	  This enables support for the Analogue & Micro Adder 875
50	  board.
51
52config TQM8XX
53	bool "TQM8XX"
54	select CPM1
55	help
56	  support for the mpc8xx based boards from TQM.
57
58endchoice
59
60menu "Freescale Ethernet driver platform-specific options"
61	depends on (FS_ENET && MPC885ADS)
62
63	config MPC8xx_SECOND_ETH
64	bool "Second Ethernet channel"
65	depends on MPC885ADS
66	default y
67	help
68	  This enables support for second Ethernet on MPC885ADS and MPC86xADS boards.
69	  The latter will use SCC1, for 885ADS you can select it below.
70
71	choice
72		prompt "Second Ethernet channel"
73		depends on MPC8xx_SECOND_ETH
74		default MPC8xx_SECOND_ETH_FEC2
75
76		config MPC8xx_SECOND_ETH_FEC2
77		bool "FEC2"
78		depends on MPC885ADS
79		help
80		  Enable FEC2 to serve as 2-nd Ethernet channel. Note that SMC2
81		  (often 2-nd UART) will not work if this is enabled.
82
83		config MPC8xx_SECOND_ETH_SCC3
84		bool "SCC3"
85		depends on MPC885ADS
86		help
87		  Enable SCC3 to serve as 2-nd Ethernet channel. Note that SMC1
88		  (often 1-nd UART) will not work if this is enabled.
89
90	endchoice
91
92endmenu
93
94#
95# MPC8xx Communication options
96#
97
98menu "MPC8xx CPM Options"
99	depends on 8xx
100
101# This doesn't really belong here, but it is convenient to ask
102# 8xx specific questions.
103comment "Generic MPC8xx Options"
104
105config 8xx_COPYBACK
106	bool "Copy-Back Data Cache (else Writethrough)"
107	help
108	  Saying Y here will cause the cache on an MPC8xx processor to be used
109	  in Copy-Back mode.  If you say N here, it is used in Writethrough
110	  mode.
111
112	  If in doubt, say Y here.
113
114config 8xx_GPIO
115	bool "GPIO API Support"
116	select ARCH_REQUIRE_GPIOLIB
117	help
118	  Saying Y here will cause the ports on an MPC8xx processor to be used
119	  with the GPIO API.  If you say N here, the kernel needs less memory.
120
121	  If in doubt, say Y here.
122
123config 8xx_CPU6
124	bool "CPU6 Silicon Errata (860 Pre Rev. C)"
125	help
126	  MPC860 CPUs, prior to Rev C have some bugs in the silicon, which
127	  require workarounds for Linux (and most other OSes to work).  If you
128	  get a BUG() very early in boot, this might fix the problem.  For
129	  more details read the document entitled "MPC860 Family Device Errata
130	  Reference" on Freescale's website.  This option also incurs a
131	  performance hit.
132
133	  If in doubt, say N here.
134
135config 8xx_CPU15
136	bool "CPU15 Silicon Errata"
137	default y
138	help
139	  This enables a workaround for erratum CPU15 on MPC8xx chips.
140	  This bug can cause incorrect code execution under certain
141	  circumstances.  This workaround adds some overhead (a TLB miss
142	  every time execution crosses a page boundary), and you may wish
143	  to disable it if you have worked around the bug in the compiler
144	  (by not placing conditional branches or branches to LR or CTR
145	  in the last word of a page, with a target of the last cache
146	  line in the next page), or if you have used some other
147	  workaround.
148
149	  If in doubt, say Y here.
150
151choice
152	prompt "Microcode patch selection"
153	default NO_UCODE_PATCH
154	help
155	  Help not implemented yet, coming soon.
156
157config NO_UCODE_PATCH
158	bool "None"
159
160config USB_SOF_UCODE_PATCH
161	bool "USB SOF patch"
162	help
163	  Help not implemented yet, coming soon.
164
165config I2C_SPI_UCODE_PATCH
166	bool "I2C/SPI relocation patch"
167	help
168	  Help not implemented yet, coming soon.
169
170config I2C_SPI_SMC1_UCODE_PATCH
171	bool "I2C/SPI/SMC1 relocation patch"
172	help
173	  Help not implemented yet, coming soon.
174
175endchoice
176
177config UCODE_PATCH
178	bool
179	default y
180	depends on !NO_UCODE_PATCH
181
182endmenu
183