1 /* 2 * Based on MPC8560 ADS and arch/ppc tqm85xx ports 3 * 4 * Maintained by Kumar Gala (see MAINTAINERS for contact information) 5 * 6 * Copyright 2008 Freescale Semiconductor Inc. 7 * 8 * Copyright (c) 2005-2006 DENX Software Engineering 9 * Stefan Roese <sr@denx.de> 10 * 11 * Based on original work by 12 * Kumar Gala <kumar.gala@freescale.com> 13 * Copyright 2004 Freescale Semiconductor Inc. 14 * 15 * This program is free software; you can redistribute it and/or modify it 16 * under the terms of the GNU General Public License as published by the 17 * Free Software Foundation; either version 2 of the License, or (at your 18 * option) any later version. 19 */ 20 21 #include <linux/stddef.h> 22 #include <linux/kernel.h> 23 #include <linux/pci.h> 24 #include <linux/kdev_t.h> 25 #include <linux/delay.h> 26 #include <linux/seq_file.h> 27 #include <linux/of_platform.h> 28 29 #include <asm/system.h> 30 #include <asm/time.h> 31 #include <asm/machdep.h> 32 #include <asm/pci-bridge.h> 33 #include <asm/mpic.h> 34 #include <asm/prom.h> 35 #include <mm/mmu_decl.h> 36 #include <asm/udbg.h> 37 38 #include <sysdev/fsl_soc.h> 39 #include <sysdev/fsl_pci.h> 40 41 #ifdef CONFIG_CPM2 42 #include <asm/cpm2.h> 43 #include <sysdev/cpm2_pic.h> 44 45 static void cpm2_cascade(unsigned int irq, struct irq_desc *desc) 46 { 47 struct irq_chip *chip = get_irq_desc_chip(desc); 48 int cascade_irq; 49 50 while ((cascade_irq = cpm2_get_irq()) >= 0) 51 generic_handle_irq(cascade_irq); 52 53 chip->irq_eoi(&desc->irq_data); 54 } 55 #endif /* CONFIG_CPM2 */ 56 57 static void __init tqm85xx_pic_init(void) 58 { 59 struct mpic *mpic; 60 struct resource r; 61 struct device_node *np; 62 #ifdef CONFIG_CPM2 63 int irq; 64 #endif 65 66 np = of_find_node_by_type(NULL, "open-pic"); 67 if (!np) { 68 printk(KERN_ERR "Could not find open-pic node\n"); 69 return; 70 } 71 72 if (of_address_to_resource(np, 0, &r)) { 73 printk(KERN_ERR "Could not map mpic register space\n"); 74 of_node_put(np); 75 return; 76 } 77 78 mpic = mpic_alloc(np, r.start, 79 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, 80 0, 256, " OpenPIC "); 81 BUG_ON(mpic == NULL); 82 of_node_put(np); 83 84 mpic_init(mpic); 85 86 #ifdef CONFIG_CPM2 87 /* Setup CPM2 PIC */ 88 np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic"); 89 if (np == NULL) { 90 printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n"); 91 return; 92 } 93 irq = irq_of_parse_and_map(np, 0); 94 95 if (irq == NO_IRQ) { 96 of_node_put(np); 97 printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n"); 98 return; 99 } 100 101 cpm2_pic_init(np); 102 of_node_put(np); 103 set_irq_chained_handler(irq, cpm2_cascade); 104 #endif 105 } 106 107 /* 108 * Setup the architecture 109 */ 110 static void __init tqm85xx_setup_arch(void) 111 { 112 #ifdef CONFIG_PCI 113 struct device_node *np; 114 #endif 115 116 if (ppc_md.progress) 117 ppc_md.progress("tqm85xx_setup_arch()", 0); 118 119 #ifdef CONFIG_CPM2 120 cpm2_reset(); 121 #endif 122 123 #ifdef CONFIG_PCI 124 for_each_node_by_type(np, "pci") { 125 if (of_device_is_compatible(np, "fsl,mpc8540-pci") || 126 of_device_is_compatible(np, "fsl,mpc8548-pcie")) { 127 struct resource rsrc; 128 if (!of_address_to_resource(np, 0, &rsrc)) { 129 if ((rsrc.start & 0xfffff) == 0x8000) 130 fsl_add_bridge(np, 1); 131 else 132 fsl_add_bridge(np, 0); 133 } 134 } 135 } 136 #endif 137 } 138 139 static void tqm85xx_show_cpuinfo(struct seq_file *m) 140 { 141 uint pvid, svid, phid1; 142 143 pvid = mfspr(SPRN_PVR); 144 svid = mfspr(SPRN_SVR); 145 146 seq_printf(m, "Vendor\t\t: TQ Components\n"); 147 seq_printf(m, "PVR\t\t: 0x%x\n", pvid); 148 seq_printf(m, "SVR\t\t: 0x%x\n", svid); 149 150 /* Display cpu Pll setting */ 151 phid1 = mfspr(SPRN_HID1); 152 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); 153 } 154 155 static void __init tqm85xx_ti1520_fixup(struct pci_dev *pdev) 156 { 157 unsigned int val; 158 159 /* Do not do the fixup on other platforms! */ 160 if (!machine_is(tqm85xx)) 161 return; 162 163 dev_info(&pdev->dev, "Using TI 1520 fixup on TQM85xx\n"); 164 165 /* 166 * Enable P2CCLK bit in system control register 167 * to enable CLOCK output to power chip 168 */ 169 pci_read_config_dword(pdev, 0x80, &val); 170 pci_write_config_dword(pdev, 0x80, val | (1 << 27)); 171 172 } 173 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, 174 tqm85xx_ti1520_fixup); 175 176 static struct of_device_id __initdata of_bus_ids[] = { 177 { .compatible = "simple-bus", }, 178 { .compatible = "gianfar", }, 179 {}, 180 }; 181 182 static int __init declare_of_platform_devices(void) 183 { 184 of_platform_bus_probe(NULL, of_bus_ids, NULL); 185 186 return 0; 187 } 188 machine_device_initcall(tqm85xx, declare_of_platform_devices); 189 190 static const char *board[] __initdata = { 191 "tqc,tqm8540", 192 "tqc,tqm8541", 193 "tqc,tqm8548", 194 "tqc,tqm8555", 195 "tqc,tqm8560", 196 NULL 197 }; 198 199 /* 200 * Called very early, device-tree isn't unflattened 201 */ 202 static int __init tqm85xx_probe(void) 203 { 204 return of_flat_dt_match(of_get_flat_dt_root(), board); 205 } 206 207 define_machine(tqm85xx) { 208 .name = "TQM85xx", 209 .probe = tqm85xx_probe, 210 .setup_arch = tqm85xx_setup_arch, 211 .init_IRQ = tqm85xx_pic_init, 212 .show_cpuinfo = tqm85xx_show_cpuinfo, 213 .get_irq = mpic_get_irq, 214 .restart = fsl_rstcr_restart, 215 .calibrate_decr = generic_calibrate_decr, 216 .progress = udbg_progress, 217 }; 218