1 /* 2 * MPC85xx DS Board Setup 3 * 4 * Author Xianghua Xiao (x.xiao@freescale.com) 5 * Roy Zang <tie-fei.zang@freescale.com> 6 * - Add PCI/PCI Exprees support 7 * Copyright 2007 Freescale Semiconductor Inc. 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 */ 14 15 #include <linux/stddef.h> 16 #include <linux/kernel.h> 17 #include <linux/pci.h> 18 #include <linux/kdev_t.h> 19 #include <linux/delay.h> 20 #include <linux/seq_file.h> 21 #include <linux/interrupt.h> 22 #include <linux/of_platform.h> 23 #include <linux/memblock.h> 24 25 #include <asm/time.h> 26 #include <asm/machdep.h> 27 #include <asm/pci-bridge.h> 28 #include <mm/mmu_decl.h> 29 #include <asm/prom.h> 30 #include <asm/udbg.h> 31 #include <asm/mpic.h> 32 #include <asm/i8259.h> 33 #include <asm/swiotlb.h> 34 35 #include <sysdev/fsl_soc.h> 36 #include <sysdev/fsl_pci.h> 37 #include "smp.h" 38 39 #include "mpc85xx.h" 40 41 #undef DEBUG 42 43 #ifdef DEBUG 44 #define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args) 45 #else 46 #define DBG(fmt, args...) 47 #endif 48 49 #ifdef CONFIG_PPC_I8259 50 static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc) 51 { 52 struct irq_chip *chip = irq_desc_get_chip(desc); 53 unsigned int cascade_irq = i8259_irq(); 54 55 if (cascade_irq != NO_IRQ) { 56 generic_handle_irq(cascade_irq); 57 } 58 chip->irq_eoi(&desc->irq_data); 59 } 60 #endif /* CONFIG_PPC_I8259 */ 61 62 void __init mpc85xx_ds_pic_init(void) 63 { 64 struct mpic *mpic; 65 #ifdef CONFIG_PPC_I8259 66 struct device_node *np; 67 struct device_node *cascade_node = NULL; 68 int cascade_irq; 69 #endif 70 unsigned long root = of_get_flat_dt_root(); 71 72 if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) { 73 mpic = mpic_alloc(NULL, 0, 74 MPIC_NO_RESET | 75 MPIC_BIG_ENDIAN | 76 MPIC_SINGLE_DEST_CPU, 77 0, 256, " OpenPIC "); 78 } else { 79 mpic = mpic_alloc(NULL, 0, 80 MPIC_BIG_ENDIAN | 81 MPIC_SINGLE_DEST_CPU, 82 0, 256, " OpenPIC "); 83 } 84 85 BUG_ON(mpic == NULL); 86 mpic_init(mpic); 87 88 #ifdef CONFIG_PPC_I8259 89 /* Initialize the i8259 controller */ 90 for_each_node_by_type(np, "interrupt-controller") 91 if (of_device_is_compatible(np, "chrp,iic")) { 92 cascade_node = np; 93 break; 94 } 95 96 if (cascade_node == NULL) { 97 printk(KERN_DEBUG "Could not find i8259 PIC\n"); 98 return; 99 } 100 101 cascade_irq = irq_of_parse_and_map(cascade_node, 0); 102 if (cascade_irq == NO_IRQ) { 103 printk(KERN_ERR "Failed to map cascade interrupt\n"); 104 return; 105 } 106 107 DBG("mpc85xxds: cascade mapped to irq %d\n", cascade_irq); 108 109 i8259_init(cascade_node, 0); 110 of_node_put(cascade_node); 111 112 irq_set_chained_handler(cascade_irq, mpc85xx_8259_cascade); 113 #endif /* CONFIG_PPC_I8259 */ 114 } 115 116 #ifdef CONFIG_PCI 117 extern int uli_exclude_device(struct pci_controller *hose, 118 u_char bus, u_char devfn); 119 120 static struct device_node *pci_with_uli; 121 122 static int mpc85xx_exclude_device(struct pci_controller *hose, 123 u_char bus, u_char devfn) 124 { 125 if (hose->dn == pci_with_uli) 126 return uli_exclude_device(hose, bus, devfn); 127 128 return PCIBIOS_SUCCESSFUL; 129 } 130 #endif /* CONFIG_PCI */ 131 132 static void __init mpc85xx_ds_pci_init(void) 133 { 134 #ifdef CONFIG_PCI 135 struct device_node *node; 136 137 fsl_pci_init(); 138 139 /* See if we have a ULI under the primary */ 140 141 node = of_find_node_by_name(NULL, "uli1575"); 142 while ((pci_with_uli = of_get_parent(node))) { 143 of_node_put(node); 144 node = pci_with_uli; 145 146 if (pci_with_uli == fsl_pci_primary) { 147 ppc_md.pci_exclude_device = mpc85xx_exclude_device; 148 break; 149 } 150 } 151 #endif 152 } 153 154 /* 155 * Setup the architecture 156 */ 157 static void __init mpc85xx_ds_setup_arch(void) 158 { 159 if (ppc_md.progress) 160 ppc_md.progress("mpc85xx_ds_setup_arch()", 0); 161 162 mpc85xx_ds_pci_init(); 163 mpc85xx_smp_init(); 164 165 printk("MPC85xx DS board from Freescale Semiconductor\n"); 166 } 167 168 /* 169 * Called very early, device-tree isn't unflattened 170 */ 171 static int __init mpc8544_ds_probe(void) 172 { 173 unsigned long root = of_get_flat_dt_root(); 174 175 return !!of_flat_dt_is_compatible(root, "MPC8544DS"); 176 } 177 178 machine_device_initcall(mpc8544_ds, mpc85xx_common_publish_devices); 179 machine_device_initcall(mpc8572_ds, mpc85xx_common_publish_devices); 180 machine_device_initcall(p2020_ds, mpc85xx_common_publish_devices); 181 182 machine_arch_initcall(mpc8544_ds, swiotlb_setup_bus_notifier); 183 machine_arch_initcall(mpc8572_ds, swiotlb_setup_bus_notifier); 184 machine_arch_initcall(p2020_ds, swiotlb_setup_bus_notifier); 185 186 /* 187 * Called very early, device-tree isn't unflattened 188 */ 189 static int __init mpc8572_ds_probe(void) 190 { 191 unsigned long root = of_get_flat_dt_root(); 192 193 return !!of_flat_dt_is_compatible(root, "fsl,MPC8572DS"); 194 } 195 196 /* 197 * Called very early, device-tree isn't unflattened 198 */ 199 static int __init p2020_ds_probe(void) 200 { 201 unsigned long root = of_get_flat_dt_root(); 202 203 return !!of_flat_dt_is_compatible(root, "fsl,P2020DS"); 204 } 205 206 define_machine(mpc8544_ds) { 207 .name = "MPC8544 DS", 208 .probe = mpc8544_ds_probe, 209 .setup_arch = mpc85xx_ds_setup_arch, 210 .init_IRQ = mpc85xx_ds_pic_init, 211 #ifdef CONFIG_PCI 212 .pcibios_fixup_bus = fsl_pcibios_fixup_bus, 213 #endif 214 .get_irq = mpic_get_irq, 215 .restart = fsl_rstcr_restart, 216 .calibrate_decr = generic_calibrate_decr, 217 .progress = udbg_progress, 218 }; 219 220 define_machine(mpc8572_ds) { 221 .name = "MPC8572 DS", 222 .probe = mpc8572_ds_probe, 223 .setup_arch = mpc85xx_ds_setup_arch, 224 .init_IRQ = mpc85xx_ds_pic_init, 225 #ifdef CONFIG_PCI 226 .pcibios_fixup_bus = fsl_pcibios_fixup_bus, 227 #endif 228 .get_irq = mpic_get_irq, 229 .restart = fsl_rstcr_restart, 230 .calibrate_decr = generic_calibrate_decr, 231 .progress = udbg_progress, 232 }; 233 234 define_machine(p2020_ds) { 235 .name = "P2020 DS", 236 .probe = p2020_ds_probe, 237 .setup_arch = mpc85xx_ds_setup_arch, 238 .init_IRQ = mpc85xx_ds_pic_init, 239 #ifdef CONFIG_PCI 240 .pcibios_fixup_bus = fsl_pcibios_fixup_bus, 241 #endif 242 .get_irq = mpic_get_irq, 243 .restart = fsl_rstcr_restart, 244 .calibrate_decr = generic_calibrate_decr, 245 .progress = udbg_progress, 246 }; 247