1 /* 2 * MPC85xx DS Board Setup 3 * 4 * Author Xianghua Xiao (x.xiao@freescale.com) 5 * Roy Zang <tie-fei.zang@freescale.com> 6 * - Add PCI/PCI Exprees support 7 * Copyright 2007 Freescale Semiconductor Inc. 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 */ 14 15 #include <linux/stddef.h> 16 #include <linux/kernel.h> 17 #include <linux/pci.h> 18 #include <linux/kdev_t.h> 19 #include <linux/delay.h> 20 #include <linux/seq_file.h> 21 #include <linux/interrupt.h> 22 #include <linux/of_platform.h> 23 #include <linux/memblock.h> 24 25 #include <asm/system.h> 26 #include <asm/time.h> 27 #include <asm/machdep.h> 28 #include <asm/pci-bridge.h> 29 #include <mm/mmu_decl.h> 30 #include <asm/prom.h> 31 #include <asm/udbg.h> 32 #include <asm/mpic.h> 33 #include <asm/i8259.h> 34 #include <asm/swiotlb.h> 35 36 #include <sysdev/fsl_soc.h> 37 #include <sysdev/fsl_pci.h> 38 39 #undef DEBUG 40 41 #ifdef DEBUG 42 #define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args) 43 #else 44 #define DBG(fmt, args...) 45 #endif 46 47 #ifdef CONFIG_PPC_I8259 48 static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc) 49 { 50 struct irq_chip *chip = irq_desc_get_chip(desc); 51 unsigned int cascade_irq = i8259_irq(); 52 53 if (cascade_irq != NO_IRQ) { 54 generic_handle_irq(cascade_irq); 55 } 56 chip->irq_eoi(&desc->irq_data); 57 } 58 #endif /* CONFIG_PPC_I8259 */ 59 60 void __init mpc85xx_ds_pic_init(void) 61 { 62 struct mpic *mpic; 63 struct resource r; 64 struct device_node *np; 65 #ifdef CONFIG_PPC_I8259 66 struct device_node *cascade_node = NULL; 67 int cascade_irq; 68 #endif 69 unsigned long root = of_get_flat_dt_root(); 70 71 np = of_find_node_by_type(NULL, "open-pic"); 72 if (np == NULL) { 73 printk(KERN_ERR "Could not find open-pic node\n"); 74 return; 75 } 76 77 if (of_address_to_resource(np, 0, &r)) { 78 printk(KERN_ERR "Failed to map mpic register space\n"); 79 of_node_put(np); 80 return; 81 } 82 83 if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) { 84 mpic = mpic_alloc(np, r.start, 85 MPIC_PRIMARY | 86 MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS, 87 0, 256, " OpenPIC "); 88 } else { 89 mpic = mpic_alloc(np, r.start, 90 MPIC_PRIMARY | MPIC_WANTS_RESET | 91 MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS | 92 MPIC_SINGLE_DEST_CPU, 93 0, 256, " OpenPIC "); 94 } 95 96 BUG_ON(mpic == NULL); 97 of_node_put(np); 98 99 mpic_init(mpic); 100 101 #ifdef CONFIG_PPC_I8259 102 /* Initialize the i8259 controller */ 103 for_each_node_by_type(np, "interrupt-controller") 104 if (of_device_is_compatible(np, "chrp,iic")) { 105 cascade_node = np; 106 break; 107 } 108 109 if (cascade_node == NULL) { 110 printk(KERN_DEBUG "Could not find i8259 PIC\n"); 111 return; 112 } 113 114 cascade_irq = irq_of_parse_and_map(cascade_node, 0); 115 if (cascade_irq == NO_IRQ) { 116 printk(KERN_ERR "Failed to map cascade interrupt\n"); 117 return; 118 } 119 120 DBG("mpc85xxds: cascade mapped to irq %d\n", cascade_irq); 121 122 i8259_init(cascade_node, 0); 123 of_node_put(cascade_node); 124 125 irq_set_chained_handler(cascade_irq, mpc85xx_8259_cascade); 126 #endif /* CONFIG_PPC_I8259 */ 127 } 128 129 #ifdef CONFIG_PCI 130 static int primary_phb_addr; 131 extern int uli_exclude_device(struct pci_controller *hose, 132 u_char bus, u_char devfn); 133 134 static int mpc85xx_exclude_device(struct pci_controller *hose, 135 u_char bus, u_char devfn) 136 { 137 struct device_node* node; 138 struct resource rsrc; 139 140 node = hose->dn; 141 of_address_to_resource(node, 0, &rsrc); 142 143 if ((rsrc.start & 0xfffff) == primary_phb_addr) { 144 return uli_exclude_device(hose, bus, devfn); 145 } 146 147 return PCIBIOS_SUCCESSFUL; 148 } 149 #endif /* CONFIG_PCI */ 150 151 /* 152 * Setup the architecture 153 */ 154 #ifdef CONFIG_SMP 155 extern void __init mpc85xx_smp_init(void); 156 #endif 157 static void __init mpc85xx_ds_setup_arch(void) 158 { 159 #ifdef CONFIG_PCI 160 struct device_node *np; 161 struct pci_controller *hose; 162 #endif 163 dma_addr_t max = 0xffffffff; 164 165 if (ppc_md.progress) 166 ppc_md.progress("mpc85xx_ds_setup_arch()", 0); 167 168 #ifdef CONFIG_PCI 169 for_each_node_by_type(np, "pci") { 170 if (of_device_is_compatible(np, "fsl,mpc8540-pci") || 171 of_device_is_compatible(np, "fsl,mpc8548-pcie") || 172 of_device_is_compatible(np, "fsl,p2020-pcie")) { 173 struct resource rsrc; 174 of_address_to_resource(np, 0, &rsrc); 175 if ((rsrc.start & 0xfffff) == primary_phb_addr) 176 fsl_add_bridge(np, 1); 177 else 178 fsl_add_bridge(np, 0); 179 180 hose = pci_find_hose_for_OF_device(np); 181 max = min(max, hose->dma_window_base_cur + 182 hose->dma_window_size); 183 } 184 } 185 186 ppc_md.pci_exclude_device = mpc85xx_exclude_device; 187 #endif 188 189 #ifdef CONFIG_SMP 190 mpc85xx_smp_init(); 191 #endif 192 193 #ifdef CONFIG_SWIOTLB 194 if (memblock_end_of_DRAM() > max) { 195 ppc_swiotlb_enable = 1; 196 set_pci_dma_ops(&swiotlb_dma_ops); 197 ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; 198 } 199 #endif 200 201 printk("MPC85xx DS board from Freescale Semiconductor\n"); 202 } 203 204 /* 205 * Called very early, device-tree isn't unflattened 206 */ 207 static int __init mpc8544_ds_probe(void) 208 { 209 unsigned long root = of_get_flat_dt_root(); 210 211 if (of_flat_dt_is_compatible(root, "MPC8544DS")) { 212 #ifdef CONFIG_PCI 213 primary_phb_addr = 0xb000; 214 #endif 215 return 1; 216 } 217 218 return 0; 219 } 220 221 static struct of_device_id __initdata mpc85xxds_ids[] = { 222 { .type = "soc", }, 223 { .compatible = "soc", }, 224 { .compatible = "simple-bus", }, 225 { .compatible = "gianfar", }, 226 {}, 227 }; 228 229 static int __init mpc85xxds_publish_devices(void) 230 { 231 return of_platform_bus_probe(NULL, mpc85xxds_ids, NULL); 232 } 233 machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices); 234 machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices); 235 machine_device_initcall(p2020_ds, mpc85xxds_publish_devices); 236 237 machine_arch_initcall(mpc8544_ds, swiotlb_setup_bus_notifier); 238 machine_arch_initcall(mpc8572_ds, swiotlb_setup_bus_notifier); 239 machine_arch_initcall(p2020_ds, swiotlb_setup_bus_notifier); 240 241 /* 242 * Called very early, device-tree isn't unflattened 243 */ 244 static int __init mpc8572_ds_probe(void) 245 { 246 unsigned long root = of_get_flat_dt_root(); 247 248 if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS")) { 249 #ifdef CONFIG_PCI 250 primary_phb_addr = 0x8000; 251 #endif 252 return 1; 253 } 254 255 return 0; 256 } 257 258 /* 259 * Called very early, device-tree isn't unflattened 260 */ 261 static int __init p2020_ds_probe(void) 262 { 263 unsigned long root = of_get_flat_dt_root(); 264 265 if (of_flat_dt_is_compatible(root, "fsl,P2020DS")) { 266 #ifdef CONFIG_PCI 267 primary_phb_addr = 0x9000; 268 #endif 269 return 1; 270 } 271 272 return 0; 273 } 274 275 define_machine(mpc8544_ds) { 276 .name = "MPC8544 DS", 277 .probe = mpc8544_ds_probe, 278 .setup_arch = mpc85xx_ds_setup_arch, 279 .init_IRQ = mpc85xx_ds_pic_init, 280 #ifdef CONFIG_PCI 281 .pcibios_fixup_bus = fsl_pcibios_fixup_bus, 282 #endif 283 .get_irq = mpic_get_irq, 284 .restart = fsl_rstcr_restart, 285 .calibrate_decr = generic_calibrate_decr, 286 .progress = udbg_progress, 287 }; 288 289 define_machine(mpc8572_ds) { 290 .name = "MPC8572 DS", 291 .probe = mpc8572_ds_probe, 292 .setup_arch = mpc85xx_ds_setup_arch, 293 .init_IRQ = mpc85xx_ds_pic_init, 294 #ifdef CONFIG_PCI 295 .pcibios_fixup_bus = fsl_pcibios_fixup_bus, 296 #endif 297 .get_irq = mpic_get_irq, 298 .restart = fsl_rstcr_restart, 299 .calibrate_decr = generic_calibrate_decr, 300 .progress = udbg_progress, 301 }; 302 303 define_machine(p2020_ds) { 304 .name = "P2020 DS", 305 .probe = p2020_ds_probe, 306 .setup_arch = mpc85xx_ds_setup_arch, 307 .init_IRQ = mpc85xx_ds_pic_init, 308 #ifdef CONFIG_PCI 309 .pcibios_fixup_bus = fsl_pcibios_fixup_bus, 310 #endif 311 .get_irq = mpic_get_irq, 312 .restart = fsl_rstcr_restart, 313 .calibrate_decr = generic_calibrate_decr, 314 .progress = udbg_progress, 315 }; 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