1 /*
2  * Board setup routines for the Emerson KSI8560
3  *
4  * Author: Alexandr Smirnov <asmirnov@ru.mvista.com>
5  *
6  * Based on mpc85xx_ads.c maintained by Kumar Gala
7  *
8  * 2008 (c) MontaVista, Software, Inc.  This file is licensed under
9  * the terms of the GNU General Public License version 2.  This program
10  * is licensed "as is" without any warranty of any kind, whether express
11  * or implied.
12  *
13  */
14 
15 #include <linux/stddef.h>
16 #include <linux/kernel.h>
17 #include <linux/pci.h>
18 #include <linux/kdev_t.h>
19 #include <linux/delay.h>
20 #include <linux/seq_file.h>
21 #include <linux/of_platform.h>
22 
23 #include <asm/time.h>
24 #include <asm/machdep.h>
25 #include <asm/pci-bridge.h>
26 #include <asm/mpic.h>
27 #include <mm/mmu_decl.h>
28 #include <asm/udbg.h>
29 #include <asm/prom.h>
30 
31 #include <sysdev/fsl_soc.h>
32 #include <sysdev/fsl_pci.h>
33 
34 #include <asm/cpm2.h>
35 #include <sysdev/cpm2_pic.h>
36 
37 #include "mpc85xx.h"
38 
39 #define KSI8560_CPLD_HVR		0x04 /* Hardware Version Register */
40 #define KSI8560_CPLD_PVR		0x08 /* PLD Version Register */
41 #define KSI8560_CPLD_RCR1		0x30 /* Reset Command Register 1 */
42 
43 #define KSI8560_CPLD_RCR1_CPUHR		0x80 /* CPU Hard Reset */
44 
45 static void __iomem *cpld_base = NULL;
46 
47 static void machine_restart(char *cmd)
48 {
49 	if (cpld_base)
50 		out_8(cpld_base + KSI8560_CPLD_RCR1, KSI8560_CPLD_RCR1_CPUHR);
51 	else
52 		printk(KERN_ERR "Can't find CPLD base, hang forever\n");
53 
54 	for (;;);
55 }
56 
57 static void __init ksi8560_pic_init(void)
58 {
59 	struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,
60 			0, 256, " OpenPIC  ");
61 	BUG_ON(mpic == NULL);
62 	mpic_init(mpic);
63 
64 	mpc85xx_cpm2_pic_init();
65 }
66 
67 #ifdef CONFIG_CPM2
68 /*
69  * Setup I/O ports
70  */
71 struct cpm_pin {
72 	int port, pin, flags;
73 };
74 
75 static struct cpm_pin __initdata ksi8560_pins[] = {
76 	/* SCC1 */
77 	{3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
78 	{3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
79 	{3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
80 
81 	/* SCC2 */
82 	{3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
83 	{3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
84 	{3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
85 
86 	/* FCC1 */
87 	{0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
88 	{0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
89 	{0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
90 	{0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
91 	{0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
92 	{0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
93 	{0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
94 	{0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
95 	{0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
96 	{0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
97 	{0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
98 	{0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
99 	{0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
100 	{0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
101 	{2, 23, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK9 */
102 	{2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK10 */
103 
104 };
105 
106 static void __init init_ioports(void)
107 {
108 	int i;
109 
110 	for (i = 0; i < ARRAY_SIZE(ksi8560_pins); i++) {
111 		struct cpm_pin *pin = &ksi8560_pins[i];
112 		cpm2_set_pin(pin->port, pin->pin, pin->flags);
113 	}
114 
115 	cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
116 	cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
117 	cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
118 	cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
119 	cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK9, CPM_CLK_RX);
120 	cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX);
121 }
122 #endif
123 
124 /*
125  * Setup the architecture
126  */
127 static void __init ksi8560_setup_arch(void)
128 {
129 	struct device_node *cpld;
130 
131 	cpld = of_find_compatible_node(NULL, NULL, "emerson,KSI8560-cpld");
132 	if (cpld)
133 		cpld_base = of_iomap(cpld, 0);
134 	else
135 		printk(KERN_ERR "Can't find CPLD in device tree\n");
136 
137 	if (ppc_md.progress)
138 		ppc_md.progress("ksi8560_setup_arch()", 0);
139 
140 #ifdef CONFIG_CPM2
141 	cpm2_reset();
142 	init_ioports();
143 #endif
144 }
145 
146 static void ksi8560_show_cpuinfo(struct seq_file *m)
147 {
148 	uint pvid, svid, phid1;
149 
150 	pvid = mfspr(SPRN_PVR);
151 	svid = mfspr(SPRN_SVR);
152 
153 	seq_printf(m, "Vendor\t\t: Emerson Network Power\n");
154 	seq_printf(m, "Board\t\t: KSI8560\n");
155 
156 	if (cpld_base) {
157 		seq_printf(m, "Hardware rev\t: %d\n",
158 					in_8(cpld_base + KSI8560_CPLD_HVR));
159 		seq_printf(m, "CPLD rev\t: %d\n",
160 					in_8(cpld_base + KSI8560_CPLD_PVR));
161 	} else
162 		seq_printf(m, "Unknown Hardware and CPLD revs\n");
163 
164 	seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
165 	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
166 
167 	/* Display cpu Pll setting */
168 	phid1 = mfspr(SPRN_HID1);
169 	seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
170 }
171 
172 machine_device_initcall(ksi8560, mpc85xx_common_publish_devices);
173 
174 /*
175  * Called very early, device-tree isn't unflattened
176  */
177 static int __init ksi8560_probe(void)
178 {
179 	unsigned long root = of_get_flat_dt_root();
180 
181 	return of_flat_dt_is_compatible(root, "emerson,KSI8560");
182 }
183 
184 define_machine(ksi8560) {
185 	.name			= "KSI8560",
186 	.probe			= ksi8560_probe,
187 	.setup_arch		= ksi8560_setup_arch,
188 	.init_IRQ		= ksi8560_pic_init,
189 	.show_cpuinfo		= ksi8560_show_cpuinfo,
190 	.get_irq		= mpic_get_irq,
191 	.restart		= machine_restart,
192 	.calibrate_decr		= generic_calibrate_decr,
193 };
194