1 /*
2  * Board setup routines for the Emerson KSI8560
3  *
4  * Author: Alexandr Smirnov <asmirnov@ru.mvista.com>
5  *
6  * Based on mpc85xx_ads.c maintained by Kumar Gala
7  *
8  * 2008 (c) MontaVista, Software, Inc.  This file is licensed under
9  * the terms of the GNU General Public License version 2.  This program
10  * is licensed "as is" without any warranty of any kind, whether express
11  * or implied.
12  *
13  */
14 
15 #include <linux/stddef.h>
16 #include <linux/kernel.h>
17 #include <linux/pci.h>
18 #include <linux/kdev_t.h>
19 #include <linux/delay.h>
20 #include <linux/seq_file.h>
21 #include <linux/of_platform.h>
22 
23 #include <asm/time.h>
24 #include <asm/machdep.h>
25 #include <asm/pci-bridge.h>
26 #include <asm/mpic.h>
27 #include <mm/mmu_decl.h>
28 #include <asm/udbg.h>
29 
30 #include <sysdev/fsl_soc.h>
31 #include <sysdev/fsl_pci.h>
32 
33 #include <asm/cpm2.h>
34 #include <sysdev/cpm2_pic.h>
35 
36 #include "mpc85xx.h"
37 
38 #define KSI8560_CPLD_HVR		0x04 /* Hardware Version Register */
39 #define KSI8560_CPLD_PVR		0x08 /* PLD Version Register */
40 #define KSI8560_CPLD_RCR1		0x30 /* Reset Command Register 1 */
41 
42 #define KSI8560_CPLD_RCR1_CPUHR		0x80 /* CPU Hard Reset */
43 
44 static void __iomem *cpld_base = NULL;
45 
46 static void __noreturn machine_restart(char *cmd)
47 {
48 	if (cpld_base)
49 		out_8(cpld_base + KSI8560_CPLD_RCR1, KSI8560_CPLD_RCR1_CPUHR);
50 	else
51 		printk(KERN_ERR "Can't find CPLD base, hang forever\n");
52 
53 	for (;;);
54 }
55 
56 static void __init ksi8560_pic_init(void)
57 {
58 	struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,
59 			0, 256, " OpenPIC  ");
60 	BUG_ON(mpic == NULL);
61 	mpic_init(mpic);
62 
63 	mpc85xx_cpm2_pic_init();
64 }
65 
66 #ifdef CONFIG_CPM2
67 /*
68  * Setup I/O ports
69  */
70 struct cpm_pin {
71 	int port, pin, flags;
72 };
73 
74 static struct cpm_pin __initdata ksi8560_pins[] = {
75 	/* SCC1 */
76 	{3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
77 	{3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
78 	{3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
79 
80 	/* SCC2 */
81 	{3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
82 	{3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
83 	{3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
84 
85 	/* FCC1 */
86 	{0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
87 	{0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
88 	{0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
89 	{0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
90 	{0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
91 	{0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
92 	{0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
93 	{0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
94 	{0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
95 	{0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
96 	{0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
97 	{0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
98 	{0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
99 	{0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
100 	{2, 23, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK9 */
101 	{2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK10 */
102 
103 };
104 
105 static void __init init_ioports(void)
106 {
107 	int i;
108 
109 	for (i = 0; i < ARRAY_SIZE(ksi8560_pins); i++) {
110 		struct cpm_pin *pin = &ksi8560_pins[i];
111 		cpm2_set_pin(pin->port, pin->pin, pin->flags);
112 	}
113 
114 	cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
115 	cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
116 	cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
117 	cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
118 	cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK9, CPM_CLK_RX);
119 	cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX);
120 }
121 #endif
122 
123 /*
124  * Setup the architecture
125  */
126 static void __init ksi8560_setup_arch(void)
127 {
128 	struct device_node *cpld;
129 
130 	cpld = of_find_compatible_node(NULL, NULL, "emerson,KSI8560-cpld");
131 	if (cpld)
132 		cpld_base = of_iomap(cpld, 0);
133 	else
134 		printk(KERN_ERR "Can't find CPLD in device tree\n");
135 
136 	of_node_put(cpld);
137 
138 	if (ppc_md.progress)
139 		ppc_md.progress("ksi8560_setup_arch()", 0);
140 
141 #ifdef CONFIG_CPM2
142 	cpm2_reset();
143 	init_ioports();
144 #endif
145 }
146 
147 static void ksi8560_show_cpuinfo(struct seq_file *m)
148 {
149 	uint pvid, svid, phid1;
150 
151 	pvid = mfspr(SPRN_PVR);
152 	svid = mfspr(SPRN_SVR);
153 
154 	seq_printf(m, "Vendor\t\t: Emerson Network Power\n");
155 	seq_printf(m, "Board\t\t: KSI8560\n");
156 
157 	if (cpld_base) {
158 		seq_printf(m, "Hardware rev\t: %d\n",
159 					in_8(cpld_base + KSI8560_CPLD_HVR));
160 		seq_printf(m, "CPLD rev\t: %d\n",
161 					in_8(cpld_base + KSI8560_CPLD_PVR));
162 	} else
163 		seq_printf(m, "Unknown Hardware and CPLD revs\n");
164 
165 	seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
166 	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
167 
168 	/* Display cpu Pll setting */
169 	phid1 = mfspr(SPRN_HID1);
170 	seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
171 }
172 
173 machine_device_initcall(ksi8560, mpc85xx_common_publish_devices);
174 
175 define_machine(ksi8560) {
176 	.name			= "KSI8560",
177 	.compatible		= "emerson,KSI8560",
178 	.setup_arch		= ksi8560_setup_arch,
179 	.init_IRQ		= ksi8560_pic_init,
180 	.show_cpuinfo		= ksi8560_show_cpuinfo,
181 	.get_irq		= mpic_get_irq,
182 	.restart		= machine_restart,
183 };
184