1 /*
2  * Routines common to most mpc85xx-based boards.
3  *
4  * This is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8 
9 #include <linux/of_irq.h>
10 #include <linux/of_platform.h>
11 
12 #include <asm/qe.h>
13 #include <sysdev/cpm2_pic.h>
14 
15 #include "mpc85xx.h"
16 
17 static struct of_device_id __initdata mpc85xx_common_ids[] = {
18 	{ .type = "soc", },
19 	{ .compatible = "soc", },
20 	{ .compatible = "simple-bus", },
21 	{ .name = "cpm", },
22 	{ .name = "localbus", },
23 	{ .compatible = "gianfar", },
24 	{ .compatible = "fsl,qe", },
25 	{ .compatible = "fsl,cpm2", },
26 	{ .compatible = "fsl,srio", },
27 	/* So that the DMA channel nodes can be probed individually: */
28 	{ .compatible = "fsl,eloplus-dma", },
29 	/* For the PMC driver */
30 	{ .compatible = "fsl,mpc8548-guts", },
31 	/* Probably unnecessary? */
32 	{ .compatible = "gpio-leds", },
33 	/* For all PCI controllers */
34 	{ .compatible = "fsl,mpc8540-pci", },
35 	{ .compatible = "fsl,mpc8548-pcie", },
36 	{ .compatible = "fsl,p1022-pcie", },
37 	{ .compatible = "fsl,p1010-pcie", },
38 	{ .compatible = "fsl,p1023-pcie", },
39 	{ .compatible = "fsl,p4080-pcie", },
40 	{ .compatible = "fsl,qoriq-pcie-v2.4", },
41 	{ .compatible = "fsl,qoriq-pcie-v2.3", },
42 	{ .compatible = "fsl,qoriq-pcie-v2.2", },
43 	{},
44 };
45 
46 int __init mpc85xx_common_publish_devices(void)
47 {
48 	return of_platform_bus_probe(NULL, mpc85xx_common_ids, NULL);
49 }
50 #ifdef CONFIG_CPM2
51 static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
52 {
53 	struct irq_chip *chip = irq_desc_get_chip(desc);
54 	int cascade_irq;
55 
56 	while ((cascade_irq = cpm2_get_irq()) >= 0)
57 		generic_handle_irq(cascade_irq);
58 
59 	chip->irq_eoi(&desc->irq_data);
60 }
61 
62 
63 void __init mpc85xx_cpm2_pic_init(void)
64 {
65 	struct device_node *np;
66 	int irq;
67 
68 	/* Setup CPM2 PIC */
69 	np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
70 	if (np == NULL) {
71 		printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
72 		return;
73 	}
74 	irq = irq_of_parse_and_map(np, 0);
75 	if (irq == NO_IRQ) {
76 		of_node_put(np);
77 		printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
78 		return;
79 	}
80 
81 	cpm2_pic_init(np);
82 	of_node_put(np);
83 	irq_set_chained_handler(irq, cpm2_cascade);
84 }
85 #endif
86 
87 #ifdef CONFIG_QUICC_ENGINE
88 void __init mpc85xx_qe_init(void)
89 {
90 	struct device_node *np;
91 
92 	np = of_find_compatible_node(NULL, NULL, "fsl,qe");
93 	if (!np) {
94 		np = of_find_node_by_name(NULL, "qe");
95 		if (!np) {
96 			pr_err("%s: Could not find Quicc Engine node\n",
97 					__func__);
98 			return;
99 		}
100 	}
101 
102 	if (!of_device_is_available(np)) {
103 		of_node_put(np);
104 		return;
105 	}
106 
107 	qe_reset();
108 	of_node_put(np);
109 
110 }
111 
112 void __init mpc85xx_qe_par_io_init(void)
113 {
114 	struct device_node *np;
115 
116 	np = of_find_node_by_name(NULL, "par_io");
117 	if (np) {
118 		struct device_node *ucc;
119 
120 		par_io_init(np);
121 		of_node_put(np);
122 
123 		for_each_node_by_name(ucc, "ucc")
124 			par_io_of_config(ucc);
125 
126 	}
127 }
128 #endif
129