1 /*
2  * Routines common to most mpc85xx-based boards.
3  *
4  * This is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8 
9 #include <linux/of_irq.h>
10 #include <linux/of_platform.h>
11 
12 #include <asm/fsl_pm.h>
13 #include <soc/fsl/qe/qe.h>
14 #include <sysdev/cpm2_pic.h>
15 
16 #include "mpc85xx.h"
17 
18 const struct fsl_pm_ops *qoriq_pm_ops;
19 
20 static const struct of_device_id mpc85xx_common_ids[] __initconst = {
21 	{ .type = "soc", },
22 	{ .compatible = "soc", },
23 	{ .compatible = "simple-bus", },
24 	{ .name = "cpm", },
25 	{ .name = "localbus", },
26 	{ .compatible = "gianfar", },
27 	{ .compatible = "fsl,qe", },
28 	{ .compatible = "fsl,cpm2", },
29 	{ .compatible = "fsl,srio", },
30 	/* So that the DMA channel nodes can be probed individually: */
31 	{ .compatible = "fsl,eloplus-dma", },
32 	/* For the PMC driver */
33 	{ .compatible = "fsl,mpc8548-guts", },
34 	/* Probably unnecessary? */
35 	{ .compatible = "gpio-leds", },
36 	/* For all PCI controllers */
37 	{ .compatible = "fsl,mpc8540-pci", },
38 	{ .compatible = "fsl,mpc8548-pcie", },
39 	{ .compatible = "fsl,p1022-pcie", },
40 	{ .compatible = "fsl,p1010-pcie", },
41 	{ .compatible = "fsl,p1023-pcie", },
42 	{ .compatible = "fsl,p4080-pcie", },
43 	{ .compatible = "fsl,qoriq-pcie-v2.4", },
44 	{ .compatible = "fsl,qoriq-pcie-v2.3", },
45 	{ .compatible = "fsl,qoriq-pcie-v2.2", },
46 	{ .compatible = "fsl,fman", },
47 	{},
48 };
49 
50 int __init mpc85xx_common_publish_devices(void)
51 {
52 	return of_platform_bus_probe(NULL, mpc85xx_common_ids, NULL);
53 }
54 #ifdef CONFIG_CPM2
55 static void cpm2_cascade(struct irq_desc *desc)
56 {
57 	struct irq_chip *chip = irq_desc_get_chip(desc);
58 	int cascade_irq;
59 
60 	while ((cascade_irq = cpm2_get_irq()) >= 0)
61 		generic_handle_irq(cascade_irq);
62 
63 	chip->irq_eoi(&desc->irq_data);
64 }
65 
66 
67 void __init mpc85xx_cpm2_pic_init(void)
68 {
69 	struct device_node *np;
70 	int irq;
71 
72 	/* Setup CPM2 PIC */
73 	np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
74 	if (np == NULL) {
75 		printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
76 		return;
77 	}
78 	irq = irq_of_parse_and_map(np, 0);
79 	if (!irq) {
80 		of_node_put(np);
81 		printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
82 		return;
83 	}
84 
85 	cpm2_pic_init(np);
86 	of_node_put(np);
87 	irq_set_chained_handler(irq, cpm2_cascade);
88 }
89 #endif
90 
91 #ifdef CONFIG_QUICC_ENGINE
92 void __init mpc85xx_qe_init(void)
93 {
94 	struct device_node *np;
95 
96 	np = of_find_compatible_node(NULL, NULL, "fsl,qe");
97 	if (!np) {
98 		np = of_find_node_by_name(NULL, "qe");
99 		if (!np) {
100 			pr_err("%s: Could not find Quicc Engine node\n",
101 					__func__);
102 			return;
103 		}
104 	}
105 
106 	if (!of_device_is_available(np)) {
107 		of_node_put(np);
108 		return;
109 	}
110 
111 	of_node_put(np);
112 
113 }
114 
115 void __init mpc85xx_qe_par_io_init(void)
116 {
117 	struct device_node *np;
118 
119 	np = of_find_node_by_name(NULL, "par_io");
120 	if (np) {
121 		struct device_node *ucc;
122 
123 		par_io_init(np);
124 		of_node_put(np);
125 
126 		for_each_node_by_name(ucc, "ucc")
127 			par_io_of_config(ucc);
128 
129 	}
130 }
131 #endif
132