1 /*
2  * MPC83xx suspend support
3  *
4  * Author: Scott Wood <scottwood@freescale.com>
5  *
6  * Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of the GNU General Public License version 2 as published
10  * by the Free Software Foundation.
11  */
12 
13 #include <linux/init.h>
14 #include <linux/pm.h>
15 #include <linux/types.h>
16 #include <linux/ioport.h>
17 #include <linux/interrupt.h>
18 #include <linux/wait.h>
19 #include <linux/kthread.h>
20 #include <linux/freezer.h>
21 #include <linux/suspend.h>
22 #include <linux/fsl_devices.h>
23 #include <linux/of_platform.h>
24 #include <linux/export.h>
25 
26 #include <asm/reg.h>
27 #include <asm/io.h>
28 #include <asm/time.h>
29 #include <asm/mpc6xx.h>
30 #include <asm/switch_to.h>
31 
32 #include <sysdev/fsl_soc.h>
33 
34 #define PMCCR1_NEXT_STATE       0x0C /* Next state for power management */
35 #define PMCCR1_NEXT_STATE_SHIFT 2
36 #define PMCCR1_CURR_STATE       0x03 /* Current state for power management*/
37 #define IMMR_SYSCR_OFFSET       0x100
38 #define IMMR_RCW_OFFSET         0x900
39 #define RCW_PCI_HOST            0x80000000
40 
41 void mpc83xx_enter_deep_sleep(phys_addr_t immrbase);
42 
43 struct mpc83xx_pmc {
44 	u32 config;
45 #define PMCCR_DLPEN 2 /* DDR SDRAM low power enable */
46 #define PMCCR_SLPEN 1 /* System low power enable */
47 
48 	u32 event;
49 	u32 mask;
50 /* All but PMCI are deep-sleep only */
51 #define PMCER_GPIO   0x100
52 #define PMCER_PCI    0x080
53 #define PMCER_USB    0x040
54 #define PMCER_ETSEC1 0x020
55 #define PMCER_ETSEC2 0x010
56 #define PMCER_TIMER  0x008
57 #define PMCER_INT1   0x004
58 #define PMCER_INT2   0x002
59 #define PMCER_PMCI   0x001
60 #define PMCER_ALL    0x1FF
61 
62 	/* deep-sleep only */
63 	u32 config1;
64 #define PMCCR1_USE_STATE  0x80000000
65 #define PMCCR1_PME_EN     0x00000080
66 #define PMCCR1_ASSERT_PME 0x00000040
67 #define PMCCR1_POWER_OFF  0x00000020
68 
69 	/* deep-sleep only */
70 	u32 config2;
71 };
72 
73 struct mpc83xx_rcw {
74 	u32 rcwlr;
75 	u32 rcwhr;
76 };
77 
78 struct mpc83xx_clock {
79 	u32 spmr;
80 	u32 occr;
81 	u32 sccr;
82 };
83 
84 struct mpc83xx_syscr {
85 	__be32 sgprl;
86 	__be32 sgprh;
87 	__be32 spridr;
88 	__be32 :32;
89 	__be32 spcr;
90 	__be32 sicrl;
91 	__be32 sicrh;
92 };
93 
94 struct mpc83xx_saved {
95 	u32 sicrl;
96 	u32 sicrh;
97 	u32 sccr;
98 };
99 
100 struct pmc_type {
101 	int has_deep_sleep;
102 };
103 
104 static struct platform_device *pmc_dev;
105 static int has_deep_sleep, deep_sleeping;
106 static int pmc_irq;
107 static struct mpc83xx_pmc __iomem *pmc_regs;
108 static struct mpc83xx_clock __iomem *clock_regs;
109 static struct mpc83xx_syscr __iomem *syscr_regs;
110 static struct mpc83xx_saved saved_regs;
111 static int is_pci_agent, wake_from_pci;
112 static phys_addr_t immrbase;
113 static int pci_pm_state;
114 static DECLARE_WAIT_QUEUE_HEAD(agent_wq);
115 
116 int fsl_deep_sleep(void)
117 {
118 	return deep_sleeping;
119 }
120 EXPORT_SYMBOL(fsl_deep_sleep);
121 
122 static int mpc83xx_change_state(void)
123 {
124 	u32 curr_state;
125 	u32 reg_cfg1 = in_be32(&pmc_regs->config1);
126 
127 	if (is_pci_agent) {
128 		pci_pm_state = (reg_cfg1 & PMCCR1_NEXT_STATE) >>
129 		               PMCCR1_NEXT_STATE_SHIFT;
130 		curr_state = reg_cfg1 & PMCCR1_CURR_STATE;
131 
132 		if (curr_state != pci_pm_state) {
133 			reg_cfg1 &= ~PMCCR1_CURR_STATE;
134 			reg_cfg1 |= pci_pm_state;
135 			out_be32(&pmc_regs->config1, reg_cfg1);
136 
137 			wake_up(&agent_wq);
138 			return 1;
139 		}
140 	}
141 
142 	return 0;
143 }
144 
145 static irqreturn_t pmc_irq_handler(int irq, void *dev_id)
146 {
147 	u32 event = in_be32(&pmc_regs->event);
148 	int ret = IRQ_NONE;
149 
150 	if (mpc83xx_change_state())
151 		ret = IRQ_HANDLED;
152 
153 	if (event) {
154 		out_be32(&pmc_regs->event, event);
155 		ret = IRQ_HANDLED;
156 	}
157 
158 	return ret;
159 }
160 
161 static void mpc83xx_suspend_restore_regs(void)
162 {
163 	out_be32(&syscr_regs->sicrl, saved_regs.sicrl);
164 	out_be32(&syscr_regs->sicrh, saved_regs.sicrh);
165 	out_be32(&clock_regs->sccr, saved_regs.sccr);
166 }
167 
168 static void mpc83xx_suspend_save_regs(void)
169 {
170 	saved_regs.sicrl = in_be32(&syscr_regs->sicrl);
171 	saved_regs.sicrh = in_be32(&syscr_regs->sicrh);
172 	saved_regs.sccr = in_be32(&clock_regs->sccr);
173 }
174 
175 static int mpc83xx_suspend_enter(suspend_state_t state)
176 {
177 	int ret = -EAGAIN;
178 
179 	/* Don't go to sleep if there's a race where pci_pm_state changes
180 	 * between the agent thread checking it and the PM code disabling
181 	 * interrupts.
182 	 */
183 	if (wake_from_pci) {
184 		if (pci_pm_state != (deep_sleeping ? 3 : 2))
185 			goto out;
186 
187 		out_be32(&pmc_regs->config1,
188 		         in_be32(&pmc_regs->config1) | PMCCR1_PME_EN);
189 	}
190 
191 	/* Put the system into low-power mode and the RAM
192 	 * into self-refresh mode once the core goes to
193 	 * sleep.
194 	 */
195 
196 	out_be32(&pmc_regs->config, PMCCR_SLPEN | PMCCR_DLPEN);
197 
198 	/* If it has deep sleep (i.e. it's an 831x or compatible),
199 	 * disable power to the core upon entering sleep mode.  This will
200 	 * require going through the boot firmware upon a wakeup event.
201 	 */
202 
203 	if (deep_sleeping) {
204 		mpc83xx_suspend_save_regs();
205 
206 		out_be32(&pmc_regs->mask, PMCER_ALL);
207 
208 		out_be32(&pmc_regs->config1,
209 		         in_be32(&pmc_regs->config1) | PMCCR1_POWER_OFF);
210 
211 		enable_kernel_fp();
212 
213 		mpc83xx_enter_deep_sleep(immrbase);
214 
215 		out_be32(&pmc_regs->config1,
216 		         in_be32(&pmc_regs->config1) & ~PMCCR1_POWER_OFF);
217 
218 		out_be32(&pmc_regs->mask, PMCER_PMCI);
219 
220 		mpc83xx_suspend_restore_regs();
221 	} else {
222 		out_be32(&pmc_regs->mask, PMCER_PMCI);
223 
224 		mpc6xx_enter_standby();
225 	}
226 
227 	ret = 0;
228 
229 out:
230 	out_be32(&pmc_regs->config1,
231 	         in_be32(&pmc_regs->config1) & ~PMCCR1_PME_EN);
232 
233 	return ret;
234 }
235 
236 static void mpc83xx_suspend_end(void)
237 {
238 	deep_sleeping = 0;
239 }
240 
241 static int mpc83xx_suspend_valid(suspend_state_t state)
242 {
243 	return state == PM_SUSPEND_STANDBY || state == PM_SUSPEND_MEM;
244 }
245 
246 static int mpc83xx_suspend_begin(suspend_state_t state)
247 {
248 	switch (state) {
249 		case PM_SUSPEND_STANDBY:
250 			deep_sleeping = 0;
251 			return 0;
252 
253 		case PM_SUSPEND_MEM:
254 			if (has_deep_sleep)
255 				deep_sleeping = 1;
256 
257 			return 0;
258 
259 		default:
260 			return -EINVAL;
261 	}
262 }
263 
264 static int agent_thread_fn(void *data)
265 {
266 	while (1) {
267 		wait_event_interruptible(agent_wq, pci_pm_state >= 2);
268 		try_to_freeze();
269 
270 		if (signal_pending(current) || pci_pm_state < 2)
271 			continue;
272 
273 		/* With a preemptible kernel (or SMP), this could race with
274 		 * a userspace-driven suspend request.  It's probably best
275 		 * to avoid mixing the two with such a configuration (or
276 		 * else fix it by adding a mutex to state_store that we can
277 		 * synchronize with).
278 		 */
279 
280 		wake_from_pci = 1;
281 
282 		pm_suspend(pci_pm_state == 3 ? PM_SUSPEND_MEM :
283 		                               PM_SUSPEND_STANDBY);
284 
285 		wake_from_pci = 0;
286 	}
287 
288 	return 0;
289 }
290 
291 static void mpc83xx_set_agent(void)
292 {
293 	out_be32(&pmc_regs->config1, PMCCR1_USE_STATE);
294 	out_be32(&pmc_regs->mask, PMCER_PMCI);
295 
296 	kthread_run(agent_thread_fn, NULL, "PCI power mgt");
297 }
298 
299 static int mpc83xx_is_pci_agent(void)
300 {
301 	struct mpc83xx_rcw __iomem *rcw_regs;
302 	int ret;
303 
304 	rcw_regs = ioremap(get_immrbase() + IMMR_RCW_OFFSET,
305 	                   sizeof(struct mpc83xx_rcw));
306 
307 	if (!rcw_regs)
308 		return -ENOMEM;
309 
310 	ret = !(in_be32(&rcw_regs->rcwhr) & RCW_PCI_HOST);
311 
312 	iounmap(rcw_regs);
313 	return ret;
314 }
315 
316 static const struct platform_suspend_ops mpc83xx_suspend_ops = {
317 	.valid = mpc83xx_suspend_valid,
318 	.begin = mpc83xx_suspend_begin,
319 	.enter = mpc83xx_suspend_enter,
320 	.end = mpc83xx_suspend_end,
321 };
322 
323 static struct of_device_id pmc_match[];
324 static int pmc_probe(struct platform_device *ofdev)
325 {
326 	const struct of_device_id *match;
327 	struct device_node *np = ofdev->dev.of_node;
328 	struct resource res;
329 	const struct pmc_type *type;
330 	int ret = 0;
331 
332 	match = of_match_device(pmc_match, &ofdev->dev);
333 	if (!match)
334 		return -EINVAL;
335 
336 	type = match->data;
337 
338 	if (!of_device_is_available(np))
339 		return -ENODEV;
340 
341 	has_deep_sleep = type->has_deep_sleep;
342 	immrbase = get_immrbase();
343 	pmc_dev = ofdev;
344 
345 	is_pci_agent = mpc83xx_is_pci_agent();
346 	if (is_pci_agent < 0)
347 		return is_pci_agent;
348 
349 	ret = of_address_to_resource(np, 0, &res);
350 	if (ret)
351 		return -ENODEV;
352 
353 	pmc_irq = irq_of_parse_and_map(np, 0);
354 	if (pmc_irq != NO_IRQ) {
355 		ret = request_irq(pmc_irq, pmc_irq_handler, IRQF_SHARED,
356 		                  "pmc", ofdev);
357 
358 		if (ret)
359 			return -EBUSY;
360 	}
361 
362 	pmc_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
363 
364 	if (!pmc_regs) {
365 		ret = -ENOMEM;
366 		goto out;
367 	}
368 
369 	ret = of_address_to_resource(np, 1, &res);
370 	if (ret) {
371 		ret = -ENODEV;
372 		goto out_pmc;
373 	}
374 
375 	clock_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
376 
377 	if (!clock_regs) {
378 		ret = -ENOMEM;
379 		goto out_pmc;
380 	}
381 
382 	if (has_deep_sleep) {
383 		syscr_regs = ioremap(immrbase + IMMR_SYSCR_OFFSET,
384 				     sizeof(*syscr_regs));
385 		if (!syscr_regs) {
386 			ret = -ENOMEM;
387 			goto out_syscr;
388 		}
389 	}
390 
391 	if (is_pci_agent)
392 		mpc83xx_set_agent();
393 
394 	suspend_set_ops(&mpc83xx_suspend_ops);
395 	return 0;
396 
397 out_syscr:
398 	iounmap(clock_regs);
399 out_pmc:
400 	iounmap(pmc_regs);
401 out:
402 	if (pmc_irq != NO_IRQ)
403 		free_irq(pmc_irq, ofdev);
404 
405 	return ret;
406 }
407 
408 static int pmc_remove(struct platform_device *ofdev)
409 {
410 	return -EPERM;
411 };
412 
413 static struct pmc_type pmc_types[] = {
414 	{
415 		.has_deep_sleep = 1,
416 	},
417 	{
418 		.has_deep_sleep = 0,
419 	}
420 };
421 
422 static struct of_device_id pmc_match[] = {
423 	{
424 		.compatible = "fsl,mpc8313-pmc",
425 		.data = &pmc_types[0],
426 	},
427 	{
428 		.compatible = "fsl,mpc8349-pmc",
429 		.data = &pmc_types[1],
430 	},
431 	{}
432 };
433 
434 static struct platform_driver pmc_driver = {
435 	.driver = {
436 		.name = "mpc83xx-pmc",
437 		.owner = THIS_MODULE,
438 		.of_match_table = pmc_match,
439 	},
440 	.probe = pmc_probe,
441 	.remove = pmc_remove
442 };
443 
444 static int pmc_init(void)
445 {
446 	return platform_driver_register(&pmc_driver);
447 }
448 
449 module_init(pmc_init);
450