17d13d21aSKumar Gala #ifndef __MPC83XX_H__ 27d13d21aSKumar Gala #define __MPC83XX_H__ 37d13d21aSKumar Gala 47d13d21aSKumar Gala #include <linux/init.h> 57d13d21aSKumar Gala #include <linux/device.h> 67d52c7b0SKumar Gala #include <asm/pci-bridge.h> 77d13d21aSKumar Gala 8c1616982SLi Yang /* System Clock Control Register */ 9c1616982SLi Yang #define MPC83XX_SCCR_OFFS 0xA08 10e5a94af8SLi Yang #define MPC83XX_SCCR_USB_MASK 0x00f00000 11c1616982SLi Yang #define MPC83XX_SCCR_USB_MPHCM_11 0x00c00000 12c1616982SLi Yang #define MPC83XX_SCCR_USB_MPHCM_01 0x00400000 13c1616982SLi Yang #define MPC83XX_SCCR_USB_MPHCM_10 0x00800000 14c1616982SLi Yang #define MPC83XX_SCCR_USB_DRCM_11 0x00300000 15c1616982SLi Yang #define MPC83XX_SCCR_USB_DRCM_01 0x00100000 16c1616982SLi Yang #define MPC83XX_SCCR_USB_DRCM_10 0x00200000 17b74a7e50SKim Phillips #define MPC8315_SCCR_USB_MASK 0x00c00000 18b74a7e50SKim Phillips #define MPC8315_SCCR_USB_DRCM_11 0x00c00000 191a9ebc0cSAnton Vorontsov #define MPC8315_SCCR_USB_DRCM_01 0x00400000 20e10241d8SLi Yang #define MPC837X_SCCR_USB_DRCM_11 0x00c00000 21c1616982SLi Yang 22c1616982SLi Yang /* system i/o configuration register low */ 23c1616982SLi Yang #define MPC83XX_SICRL_OFFS 0x114 24e5a94af8SLi Yang #define MPC834X_SICRL_USB_MASK 0x60000000 25b7d66c88SPeter Korsgaard #define MPC834X_SICRL_USB0 0x20000000 26b7d66c88SPeter Korsgaard #define MPC834X_SICRL_USB1 0x40000000 27e5a94af8SLi Yang #define MPC831X_SICRL_USB_MASK 0x00000c00 28e5a94af8SLi Yang #define MPC831X_SICRL_USB_ULPI 0x00000800 29c0a20159SAnton Vorontsov #define MPC8315_SICRL_USB_MASK 0x000000fc 30c0a20159SAnton Vorontsov #define MPC8315_SICRL_USB_ULPI 0x00000054 31e10241d8SLi Yang #define MPC837X_SICRL_USB_MASK 0xf0000000 32e10241d8SLi Yang #define MPC837X_SICRL_USB_ULPI 0x50000000 3389f37296SAnton Vorontsov #define MPC837X_SICRL_USBB_MASK 0x30000000 3489f37296SAnton Vorontsov #define MPC837X_SICRL_SD 0x20000000 35c1616982SLi Yang 36c1616982SLi Yang /* system i/o configuration register high */ 37c1616982SLi Yang #define MPC83XX_SICRH_OFFS 0x118 38fd066e85SIlya Yanok #define MPC8308_SICRH_USB_MASK 0x000c0000 39fd066e85SIlya Yanok #define MPC8308_SICRH_USB_ULPI 0x00040000 40e5a94af8SLi Yang #define MPC834X_SICRH_USB_UTMI 0x00020000 41e5a94af8SLi Yang #define MPC831X_SICRH_USB_MASK 0x000000e0 42e5a94af8SLi Yang #define MPC831X_SICRH_USB_ULPI 0x000000a0 43c0a20159SAnton Vorontsov #define MPC8315_SICRH_USB_MASK 0x0000ff00 44c0a20159SAnton Vorontsov #define MPC8315_SICRH_USB_ULPI 0x00000000 4589f37296SAnton Vorontsov #define MPC837X_SICRH_SPI_MASK 0x00000003 4689f37296SAnton Vorontsov #define MPC837X_SICRH_SD 0x00000001 47e5a94af8SLi Yang 48e5a94af8SLi Yang /* USB Control Register */ 49e5a94af8SLi Yang #define FSL_USB2_CONTROL_OFFS 0x500 50e5a94af8SLi Yang #define CONTROL_UTMI_PHY_EN 0x00000200 511a9ebc0cSAnton Vorontsov #define CONTROL_REFSEL_24MHZ 0x00000040 52e5a94af8SLi Yang #define CONTROL_REFSEL_48MHZ 0x00000080 53e5a94af8SLi Yang #define CONTROL_PHY_CLK_SEL_ULPI 0x00000400 54e5a94af8SLi Yang #define CONTROL_OTG_PORT 0x00000020 55e5a94af8SLi Yang 56e5a94af8SLi Yang /* USB PORTSC Registers */ 57e5a94af8SLi Yang #define FSL_USB2_PORTSC1_OFFS 0x184 58e5a94af8SLi Yang #define FSL_USB2_PORTSC2_OFFS 0x188 59e5a94af8SLi Yang #define PORTSCX_PTW_16BIT 0x10000000 60e5a94af8SLi Yang #define PORTSCX_PTS_UTMI 0x00000000 61e5a94af8SLi Yang #define PORTSCX_PTS_ULPI 0x80000000 62c1616982SLi Yang 637d13d21aSKumar Gala /* 647d13d21aSKumar Gala * Declaration for the various functions exported by the 657d13d21aSKumar Gala * mpc83xx_* files. Mostly for use by mpc83xx_setup 667d13d21aSKumar Gala */ 677d13d21aSKumar Gala 6830f59336SKumar Gala extern void mpc83xx_restart(char *cmd); 6930f59336SKumar Gala extern long mpc83xx_time_init(void); 7081b36a0bSAnton Vorontsov extern int mpc837x_usb_cfg(void); 71e5a94af8SLi Yang extern int mpc834x_usb_cfg(void); 72e5a94af8SLi Yang extern int mpc831x_usb_cfg(void); 737d13d21aSKumar Gala 747d13d21aSKumar Gala #endif /* __MPC83XX_H__ */ 75