1 /* 2 * arch/powerpc/platforms/83xx/mpc832x_rdb.c 3 * 4 * Copyright (C) Freescale Semiconductor, Inc. 2007. All rights reserved. 5 * 6 * Description: 7 * MPC832x RDB board specific routines. 8 * This file is based on mpc832x_mds.c and mpc8313_rdb.c 9 * Author: Michael Barkowski <michael.barkowski@freescale.com> 10 * 11 * This program is free software; you can redistribute it and/or modify it 12 * under the terms of the GNU General Public License as published by the 13 * Free Software Foundation; either version 2 of the License, or (at your 14 * option) any later version. 15 */ 16 17 #include <linux/pci.h> 18 #include <linux/interrupt.h> 19 #include <linux/spi/spi.h> 20 #include <linux/spi/mmc_spi.h> 21 #include <linux/mmc/host.h> 22 #include <linux/of_platform.h> 23 24 #include <asm/time.h> 25 #include <asm/ipic.h> 26 #include <asm/udbg.h> 27 #include <asm/qe.h> 28 #include <asm/qe_ic.h> 29 #include <sysdev/fsl_soc.h> 30 #include <sysdev/fsl_pci.h> 31 32 #include "mpc83xx.h" 33 34 #undef DEBUG 35 #ifdef DEBUG 36 #define DBG(fmt...) udbg_printf(fmt) 37 #else 38 #define DBG(fmt...) 39 #endif 40 41 static void mpc83xx_spi_activate_cs(u8 cs, u8 polarity) 42 { 43 pr_debug("%s %d %d\n", __func__, cs, polarity); 44 par_io_data_set(3, 13, polarity); 45 } 46 47 static void mpc83xx_spi_deactivate_cs(u8 cs, u8 polarity) 48 { 49 pr_debug("%s %d %d\n", __func__, cs, polarity); 50 par_io_data_set(3, 13, !polarity); 51 } 52 53 static struct mmc_spi_platform_data mpc832x_mmc_pdata = { 54 .ocr_mask = MMC_VDD_33_34, 55 }; 56 57 static struct spi_board_info mpc832x_spi_boardinfo = { 58 .bus_num = 0x4c0, 59 .chip_select = 0, 60 .max_speed_hz = 50000000, 61 .modalias = "mmc_spi", 62 .platform_data = &mpc832x_mmc_pdata, 63 }; 64 65 static int __init mpc832x_spi_init(void) 66 { 67 par_io_config_pin(3, 0, 3, 0, 1, 0); /* SPI1 MOSI, I/O */ 68 par_io_config_pin(3, 1, 3, 0, 1, 0); /* SPI1 MISO, I/O */ 69 par_io_config_pin(3, 2, 3, 0, 1, 0); /* SPI1 CLK, I/O */ 70 par_io_config_pin(3, 3, 2, 0, 1, 0); /* SPI1 SEL, I */ 71 72 par_io_config_pin(3, 13, 1, 0, 0, 0); /* !SD_CS, O */ 73 par_io_config_pin(3, 14, 2, 0, 0, 0); /* SD_INSERT, I */ 74 par_io_config_pin(3, 15, 2, 0, 0, 0); /* SD_PROTECT,I */ 75 76 return fsl_spi_init(&mpc832x_spi_boardinfo, 1, 77 mpc83xx_spi_activate_cs, 78 mpc83xx_spi_deactivate_cs); 79 } 80 81 machine_device_initcall(mpc832x_rdb, mpc832x_spi_init); 82 83 /* ************************************************************************ 84 * 85 * Setup the architecture 86 * 87 */ 88 static void __init mpc832x_rdb_setup_arch(void) 89 { 90 #if defined(CONFIG_PCI) || defined(CONFIG_QUICC_ENGINE) 91 struct device_node *np; 92 #endif 93 94 if (ppc_md.progress) 95 ppc_md.progress("mpc832x_rdb_setup_arch()", 0); 96 97 #ifdef CONFIG_PCI 98 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") 99 mpc83xx_add_bridge(np); 100 #endif 101 102 #ifdef CONFIG_QUICC_ENGINE 103 qe_reset(); 104 105 if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) { 106 par_io_init(np); 107 of_node_put(np); 108 109 for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;) 110 par_io_of_config(np); 111 } 112 #endif /* CONFIG_QUICC_ENGINE */ 113 } 114 115 static struct of_device_id mpc832x_ids[] = { 116 { .type = "soc", }, 117 { .compatible = "soc", }, 118 { .type = "qe", }, 119 { .compatible = "fsl,qe", }, 120 {}, 121 }; 122 123 static int __init mpc832x_declare_of_platform_devices(void) 124 { 125 /* Publish the QE devices */ 126 of_platform_bus_probe(NULL, mpc832x_ids, NULL); 127 128 return 0; 129 } 130 machine_device_initcall(mpc832x_rdb, mpc832x_declare_of_platform_devices); 131 132 void __init mpc832x_rdb_init_IRQ(void) 133 { 134 135 struct device_node *np; 136 137 np = of_find_node_by_type(NULL, "ipic"); 138 if (!np) 139 return; 140 141 ipic_init(np, 0); 142 143 /* Initialize the default interrupt mapping priorities, 144 * in case the boot rom changed something on us. 145 */ 146 ipic_set_default_priority(); 147 of_node_put(np); 148 149 #ifdef CONFIG_QUICC_ENGINE 150 np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic"); 151 if (!np) { 152 np = of_find_node_by_type(NULL, "qeic"); 153 if (!np) 154 return; 155 } 156 qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic); 157 of_node_put(np); 158 #endif /* CONFIG_QUICC_ENGINE */ 159 } 160 161 /* 162 * Called very early, MMU is off, device-tree isn't unflattened 163 */ 164 static int __init mpc832x_rdb_probe(void) 165 { 166 unsigned long root = of_get_flat_dt_root(); 167 168 return of_flat_dt_is_compatible(root, "MPC832xRDB"); 169 } 170 171 define_machine(mpc832x_rdb) { 172 .name = "MPC832x RDB", 173 .probe = mpc832x_rdb_probe, 174 .setup_arch = mpc832x_rdb_setup_arch, 175 .init_IRQ = mpc832x_rdb_init_IRQ, 176 .get_irq = ipic_get_irq, 177 .restart = mpc83xx_restart, 178 .time_init = mpc83xx_time_init, 179 .calibrate_decr = generic_calibrate_decr, 180 .progress = udbg_progress, 181 }; 182