1 /* 2 * Copyright 2008-2011 DENX Software Engineering GmbH 3 * Author: Heiko Schocher <hs@denx.de> 4 * 5 * Description: 6 * Keymile 83xx platform specific routines. 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the 10 * Free Software Foundation; either version 2 of the License, or (at your 11 * option) any later version. 12 */ 13 14 #include <linux/stddef.h> 15 #include <linux/kernel.h> 16 #include <linux/init.h> 17 #include <linux/errno.h> 18 #include <linux/reboot.h> 19 #include <linux/pci.h> 20 #include <linux/kdev_t.h> 21 #include <linux/major.h> 22 #include <linux/console.h> 23 #include <linux/delay.h> 24 #include <linux/seq_file.h> 25 #include <linux/root_dev.h> 26 #include <linux/initrd.h> 27 #include <linux/of_platform.h> 28 #include <linux/of_device.h> 29 30 #include <linux/atomic.h> 31 #include <asm/time.h> 32 #include <asm/io.h> 33 #include <asm/machdep.h> 34 #include <asm/ipic.h> 35 #include <asm/irq.h> 36 #include <asm/prom.h> 37 #include <asm/udbg.h> 38 #include <sysdev/fsl_soc.h> 39 #include <sysdev/fsl_pci.h> 40 #include <asm/qe.h> 41 #include <asm/qe_ic.h> 42 43 #include "mpc83xx.h" 44 45 #define SVR_REV(svr) (((svr) >> 0) & 0xFFFF) /* Revision field */ 46 /* ************************************************************************ 47 * 48 * Setup the architecture 49 * 50 */ 51 static void __init mpc83xx_km_setup_arch(void) 52 { 53 #ifdef CONFIG_QUICC_ENGINE 54 struct device_node *np; 55 #endif 56 57 if (ppc_md.progress) 58 ppc_md.progress("kmpbec83xx_setup_arch()", 0); 59 60 mpc83xx_setup_pci(); 61 62 #ifdef CONFIG_QUICC_ENGINE 63 qe_reset(); 64 65 np = of_find_node_by_name(NULL, "par_io"); 66 if (np != NULL) { 67 par_io_init(np); 68 of_node_put(np); 69 70 for_each_node_by_name(np, "spi") 71 par_io_of_config(np); 72 73 for_each_node_by_name(np, "ucc") 74 par_io_of_config(np); 75 } 76 77 np = of_find_compatible_node(NULL, "network", "ucc_geth"); 78 if (np != NULL) { 79 /* 80 * handle mpc8360E Erratum QE_ENET10: 81 * RGMII AC values do not meet the specification 82 */ 83 uint svid = mfspr(SPRN_SVR); 84 struct device_node *np_par; 85 struct resource res; 86 void __iomem *base; 87 int ret; 88 89 np_par = of_find_node_by_name(NULL, "par_io"); 90 if (np_par == NULL) { 91 printk(KERN_WARNING "%s couldn;t find par_io node\n", 92 __func__); 93 return; 94 } 95 /* Map Parallel I/O ports registers */ 96 ret = of_address_to_resource(np_par, 0, &res); 97 if (ret) { 98 printk(KERN_WARNING "%s couldn;t map par_io registers\n", 99 __func__); 100 return; 101 } 102 103 base = ioremap(res.start, res.end - res.start + 1); 104 105 /* 106 * set output delay adjustments to default values according 107 * table 5 in Errata Rev. 5, 9/2011: 108 * 109 * write 0b01 to UCC1 bits 18:19 110 * write 0b01 to UCC2 option 1 bits 4:5 111 * write 0b01 to UCC2 option 2 bits 16:17 112 */ 113 clrsetbits_be32((base + 0xa8), 0x0c00f000, 0x04005000); 114 115 /* 116 * set output delay adjustments to default values according 117 * table 3-13 in Reference Manual Rev.3 05/2010: 118 * 119 * write 0b01 to UCC2 option 2 bits 16:17 120 * write 0b0101 to UCC1 bits 20:23 121 * write 0b0101 to UCC2 option 1 bits 24:27 122 */ 123 clrsetbits_be32((base + 0xac), 0x0000cff0, 0x00004550); 124 125 if (SVR_REV(svid) == 0x0021) { 126 /* 127 * UCC2 option 1: write 0b1010 to bits 24:27 128 * at address IMMRBAR+0x14AC 129 */ 130 clrsetbits_be32((base + 0xac), 0x000000f0, 0x000000a0); 131 } else if (SVR_REV(svid) == 0x0020) { 132 /* 133 * UCC1: write 0b11 to bits 18:19 134 * at address IMMRBAR+0x14A8 135 */ 136 setbits32((base + 0xa8), 0x00003000); 137 138 /* 139 * UCC2 option 1: write 0b11 to bits 4:5 140 * at address IMMRBAR+0x14A8 141 */ 142 setbits32((base + 0xa8), 0x0c000000); 143 144 /* 145 * UCC2 option 2: write 0b11 to bits 16:17 146 * at address IMMRBAR+0x14AC 147 */ 148 setbits32((base + 0xac), 0x0000c000); 149 } 150 iounmap(base); 151 of_node_put(np_par); 152 of_node_put(np); 153 } 154 #endif /* CONFIG_QUICC_ENGINE */ 155 } 156 157 machine_device_initcall(mpc83xx_km, mpc83xx_declare_of_platform_devices); 158 159 /* list of the supported boards */ 160 static char *board[] __initdata = { 161 "Keymile,KMETER1", 162 "Keymile,kmpbec8321", 163 NULL 164 }; 165 166 /* 167 * Called very early, MMU is off, device-tree isn't unflattened 168 */ 169 static int __init mpc83xx_km_probe(void) 170 { 171 unsigned long node = of_get_flat_dt_root(); 172 int i = 0; 173 174 while (board[i]) { 175 if (of_flat_dt_is_compatible(node, board[i])) 176 break; 177 i++; 178 } 179 return (board[i] != NULL); 180 } 181 182 define_machine(mpc83xx_km) { 183 .name = "mpc83xx-km-platform", 184 .probe = mpc83xx_km_probe, 185 .setup_arch = mpc83xx_km_setup_arch, 186 .init_IRQ = mpc83xx_ipic_and_qe_init_IRQ, 187 .get_irq = ipic_get_irq, 188 .restart = mpc83xx_restart, 189 .time_init = mpc83xx_time_init, 190 .calibrate_decr = generic_calibrate_decr, 191 .progress = udbg_progress, 192 }; 193