xref: /openbmc/linux/arch/powerpc/platforms/82xx/pq2.c (revision 20e2fc42)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Common PowerQUICC II code.
4  *
5  * Author: Scott Wood <scottwood@freescale.com>
6  * Copyright (c) 2007 Freescale Semiconductor
7  *
8  * Based on code by Vitaly Bordug <vbordug@ru.mvista.com>
9  * pq2_restart fix by Wade Farnsworth <wfarnsworth@mvista.com>
10  * Copyright (c) 2006 MontaVista Software, Inc.
11  */
12 
13 #include <asm/cpm2.h>
14 #include <asm/io.h>
15 #include <asm/pci-bridge.h>
16 
17 #include <platforms/82xx/pq2.h>
18 
19 #define RMR_CSRE 0x00000001
20 
21 void __noreturn pq2_restart(char *cmd)
22 {
23 	local_irq_disable();
24 	setbits32(&cpm2_immr->im_clkrst.car_rmr, RMR_CSRE);
25 
26 	/* Clear the ME,EE,IR & DR bits in MSR to cause checkstop */
27 	mtmsr(mfmsr() & ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR));
28 	in_8(&cpm2_immr->im_clkrst.res[0]);
29 
30 	panic("Restart failed\n");
31 }
32 
33 #ifdef CONFIG_PCI
34 static int pq2_pci_exclude_device(struct pci_controller *hose,
35                                   u_char bus, u8 devfn)
36 {
37 	if (bus == 0 && PCI_SLOT(devfn) == 0)
38 		return PCIBIOS_DEVICE_NOT_FOUND;
39 	else
40 		return PCIBIOS_SUCCESSFUL;
41 }
42 
43 static void __init pq2_pci_add_bridge(struct device_node *np)
44 {
45 	struct pci_controller *hose;
46 	struct resource r;
47 
48 	if (of_address_to_resource(np, 0, &r) || r.end - r.start < 0x10b)
49 		goto err;
50 
51 	pci_add_flags(PCI_REASSIGN_ALL_BUS);
52 
53 	hose = pcibios_alloc_controller(np);
54 	if (!hose)
55 		return;
56 
57 	hose->dn = np;
58 
59 	setup_indirect_pci(hose, r.start + 0x100, r.start + 0x104, 0);
60 	pci_process_bridge_OF_ranges(hose, np, 1);
61 
62 	return;
63 
64 err:
65 	printk(KERN_ERR "No valid PCI reg property in device tree\n");
66 }
67 
68 void __init pq2_init_pci(void)
69 {
70 	struct device_node *np;
71 
72 	ppc_md.pci_exclude_device = pq2_pci_exclude_device;
73 
74 	for_each_compatible_node(np, NULL, "fsl,pq2-pci")
75 		pq2_pci_add_bridge(np);
76 }
77 #endif
78