12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 2e00c5498SScott Wood /* 3e00c5498SScott Wood * Common PowerQUICC II code. 4e00c5498SScott Wood * 5e00c5498SScott Wood * Author: Scott Wood <scottwood@freescale.com> 6e00c5498SScott Wood * Copyright (c) 2007 Freescale Semiconductor 7e00c5498SScott Wood * 8e00c5498SScott Wood * Based on code by Vitaly Bordug <vbordug@ru.mvista.com> 9e00c5498SScott Wood * pq2_restart fix by Wade Farnsworth <wfarnsworth@mvista.com> 10e00c5498SScott Wood * Copyright (c) 2006 MontaVista Software, Inc. 11e00c5498SScott Wood */ 12e00c5498SScott Wood 131740f15aSChristophe Leroy #include <linux/kprobes.h> 141740f15aSChristophe Leroy 15e00c5498SScott Wood #include <asm/cpm2.h> 16e00c5498SScott Wood #include <asm/io.h> 17e00c5498SScott Wood #include <asm/pci-bridge.h> 18e00c5498SScott Wood 19e00c5498SScott Wood #include <platforms/82xx/pq2.h> 20e00c5498SScott Wood 21e00c5498SScott Wood #define RMR_CSRE 0x00000001 22e00c5498SScott Wood 2395ec77c0SDaniel Axtens void __noreturn pq2_restart(char *cmd) 24e00c5498SScott Wood { 25e00c5498SScott Wood local_irq_disable(); 26e00c5498SScott Wood setbits32(&cpm2_immr->im_clkrst.car_rmr, RMR_CSRE); 27e00c5498SScott Wood 28e00c5498SScott Wood /* Clear the ME,EE,IR & DR bits in MSR to cause checkstop */ 29e00c5498SScott Wood mtmsr(mfmsr() & ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR)); 30e00c5498SScott Wood in_8(&cpm2_immr->im_clkrst.res[0]); 31e00c5498SScott Wood 32e00c5498SScott Wood panic("Restart failed\n"); 33e00c5498SScott Wood } 341740f15aSChristophe Leroy NOKPROBE_SYMBOL(pq2_restart) 35e00c5498SScott Wood 36e00c5498SScott Wood #ifdef CONFIG_PCI 37e00c5498SScott Wood static int pq2_pci_exclude_device(struct pci_controller *hose, 38e00c5498SScott Wood u_char bus, u8 devfn) 39e00c5498SScott Wood { 40e00c5498SScott Wood if (bus == 0 && PCI_SLOT(devfn) == 0) 41e00c5498SScott Wood return PCIBIOS_DEVICE_NOT_FOUND; 42e00c5498SScott Wood else 43e00c5498SScott Wood return PCIBIOS_SUCCESSFUL; 44e00c5498SScott Wood } 45e00c5498SScott Wood 46e00c5498SScott Wood static void __init pq2_pci_add_bridge(struct device_node *np) 47e00c5498SScott Wood { 48e00c5498SScott Wood struct pci_controller *hose; 49e00c5498SScott Wood struct resource r; 50e00c5498SScott Wood 51e00c5498SScott Wood if (of_address_to_resource(np, 0, &r) || r.end - r.start < 0x10b) 52e00c5498SScott Wood goto err; 53e00c5498SScott Wood 540e47ff1cSRob Herring pci_add_flags(PCI_REASSIGN_ALL_BUS); 55e00c5498SScott Wood 56e00c5498SScott Wood hose = pcibios_alloc_controller(np); 57e00c5498SScott Wood if (!hose) 58e00c5498SScott Wood return; 59e00c5498SScott Wood 6044ef3390SStephen Rothwell hose->dn = np; 61e00c5498SScott Wood 62e00c5498SScott Wood setup_indirect_pci(hose, r.start + 0x100, r.start + 0x104, 0); 63e00c5498SScott Wood pci_process_bridge_OF_ranges(hose, np, 1); 64e00c5498SScott Wood 65e00c5498SScott Wood return; 66e00c5498SScott Wood 67e00c5498SScott Wood err: 68e00c5498SScott Wood printk(KERN_ERR "No valid PCI reg property in device tree\n"); 69e00c5498SScott Wood } 70e00c5498SScott Wood 71e00c5498SScott Wood void __init pq2_init_pci(void) 72e00c5498SScott Wood { 73e49f1e20SWei Yongjun struct device_node *np; 74e00c5498SScott Wood 75e00c5498SScott Wood ppc_md.pci_exclude_device = pq2_pci_exclude_device; 76e00c5498SScott Wood 77e49f1e20SWei Yongjun for_each_compatible_node(np, NULL, "fsl,pq2-pci") 78e00c5498SScott Wood pq2_pci_add_bridge(np); 79e00c5498SScott Wood } 80e00c5498SScott Wood #endif 81