1 /*
2  * Keymile km82xx support
3  * Copyright 2008-2011 DENX Software Engineering GmbH
4  * Author: Heiko Schocher <hs@denx.de>
5  *
6  * based on code from:
7  * Copyright 2007 Freescale Semiconductor, Inc.
8  * Author: Scott Wood <scottwood@freescale.com>
9  *
10  * This program is free software; you can redistribute  it and/or modify it
11  * under  the terms of  the GNU General  Public License as published by the
12  * Free Software Foundation;  either version 2 of the  License, or (at your
13  * option) any later version.
14  */
15 
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <linux/fsl_devices.h>
19 #include <linux/of_platform.h>
20 
21 #include <linux/io.h>
22 #include <asm/cpm2.h>
23 #include <asm/udbg.h>
24 #include <asm/machdep.h>
25 #include <linux/time.h>
26 #include <asm/mpc8260.h>
27 #include <asm/prom.h>
28 
29 #include <sysdev/fsl_soc.h>
30 #include <sysdev/cpm2_pic.h>
31 
32 #include "pq2.h"
33 
34 static void __init km82xx_pic_init(void)
35 {
36 	struct device_node *np = of_find_compatible_node(NULL, NULL,
37 							"fsl,pq2-pic");
38 	if (!np) {
39 		pr_err("PIC init: can not find cpm-pic node\n");
40 		return;
41 	}
42 
43 	cpm2_pic_init(np);
44 	of_node_put(np);
45 }
46 
47 struct cpm_pin {
48 	int port, pin, flags;
49 };
50 
51 static __initdata struct cpm_pin km82xx_pins[] = {
52 	/* SMC1 */
53 	{2, 4, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
54 	{2, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
55 
56 	/* SMC2 */
57 	{0, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
58 	{0, 9, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
59 
60 	/* SCC1 */
61 	{2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
62 	{2, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
63 	{3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
64 	{3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
65 
66 	/* SCC4 */
67 	{2, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
68 	{2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
69 	{2,  9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
70 	{2,  8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
71 	{3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
72 	{3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
73 
74 	/* FCC1 */
75 	{0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
76 	{0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
77 	{0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
78 	{0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
79 	{0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
80 	{0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
81 	{0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
82 	{0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
83 	{0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
84 	{0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
85 	{0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
86 	{0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
87 	{0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
88 	{0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
89 
90 	{2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
91 	{2, 23, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
92 
93 	/* FCC2 */
94 	{1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
95 	{1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
96 	{1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
97 	{1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
98 	{1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
99 	{1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
100 	{1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
101 	{1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
102 	{1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
103 	{1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
104 	{1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
105 	{1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
106 	{1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
107 	{1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
108 
109 	{2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
110 	{2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
111 
112 	/* MDC */
113 	{0, 13, CPM_PIN_OUTPUT | CPM_PIN_GPIO},
114 
115 #if defined(CONFIG_I2C_CPM)
116 	/* I2C */
117 	{3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
118 	{3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
119 #endif
120 
121 	/* USB */
122 	{0, 10, CPM_PIN_OUTPUT | CPM_PIN_GPIO},    /* FULL_SPEED */
123 	{0, 11, CPM_PIN_OUTPUT | CPM_PIN_GPIO},    /*/SLAVE */
124 	{2, 10, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXN */
125 	{2, 11, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXP */
126 	{2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* /OE */
127 	{2, 27, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXCLK */
128 	{3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXP */
129 	{3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXN */
130 	{3, 25, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXD */
131 
132 	/* SPI */
133 	{3, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_MISO PD16 */
134 	{3, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_MOSI PD17 */
135 	{3, 18, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_CLK PD18 */
136 };
137 
138 static void __init init_ioports(void)
139 {
140 	int i;
141 
142 	for (i = 0; i < ARRAY_SIZE(km82xx_pins); i++) {
143 		const struct cpm_pin *pin = &km82xx_pins[i];
144 		cpm2_set_pin(pin->port, pin->pin, pin->flags);
145 	}
146 
147 	cpm2_smc_clk_setup(CPM_CLK_SMC2, CPM_BRG8);
148 	cpm2_smc_clk_setup(CPM_CLK_SMC1, CPM_BRG7);
149 	cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_RX);
150 	cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_TX);
151 	cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK5, CPM_CLK_RTX);
152 	cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK7, CPM_CLK_RX);
153 	cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK8, CPM_CLK_TX);
154 	cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_RX);
155 	cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK9,  CPM_CLK_TX);
156 	cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
157 	cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
158 
159 	/* Force USB FULL SPEED bit to '1' */
160 	setbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 10));
161 	/* clear USB_SLAVE */
162 	clrbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 11));
163 }
164 
165 static void __init km82xx_setup_arch(void)
166 {
167 	if (ppc_md.progress)
168 		ppc_md.progress("km82xx_setup_arch()", 0);
169 
170 	cpm2_reset();
171 
172 	/* When this is set, snooping CPM DMA from RAM causes
173 	 * machine checks.  See erratum SIU18.
174 	 */
175 	clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP);
176 
177 	init_ioports();
178 
179 	if (ppc_md.progress)
180 		ppc_md.progress("km82xx_setup_arch(), finish", 0);
181 }
182 
183 static const struct of_device_id of_bus_ids[] __initconst = {
184 	{ .compatible = "simple-bus", },
185 	{},
186 };
187 
188 static int __init declare_of_platform_devices(void)
189 {
190 	of_platform_bus_probe(NULL, of_bus_ids, NULL);
191 
192 	return 0;
193 }
194 machine_device_initcall(km82xx, declare_of_platform_devices);
195 
196 /*
197  * Called very early, device-tree isn't unflattened
198  */
199 static int __init km82xx_probe(void)
200 {
201 	unsigned long root = of_get_flat_dt_root();
202 	return of_flat_dt_is_compatible(root, "keymile,km82xx");
203 }
204 
205 define_machine(km82xx)
206 {
207 	.name = "Keymile km82xx",
208 	.probe = km82xx_probe,
209 	.setup_arch = km82xx_setup_arch,
210 	.init_IRQ = km82xx_pic_init,
211 	.get_irq = cpm2_get_irq,
212 	.calibrate_decr = generic_calibrate_decr,
213 	.restart = pq2_restart,
214 	.progress = udbg_progress,
215 };
216