1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Keymile km82xx support
4  * Copyright 2008-2011 DENX Software Engineering GmbH
5  * Author: Heiko Schocher <hs@denx.de>
6  *
7  * based on code from:
8  * Copyright 2007 Freescale Semiconductor, Inc.
9  * Author: Scott Wood <scottwood@freescale.com>
10  */
11 
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/fsl_devices.h>
15 #include <linux/of_platform.h>
16 
17 #include <linux/io.h>
18 #include <asm/cpm2.h>
19 #include <asm/udbg.h>
20 #include <asm/machdep.h>
21 #include <linux/time.h>
22 #include <asm/mpc8260.h>
23 
24 #include <sysdev/fsl_soc.h>
25 #include <sysdev/cpm2_pic.h>
26 
27 #include "pq2.h"
28 
29 static void __init km82xx_pic_init(void)
30 {
31 	struct device_node *np = of_find_compatible_node(NULL, NULL,
32 							"fsl,pq2-pic");
33 	if (!np) {
34 		pr_err("PIC init: can not find cpm-pic node\n");
35 		return;
36 	}
37 
38 	cpm2_pic_init(np);
39 	of_node_put(np);
40 }
41 
42 struct cpm_pin {
43 	int port, pin, flags;
44 };
45 
46 static __initdata struct cpm_pin km82xx_pins[] = {
47 	/* SMC1 */
48 	{2, 4, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
49 	{2, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
50 
51 	/* SMC2 */
52 	{0, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
53 	{0, 9, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
54 
55 	/* SCC1 */
56 	{2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
57 	{2, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
58 	{3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
59 	{3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
60 
61 	/* SCC4 */
62 	{2, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
63 	{2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
64 	{2,  9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
65 	{2,  8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
66 	{3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
67 	{3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
68 
69 	/* FCC1 */
70 	{0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
71 	{0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
72 	{0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
73 	{0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
74 	{0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
75 	{0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
76 	{0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
77 	{0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
78 	{0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
79 	{0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
80 	{0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
81 	{0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
82 	{0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
83 	{0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
84 
85 	{2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
86 	{2, 23, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
87 
88 	/* FCC2 */
89 	{1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
90 	{1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
91 	{1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
92 	{1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
93 	{1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
94 	{1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
95 	{1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
96 	{1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
97 	{1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
98 	{1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
99 	{1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
100 	{1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
101 	{1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
102 	{1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
103 
104 	{2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
105 	{2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
106 
107 	/* MDC */
108 	{0, 13, CPM_PIN_OUTPUT | CPM_PIN_GPIO},
109 
110 #if defined(CONFIG_I2C_CPM)
111 	/* I2C */
112 	{3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
113 	{3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
114 #endif
115 
116 	/* USB */
117 	{0, 10, CPM_PIN_OUTPUT | CPM_PIN_GPIO},    /* FULL_SPEED */
118 	{0, 11, CPM_PIN_OUTPUT | CPM_PIN_GPIO},    /*/SLAVE */
119 	{2, 10, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXN */
120 	{2, 11, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXP */
121 	{2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* /OE */
122 	{2, 27, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXCLK */
123 	{3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXP */
124 	{3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXN */
125 	{3, 25, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXD */
126 
127 	/* SPI */
128 	{3, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_MISO PD16 */
129 	{3, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_MOSI PD17 */
130 	{3, 18, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_CLK PD18 */
131 };
132 
133 static void __init init_ioports(void)
134 {
135 	int i;
136 
137 	for (i = 0; i < ARRAY_SIZE(km82xx_pins); i++) {
138 		const struct cpm_pin *pin = &km82xx_pins[i];
139 		cpm2_set_pin(pin->port, pin->pin, pin->flags);
140 	}
141 
142 	cpm2_smc_clk_setup(CPM_CLK_SMC2, CPM_BRG8);
143 	cpm2_smc_clk_setup(CPM_CLK_SMC1, CPM_BRG7);
144 	cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_RX);
145 	cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_TX);
146 	cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK5, CPM_CLK_RTX);
147 	cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK7, CPM_CLK_RX);
148 	cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK8, CPM_CLK_TX);
149 	cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_RX);
150 	cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK9,  CPM_CLK_TX);
151 	cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
152 	cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
153 
154 	/* Force USB FULL SPEED bit to '1' */
155 	setbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 10));
156 	/* clear USB_SLAVE */
157 	clrbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 11));
158 }
159 
160 static void __init km82xx_setup_arch(void)
161 {
162 	if (ppc_md.progress)
163 		ppc_md.progress("km82xx_setup_arch()", 0);
164 
165 	cpm2_reset();
166 
167 	/* When this is set, snooping CPM DMA from RAM causes
168 	 * machine checks.  See erratum SIU18.
169 	 */
170 	clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP);
171 
172 	init_ioports();
173 
174 	if (ppc_md.progress)
175 		ppc_md.progress("km82xx_setup_arch(), finish", 0);
176 }
177 
178 static const struct of_device_id of_bus_ids[] __initconst = {
179 	{ .compatible = "simple-bus", },
180 	{},
181 };
182 
183 static int __init declare_of_platform_devices(void)
184 {
185 	of_platform_bus_probe(NULL, of_bus_ids, NULL);
186 
187 	return 0;
188 }
189 machine_device_initcall(km82xx, declare_of_platform_devices);
190 
191 define_machine(km82xx)
192 {
193 	.name = "Keymile km82xx",
194 	.compatible = "keymile,km82xx",
195 	.setup_arch = km82xx_setup_arch,
196 	.init_IRQ = km82xx_pic_init,
197 	.get_irq = cpm2_get_irq,
198 	.restart = pq2_restart,
199 	.progress = udbg_progress,
200 };
201