1 /* 2 * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved. 3 * 4 * Author: John Rigby <jrigby@freescale.com> 5 * 6 * Description: 7 * MPC512x Shared code 8 * 9 * This is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 */ 14 15 #include <linux/kernel.h> 16 #include <linux/io.h> 17 #include <linux/irq.h> 18 #include <linux/of_platform.h> 19 #include <linux/fsl-diu-fb.h> 20 #include <linux/bootmem.h> 21 #include <sysdev/fsl_soc.h> 22 23 #include <asm/cacheflush.h> 24 #include <asm/machdep.h> 25 #include <asm/ipic.h> 26 #include <asm/prom.h> 27 #include <asm/time.h> 28 #include <asm/mpc5121.h> 29 #include <asm/mpc52xx_psc.h> 30 31 #include "mpc512x.h" 32 33 static struct mpc512x_reset_module __iomem *reset_module_base; 34 35 static void __init mpc512x_restart_init(void) 36 { 37 struct device_node *np; 38 39 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-reset"); 40 if (!np) 41 return; 42 43 reset_module_base = of_iomap(np, 0); 44 of_node_put(np); 45 } 46 47 void mpc512x_restart(char *cmd) 48 { 49 if (reset_module_base) { 50 /* Enable software reset "RSTE" */ 51 out_be32(&reset_module_base->rpr, 0x52535445); 52 /* Set software hard reset */ 53 out_be32(&reset_module_base->rcr, 0x2); 54 } else { 55 pr_err("Restart module not mapped.\n"); 56 } 57 for (;;) 58 ; 59 } 60 61 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) 62 63 struct fsl_diu_shared_fb { 64 u8 gamma[0x300]; /* 32-bit aligned! */ 65 struct diu_ad ad0; /* 32-bit aligned! */ 66 phys_addr_t fb_phys; 67 size_t fb_len; 68 bool in_use; 69 }; 70 71 #define DIU_DIV_MASK 0x000000ff 72 void mpc512x_set_pixel_clock(unsigned int pixclock) 73 { 74 unsigned long bestval, bestfreq, speed, busfreq; 75 unsigned long minpixclock, maxpixclock, pixval; 76 struct mpc512x_ccm __iomem *ccm; 77 struct device_node *np; 78 u32 temp; 79 long err; 80 int i; 81 82 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-clock"); 83 if (!np) { 84 pr_err("Can't find clock control module.\n"); 85 return; 86 } 87 88 ccm = of_iomap(np, 0); 89 of_node_put(np); 90 if (!ccm) { 91 pr_err("Can't map clock control module reg.\n"); 92 return; 93 } 94 95 np = of_find_node_by_type(NULL, "cpu"); 96 if (np) { 97 const unsigned int *prop = 98 of_get_property(np, "bus-frequency", NULL); 99 100 of_node_put(np); 101 if (prop) { 102 busfreq = *prop; 103 } else { 104 pr_err("Can't get bus-frequency property\n"); 105 return; 106 } 107 } else { 108 pr_err("Can't find 'cpu' node.\n"); 109 return; 110 } 111 112 /* Pixel Clock configuration */ 113 pr_debug("DIU: Bus Frequency = %lu\n", busfreq); 114 speed = busfreq * 4; /* DIU_DIV ratio is 4 * CSB_CLK / DIU_CLK */ 115 116 /* Calculate the pixel clock with the smallest error */ 117 /* calculate the following in steps to avoid overflow */ 118 pr_debug("DIU pixclock in ps - %d\n", pixclock); 119 temp = (1000000000 / pixclock) * 1000; 120 pixclock = temp; 121 pr_debug("DIU pixclock freq - %u\n", pixclock); 122 123 temp = temp / 20; /* pixclock * 0.05 */ 124 pr_debug("deviation = %d\n", temp); 125 minpixclock = pixclock - temp; 126 maxpixclock = pixclock + temp; 127 pr_debug("DIU minpixclock - %lu\n", minpixclock); 128 pr_debug("DIU maxpixclock - %lu\n", maxpixclock); 129 pixval = speed/pixclock; 130 pr_debug("DIU pixval = %lu\n", pixval); 131 132 err = LONG_MAX; 133 bestval = pixval; 134 pr_debug("DIU bestval = %lu\n", bestval); 135 136 bestfreq = 0; 137 for (i = -1; i <= 1; i++) { 138 temp = speed / (pixval+i); 139 pr_debug("DIU test pixval i=%d, pixval=%lu, temp freq. = %u\n", 140 i, pixval, temp); 141 if ((temp < minpixclock) || (temp > maxpixclock)) 142 pr_debug("DIU exceeds monitor range (%lu to %lu)\n", 143 minpixclock, maxpixclock); 144 else if (abs(temp - pixclock) < err) { 145 pr_debug("Entered the else if block %d\n", i); 146 err = abs(temp - pixclock); 147 bestval = pixval + i; 148 bestfreq = temp; 149 } 150 } 151 152 pr_debug("DIU chose = %lx\n", bestval); 153 pr_debug("DIU error = %ld\n NomPixClk ", err); 154 pr_debug("DIU: Best Freq = %lx\n", bestfreq); 155 /* Modify DIU_DIV in CCM SCFR1 */ 156 temp = in_be32(&ccm->scfr1); 157 pr_debug("DIU: Current value of SCFR1: 0x%08x\n", temp); 158 temp &= ~DIU_DIV_MASK; 159 temp |= (bestval & DIU_DIV_MASK); 160 out_be32(&ccm->scfr1, temp); 161 pr_debug("DIU: Modified value of SCFR1: 0x%08x\n", temp); 162 iounmap(ccm); 163 } 164 165 enum fsl_diu_monitor_port 166 mpc512x_valid_monitor_port(enum fsl_diu_monitor_port port) 167 { 168 return FSL_DIU_PORT_DVI; 169 } 170 171 static struct fsl_diu_shared_fb __attribute__ ((__aligned__(8))) diu_shared_fb; 172 173 static inline void mpc512x_free_bootmem(struct page *page) 174 { 175 __ClearPageReserved(page); 176 BUG_ON(PageTail(page)); 177 BUG_ON(atomic_read(&page->_count) > 1); 178 atomic_set(&page->_count, 1); 179 __free_page(page); 180 totalram_pages++; 181 } 182 183 void mpc512x_release_bootmem(void) 184 { 185 unsigned long addr = diu_shared_fb.fb_phys & PAGE_MASK; 186 unsigned long size = diu_shared_fb.fb_len; 187 unsigned long start, end; 188 189 if (diu_shared_fb.in_use) { 190 start = PFN_UP(addr); 191 end = PFN_DOWN(addr + size); 192 193 for (; start < end; start++) 194 mpc512x_free_bootmem(pfn_to_page(start)); 195 196 diu_shared_fb.in_use = false; 197 } 198 diu_ops.release_bootmem = NULL; 199 } 200 201 /* 202 * Check if DIU was pre-initialized. If so, perform steps 203 * needed to continue displaying through the whole boot process. 204 * Move area descriptor and gamma table elsewhere, they are 205 * destroyed by bootmem allocator otherwise. The frame buffer 206 * address range will be reserved in setup_arch() after bootmem 207 * allocator is up. 208 */ 209 void __init mpc512x_init_diu(void) 210 { 211 struct device_node *np; 212 struct diu __iomem *diu_reg; 213 phys_addr_t desc; 214 void __iomem *vaddr; 215 unsigned long mode, pix_fmt, res, bpp; 216 unsigned long dst; 217 218 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-diu"); 219 if (!np) { 220 pr_err("No DIU node\n"); 221 return; 222 } 223 224 diu_reg = of_iomap(np, 0); 225 of_node_put(np); 226 if (!diu_reg) { 227 pr_err("Can't map DIU\n"); 228 return; 229 } 230 231 mode = in_be32(&diu_reg->diu_mode); 232 if (mode == MFB_MODE0) { 233 pr_info("%s: DIU OFF\n", __func__); 234 goto out; 235 } 236 237 desc = in_be32(&diu_reg->desc[0]); 238 vaddr = ioremap(desc, sizeof(struct diu_ad)); 239 if (!vaddr) { 240 pr_err("Can't map DIU area desc.\n"); 241 goto out; 242 } 243 memcpy(&diu_shared_fb.ad0, vaddr, sizeof(struct diu_ad)); 244 /* flush fb area descriptor */ 245 dst = (unsigned long)&diu_shared_fb.ad0; 246 flush_dcache_range(dst, dst + sizeof(struct diu_ad) - 1); 247 248 res = in_be32(&diu_reg->disp_size); 249 pix_fmt = in_le32(vaddr); 250 bpp = ((pix_fmt >> 16) & 0x3) + 1; 251 diu_shared_fb.fb_phys = in_le32(vaddr + 4); 252 diu_shared_fb.fb_len = ((res & 0xfff0000) >> 16) * (res & 0xfff) * bpp; 253 diu_shared_fb.in_use = true; 254 iounmap(vaddr); 255 256 desc = in_be32(&diu_reg->gamma); 257 vaddr = ioremap(desc, sizeof(diu_shared_fb.gamma)); 258 if (!vaddr) { 259 pr_err("Can't map DIU area desc.\n"); 260 diu_shared_fb.in_use = false; 261 goto out; 262 } 263 memcpy(&diu_shared_fb.gamma, vaddr, sizeof(diu_shared_fb.gamma)); 264 /* flush gamma table */ 265 dst = (unsigned long)&diu_shared_fb.gamma; 266 flush_dcache_range(dst, dst + sizeof(diu_shared_fb.gamma) - 1); 267 268 iounmap(vaddr); 269 out_be32(&diu_reg->gamma, virt_to_phys(&diu_shared_fb.gamma)); 270 out_be32(&diu_reg->desc[1], 0); 271 out_be32(&diu_reg->desc[2], 0); 272 out_be32(&diu_reg->desc[0], virt_to_phys(&diu_shared_fb.ad0)); 273 274 out: 275 iounmap(diu_reg); 276 } 277 278 void __init mpc512x_setup_diu(void) 279 { 280 int ret; 281 282 /* 283 * We do not allocate and configure new area for bitmap buffer 284 * because it would requere copying bitmap data (splash image) 285 * and so negatively affect boot time. Instead we reserve the 286 * already configured frame buffer area so that it won't be 287 * destroyed. The starting address of the area to reserve and 288 * also it's length is passed to reserve_bootmem(). It will be 289 * freed later on first open of fbdev, when splash image is not 290 * needed any more. 291 */ 292 if (diu_shared_fb.in_use) { 293 ret = reserve_bootmem(diu_shared_fb.fb_phys, 294 diu_shared_fb.fb_len, 295 BOOTMEM_EXCLUSIVE); 296 if (ret) { 297 pr_err("%s: reserve bootmem failed\n", __func__); 298 diu_shared_fb.in_use = false; 299 } 300 } 301 302 diu_ops.set_pixel_clock = mpc512x_set_pixel_clock; 303 diu_ops.valid_monitor_port = mpc512x_valid_monitor_port; 304 diu_ops.release_bootmem = mpc512x_release_bootmem; 305 } 306 307 #endif 308 309 void __init mpc512x_init_IRQ(void) 310 { 311 struct device_node *np; 312 313 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-ipic"); 314 if (!np) 315 return; 316 317 ipic_init(np, 0); 318 of_node_put(np); 319 320 /* 321 * Initialize the default interrupt mapping priorities, 322 * in case the boot rom changed something on us. 323 */ 324 ipic_set_default_priority(); 325 } 326 327 /* 328 * Nodes to do bus probe on, soc and localbus 329 */ 330 static struct of_device_id __initdata of_bus_ids[] = { 331 { .compatible = "fsl,mpc5121-immr", }, 332 { .compatible = "fsl,mpc5121-localbus", }, 333 {}, 334 }; 335 336 void __init mpc512x_declare_of_platform_devices(void) 337 { 338 struct device_node *np; 339 340 if (of_platform_bus_probe(NULL, of_bus_ids, NULL)) 341 printk(KERN_ERR __FILE__ ": " 342 "Error while probing of_platform bus\n"); 343 344 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-nfc"); 345 if (np) { 346 of_platform_device_create(np, NULL, NULL); 347 of_node_put(np); 348 } 349 } 350 351 #define DEFAULT_FIFO_SIZE 16 352 353 static unsigned int __init get_fifo_size(struct device_node *np, 354 char *prop_name) 355 { 356 const unsigned int *fp; 357 358 fp = of_get_property(np, prop_name, NULL); 359 if (fp) 360 return *fp; 361 362 pr_warning("no %s property in %s node, defaulting to %d\n", 363 prop_name, np->full_name, DEFAULT_FIFO_SIZE); 364 365 return DEFAULT_FIFO_SIZE; 366 } 367 368 #define FIFOC(_base) ((struct mpc512x_psc_fifo __iomem *) \ 369 ((u32)(_base) + sizeof(struct mpc52xx_psc))) 370 371 /* Init PSC FIFO space for TX and RX slices */ 372 void __init mpc512x_psc_fifo_init(void) 373 { 374 struct device_node *np; 375 void __iomem *psc; 376 unsigned int tx_fifo_size; 377 unsigned int rx_fifo_size; 378 int fifobase = 0; /* current fifo address in 32 bit words */ 379 380 for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") { 381 tx_fifo_size = get_fifo_size(np, "fsl,tx-fifo-size"); 382 rx_fifo_size = get_fifo_size(np, "fsl,rx-fifo-size"); 383 384 /* size in register is in 4 byte units */ 385 tx_fifo_size /= 4; 386 rx_fifo_size /= 4; 387 if (!tx_fifo_size) 388 tx_fifo_size = 1; 389 if (!rx_fifo_size) 390 rx_fifo_size = 1; 391 392 psc = of_iomap(np, 0); 393 if (!psc) { 394 pr_err("%s: Can't map %s device\n", 395 __func__, np->full_name); 396 continue; 397 } 398 399 /* FIFO space is 4KiB, check if requested size is available */ 400 if ((fifobase + tx_fifo_size + rx_fifo_size) > 0x1000) { 401 pr_err("%s: no fifo space available for %s\n", 402 __func__, np->full_name); 403 iounmap(psc); 404 /* 405 * chances are that another device requests less 406 * fifo space, so we continue. 407 */ 408 continue; 409 } 410 411 /* set tx and rx fifo size registers */ 412 out_be32(&FIFOC(psc)->txsz, (fifobase << 16) | tx_fifo_size); 413 fifobase += tx_fifo_size; 414 out_be32(&FIFOC(psc)->rxsz, (fifobase << 16) | rx_fifo_size); 415 fifobase += rx_fifo_size; 416 417 /* reset and enable the slices */ 418 out_be32(&FIFOC(psc)->txcmd, 0x80); 419 out_be32(&FIFOC(psc)->txcmd, 0x01); 420 out_be32(&FIFOC(psc)->rxcmd, 0x80); 421 out_be32(&FIFOC(psc)->rxcmd, 0x01); 422 423 iounmap(psc); 424 } 425 } 426 427 void __init mpc512x_init(void) 428 { 429 mpc5121_clk_init(); 430 mpc512x_declare_of_platform_devices(); 431 mpc512x_restart_init(); 432 mpc512x_psc_fifo_init(); 433 } 434 435 /** 436 * mpc512x_cs_config - Setup chip select configuration 437 * @cs: chip select number 438 * @val: chip select configuration value 439 * 440 * Perform chip select configuration for devices on LocalPlus Bus. 441 * Intended to dynamically reconfigure the chip select parameters 442 * for configurable devices on the bus. 443 */ 444 int mpc512x_cs_config(unsigned int cs, u32 val) 445 { 446 static struct mpc512x_lpc __iomem *lpc; 447 struct device_node *np; 448 449 if (cs > 7) 450 return -EINVAL; 451 452 if (!lpc) { 453 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-lpc"); 454 lpc = of_iomap(np, 0); 455 of_node_put(np); 456 if (!lpc) 457 return -ENOMEM; 458 } 459 460 out_be32(&lpc->cs_cfg[cs], val); 461 return 0; 462 } 463 EXPORT_SYMBOL(mpc512x_cs_config); 464