1 /* 2 * PowerPC 476FPE board specific routines 3 * 4 * Copyright © 2013 Tony Breeds IBM Corporation 5 * Copyright © 2013 Alistair Popple IBM Corporation 6 * 7 * Based on earlier code: 8 * Matt Porter <mporter@kernel.crashing.org> 9 * Copyright 2002-2005 MontaVista Software Inc. 10 * 11 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> 12 * Copyright (c) 2003-2005 Zultys Technologies 13 * 14 * Rewritten and ported to the merged powerpc tree: 15 * Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation. 16 * Copyright © 2011 David Kliekamp IBM Corporation 17 * 18 * This program is free software; you can redistribute it and/or modify it 19 * under the terms of the GNU General Public License as published by the 20 * Free Software Foundation; either version 2 of the License, or (at your 21 * option) any later version. 22 */ 23 24 #include <linux/init.h> 25 #include <linux/of.h> 26 #include <linux/of_platform.h> 27 #include <linux/rtc.h> 28 29 #include <asm/machdep.h> 30 #include <asm/prom.h> 31 #include <asm/udbg.h> 32 #include <asm/time.h> 33 #include <asm/uic.h> 34 #include <asm/ppc4xx.h> 35 #include <asm/mpic.h> 36 #include <asm/mmu.h> 37 38 #include <linux/pci.h> 39 #include <linux/i2c.h> 40 41 static const struct of_device_id ppc47x_of_bus[] __initconst = { 42 { .compatible = "ibm,plb4", }, 43 { .compatible = "ibm,plb6", }, 44 { .compatible = "ibm,opb", }, 45 { .compatible = "ibm,ebc", }, 46 {}, 47 }; 48 49 /* The EEPROM is missing and the default values are bogus. This forces USB in 50 * to EHCI mode */ 51 static void quirk_ppc_currituck_usb_fixup(struct pci_dev *dev) 52 { 53 if (of_machine_is_compatible("ibm,currituck")) { 54 pci_write_config_dword(dev, 0xe0, 0x0114231f); 55 pci_write_config_dword(dev, 0xe4, 0x00006c40); 56 } 57 } 58 DECLARE_PCI_FIXUP_HEADER(0x1033, 0x0035, quirk_ppc_currituck_usb_fixup); 59 60 /* Akebono has an AVR microcontroller attached to the I2C bus 61 * which is used to power off/reset the system. */ 62 63 /* AVR I2C Commands */ 64 #define AVR_PWRCTL_CMD (0x26) 65 66 /* Flags for the power control I2C commands */ 67 #define AVR_PWRCTL_PWROFF (0x01) 68 #define AVR_PWRCTL_RESET (0x02) 69 70 static struct i2c_client *avr_i2c_client; 71 static void __noreturn avr_halt_system(int pwrctl_flags) 72 { 73 /* Request the AVR to reset the system */ 74 i2c_smbus_write_byte_data(avr_i2c_client, 75 AVR_PWRCTL_CMD, pwrctl_flags); 76 77 /* Wait for system to be reset */ 78 while (1) 79 ; 80 } 81 82 static void avr_power_off_system(void) 83 { 84 avr_halt_system(AVR_PWRCTL_PWROFF); 85 } 86 87 static void __noreturn avr_reset_system(char *cmd) 88 { 89 avr_halt_system(AVR_PWRCTL_RESET); 90 } 91 92 static int avr_probe(struct i2c_client *client, 93 const struct i2c_device_id *id) 94 { 95 avr_i2c_client = client; 96 ppc_md.restart = avr_reset_system; 97 pm_power_off = avr_power_off_system; 98 return 0; 99 } 100 101 static const struct i2c_device_id avr_id[] = { 102 { "akebono-avr", 0 }, 103 { } 104 }; 105 106 static struct i2c_driver avr_driver = { 107 .driver = { 108 .name = "akebono-avr", 109 }, 110 .probe = avr_probe, 111 .id_table = avr_id, 112 }; 113 114 static int __init ppc47x_device_probe(void) 115 { 116 i2c_add_driver(&avr_driver); 117 of_platform_bus_probe(NULL, ppc47x_of_bus, NULL); 118 119 return 0; 120 } 121 machine_device_initcall(ppc47x, ppc47x_device_probe); 122 123 static void __init ppc47x_init_irq(void) 124 { 125 struct device_node *np; 126 127 /* Find top level interrupt controller */ 128 for_each_node_with_property(np, "interrupt-controller") { 129 if (of_get_property(np, "interrupts", NULL) == NULL) 130 break; 131 } 132 if (np == NULL) 133 panic("Can't find top level interrupt controller"); 134 135 /* Check type and do appropriate initialization */ 136 if (of_device_is_compatible(np, "chrp,open-pic")) { 137 /* The MPIC driver will get everything it needs from the 138 * device-tree, just pass 0 to all arguments 139 */ 140 struct mpic *mpic = 141 mpic_alloc(np, 0, MPIC_NO_RESET, 0, 0, " MPIC "); 142 BUG_ON(mpic == NULL); 143 mpic_init(mpic); 144 ppc_md.get_irq = mpic_get_irq; 145 } else 146 panic("Unrecognized top level interrupt controller"); 147 } 148 149 #ifdef CONFIG_SMP 150 static void smp_ppc47x_setup_cpu(int cpu) 151 { 152 mpic_setup_this_cpu(); 153 } 154 155 static int smp_ppc47x_kick_cpu(int cpu) 156 { 157 struct device_node *cpunode = of_get_cpu_node(cpu, NULL); 158 const u64 *spin_table_addr_prop; 159 u32 *spin_table; 160 extern void start_secondary_47x(void); 161 162 BUG_ON(cpunode == NULL); 163 164 /* Assume spin table. We could test for the enable-method in 165 * the device-tree but currently there's little point as it's 166 * our only supported method 167 */ 168 spin_table_addr_prop = 169 of_get_property(cpunode, "cpu-release-addr", NULL); 170 171 if (spin_table_addr_prop == NULL) { 172 pr_err("CPU%d: Can't start, missing cpu-release-addr !\n", 173 cpu); 174 return 1; 175 } 176 177 /* Assume it's mapped as part of the linear mapping. This is a bit 178 * fishy but will work fine for now 179 * 180 * XXX: Is there any reason to assume differently? 181 */ 182 spin_table = (u32 *)__va(*spin_table_addr_prop); 183 pr_debug("CPU%d: Spin table mapped at %p\n", cpu, spin_table); 184 185 spin_table[3] = cpu; 186 smp_wmb(); 187 spin_table[1] = __pa(start_secondary_47x); 188 mb(); 189 190 return 0; 191 } 192 193 static struct smp_ops_t ppc47x_smp_ops = { 194 .probe = smp_mpic_probe, 195 .message_pass = smp_mpic_message_pass, 196 .setup_cpu = smp_ppc47x_setup_cpu, 197 .kick_cpu = smp_ppc47x_kick_cpu, 198 .give_timebase = smp_generic_give_timebase, 199 .take_timebase = smp_generic_take_timebase, 200 }; 201 202 static void __init ppc47x_smp_init(void) 203 { 204 if (mmu_has_feature(MMU_FTR_TYPE_47x)) 205 smp_ops = &ppc47x_smp_ops; 206 } 207 208 #else /* CONFIG_SMP */ 209 static void __init ppc47x_smp_init(void) { } 210 #endif /* CONFIG_SMP */ 211 212 static void __init ppc47x_setup_arch(void) 213 { 214 215 /* No need to check the DMA config as we /know/ our windows are all of 216 * RAM. Lets hope that doesn't change */ 217 swiotlb_detect_4g(); 218 219 ppc47x_smp_init(); 220 } 221 222 static int board_rev = -1; 223 static int __init ppc47x_get_board_rev(void) 224 { 225 int reg; 226 u8 *fpga; 227 struct device_node *np = NULL; 228 229 if (of_machine_is_compatible("ibm,currituck")) { 230 np = of_find_compatible_node(NULL, NULL, "ibm,currituck-fpga"); 231 reg = 0; 232 } else if (of_machine_is_compatible("ibm,akebono")) { 233 np = of_find_compatible_node(NULL, NULL, "ibm,akebono-fpga"); 234 reg = 2; 235 } 236 237 if (!np) 238 goto fail; 239 240 fpga = (u8 *) of_iomap(np, 0); 241 of_node_put(np); 242 if (!fpga) 243 goto fail; 244 245 board_rev = ioread8(fpga + reg) & 0x03; 246 pr_info("%s: Found board revision %d\n", __func__, board_rev); 247 iounmap(fpga); 248 return 0; 249 250 fail: 251 pr_info("%s: Unable to find board revision\n", __func__); 252 return 0; 253 } 254 machine_arch_initcall(ppc47x, ppc47x_get_board_rev); 255 256 /* Use USB controller should have been hardware swizzled but it wasn't :( */ 257 static void ppc47x_pci_irq_fixup(struct pci_dev *dev) 258 { 259 if (dev->vendor == 0x1033 && (dev->device == 0x0035 || 260 dev->device == 0x00e0)) { 261 if (board_rev == 0) { 262 dev->irq = irq_create_mapping(NULL, 47); 263 pr_info("%s: Mapping irq %d\n", __func__, dev->irq); 264 } else if (board_rev == 2) { 265 dev->irq = irq_create_mapping(NULL, 49); 266 pr_info("%s: Mapping irq %d\n", __func__, dev->irq); 267 } else { 268 pr_alert("%s: Unknown board revision\n", __func__); 269 } 270 } 271 } 272 273 /* 274 * Called very early, MMU is off, device-tree isn't unflattened 275 */ 276 static int __init ppc47x_probe(void) 277 { 278 if (of_machine_is_compatible("ibm,akebono")) 279 return 1; 280 281 if (of_machine_is_compatible("ibm,currituck")) { 282 ppc_md.pci_irq_fixup = ppc47x_pci_irq_fixup; 283 return 1; 284 } 285 286 return 0; 287 } 288 289 define_machine(ppc47x) { 290 .name = "PowerPC 47x", 291 .probe = ppc47x_probe, 292 .progress = udbg_progress, 293 .init_IRQ = ppc47x_init_irq, 294 .setup_arch = ppc47x_setup_arch, 295 .restart = ppc4xx_reset_system, 296 .calibrate_decr = generic_calibrate_decr, 297 }; 298