1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * eBPF JIT compiler for PPC32 4 * 5 * Copyright 2020 Christophe Leroy <christophe.leroy@csgroup.eu> 6 * CS GROUP France 7 * 8 * Based on PPC64 eBPF JIT compiler by Naveen N. Rao 9 */ 10 #include <linux/moduleloader.h> 11 #include <asm/cacheflush.h> 12 #include <asm/asm-compat.h> 13 #include <linux/netdevice.h> 14 #include <linux/filter.h> 15 #include <linux/if_vlan.h> 16 #include <asm/kprobes.h> 17 #include <linux/bpf.h> 18 19 #include "bpf_jit.h" 20 21 /* 22 * Stack layout: 23 * 24 * [ prev sp ] <------------- 25 * [ nv gpr save area ] 16 * 4 | 26 * fp (r31) --> [ ebpf stack space ] upto 512 | 27 * [ frame header ] 16 | 28 * sp (r1) ---> [ stack pointer ] -------------- 29 */ 30 31 /* for gpr non volatile registers r17 to r31 (14) + tail call */ 32 #define BPF_PPC_STACK_SAVE (15 * 4 + 4) 33 /* stack frame, ensure this is quadword aligned */ 34 #define BPF_PPC_STACKFRAME(ctx) (STACK_FRAME_MIN_SIZE + BPF_PPC_STACK_SAVE + (ctx)->stack_size) 35 36 /* BPF register usage */ 37 #define TMP_REG (MAX_BPF_JIT_REG + 0) 38 39 /* BPF to ppc register mappings */ 40 const int b2p[MAX_BPF_JIT_REG + 1] = { 41 /* function return value */ 42 [BPF_REG_0] = 12, 43 /* function arguments */ 44 [BPF_REG_1] = 4, 45 [BPF_REG_2] = 6, 46 [BPF_REG_3] = 8, 47 [BPF_REG_4] = 10, 48 [BPF_REG_5] = 22, 49 /* non volatile registers */ 50 [BPF_REG_6] = 24, 51 [BPF_REG_7] = 26, 52 [BPF_REG_8] = 28, 53 [BPF_REG_9] = 30, 54 /* frame pointer aka BPF_REG_10 */ 55 [BPF_REG_FP] = 18, 56 /* eBPF jit internal registers */ 57 [BPF_REG_AX] = 20, 58 [TMP_REG] = 31, /* 32 bits */ 59 }; 60 61 static int bpf_to_ppc(struct codegen_context *ctx, int reg) 62 { 63 return ctx->b2p[reg]; 64 } 65 66 /* PPC NVR range -- update this if we ever use NVRs below r17 */ 67 #define BPF_PPC_NVR_MIN 17 68 #define BPF_PPC_TC 16 69 70 static int bpf_jit_stack_offsetof(struct codegen_context *ctx, int reg) 71 { 72 if ((reg >= BPF_PPC_NVR_MIN && reg < 32) || reg == BPF_PPC_TC) 73 return BPF_PPC_STACKFRAME(ctx) - 4 * (32 - reg); 74 75 WARN(true, "BPF JIT is asking about unknown registers, will crash the stack"); 76 /* Use the hole we have left for alignment */ 77 return BPF_PPC_STACKFRAME(ctx) - 4; 78 } 79 80 void bpf_jit_realloc_regs(struct codegen_context *ctx) 81 { 82 if (ctx->seen & SEEN_FUNC) 83 return; 84 85 while (ctx->seen & SEEN_NVREG_MASK && 86 (ctx->seen & SEEN_VREG_MASK) != SEEN_VREG_MASK) { 87 int old = 32 - fls(ctx->seen & (SEEN_NVREG_MASK & 0xaaaaaaab)); 88 int new = 32 - fls(~ctx->seen & (SEEN_VREG_MASK & 0xaaaaaaaa)); 89 int i; 90 91 for (i = BPF_REG_0; i <= TMP_REG; i++) { 92 if (ctx->b2p[i] != old) 93 continue; 94 ctx->b2p[i] = new; 95 bpf_set_seen_register(ctx, new); 96 bpf_clear_seen_register(ctx, old); 97 if (i != TMP_REG) { 98 bpf_set_seen_register(ctx, new - 1); 99 bpf_clear_seen_register(ctx, old - 1); 100 } 101 break; 102 } 103 } 104 } 105 106 void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx) 107 { 108 int i; 109 110 /* First arg comes in as a 32 bits pointer. */ 111 EMIT(PPC_RAW_MR(bpf_to_ppc(ctx, BPF_REG_1), _R3)); 112 EMIT(PPC_RAW_LI(bpf_to_ppc(ctx, BPF_REG_1) - 1, 0)); 113 EMIT(PPC_RAW_STWU(_R1, _R1, -BPF_PPC_STACKFRAME(ctx))); 114 115 /* 116 * Initialize tail_call_cnt in stack frame if we do tail calls. 117 * Otherwise, put in NOPs so that it can be skipped when we are 118 * invoked through a tail call. 119 */ 120 if (ctx->seen & SEEN_TAILCALL) 121 EMIT(PPC_RAW_STW(bpf_to_ppc(ctx, BPF_REG_1) - 1, _R1, 122 bpf_jit_stack_offsetof(ctx, BPF_PPC_TC))); 123 else 124 EMIT(PPC_RAW_NOP()); 125 126 #define BPF_TAILCALL_PROLOGUE_SIZE 16 127 128 /* 129 * We need a stack frame, but we don't necessarily need to 130 * save/restore LR unless we call other functions 131 */ 132 if (ctx->seen & SEEN_FUNC) 133 EMIT(PPC_RAW_MFLR(_R0)); 134 135 /* 136 * Back up non-volatile regs -- registers r18-r31 137 */ 138 for (i = BPF_PPC_NVR_MIN; i <= 31; i++) 139 if (bpf_is_seen_register(ctx, i)) 140 EMIT(PPC_RAW_STW(i, _R1, bpf_jit_stack_offsetof(ctx, i))); 141 142 /* If needed retrieve arguments 9 and 10, ie 5th 64 bits arg.*/ 143 if (bpf_is_seen_register(ctx, bpf_to_ppc(ctx, BPF_REG_5))) { 144 EMIT(PPC_RAW_LWZ(bpf_to_ppc(ctx, BPF_REG_5) - 1, _R1, BPF_PPC_STACKFRAME(ctx)) + 8); 145 EMIT(PPC_RAW_LWZ(bpf_to_ppc(ctx, BPF_REG_5), _R1, BPF_PPC_STACKFRAME(ctx)) + 12); 146 } 147 148 /* Setup frame pointer to point to the bpf stack area */ 149 if (bpf_is_seen_register(ctx, bpf_to_ppc(ctx, BPF_REG_FP))) { 150 EMIT(PPC_RAW_LI(bpf_to_ppc(ctx, BPF_REG_FP) - 1, 0)); 151 EMIT(PPC_RAW_ADDI(bpf_to_ppc(ctx, BPF_REG_FP), _R1, 152 STACK_FRAME_MIN_SIZE + ctx->stack_size)); 153 } 154 155 if (ctx->seen & SEEN_FUNC) 156 EMIT(PPC_RAW_STW(_R0, _R1, BPF_PPC_STACKFRAME(ctx) + PPC_LR_STKOFF)); 157 } 158 159 static void bpf_jit_emit_common_epilogue(u32 *image, struct codegen_context *ctx) 160 { 161 int i; 162 163 /* Restore NVRs */ 164 for (i = BPF_PPC_NVR_MIN; i <= 31; i++) 165 if (bpf_is_seen_register(ctx, i)) 166 EMIT(PPC_RAW_LWZ(i, _R1, bpf_jit_stack_offsetof(ctx, i))); 167 } 168 169 void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx) 170 { 171 EMIT(PPC_RAW_MR(_R3, bpf_to_ppc(ctx, BPF_REG_0))); 172 173 bpf_jit_emit_common_epilogue(image, ctx); 174 175 /* Tear down our stack frame */ 176 177 if (ctx->seen & SEEN_FUNC) 178 EMIT(PPC_RAW_LWZ(_R0, _R1, BPF_PPC_STACKFRAME(ctx) + PPC_LR_STKOFF)); 179 180 EMIT(PPC_RAW_ADDI(_R1, _R1, BPF_PPC_STACKFRAME(ctx))); 181 182 if (ctx->seen & SEEN_FUNC) 183 EMIT(PPC_RAW_MTLR(_R0)); 184 185 EMIT(PPC_RAW_BLR()); 186 } 187 188 void bpf_jit_emit_func_call_rel(u32 *image, struct codegen_context *ctx, u64 func) 189 { 190 s32 rel = (s32)func - (s32)(image + ctx->idx); 191 192 if (image && rel < 0x2000000 && rel >= -0x2000000) { 193 PPC_BL_ABS(func); 194 } else { 195 /* Load function address into r0 */ 196 EMIT(PPC_RAW_LIS(_R0, IMM_H(func))); 197 EMIT(PPC_RAW_ORI(_R0, _R0, IMM_L(func))); 198 EMIT(PPC_RAW_MTCTR(_R0)); 199 EMIT(PPC_RAW_BCTRL()); 200 } 201 } 202 203 static void bpf_jit_emit_tail_call(u32 *image, struct codegen_context *ctx, u32 out) 204 { 205 /* 206 * By now, the eBPF program has already setup parameters in r3-r6 207 * r3-r4/BPF_REG_1 - pointer to ctx -- passed as is to the next bpf program 208 * r5-r6/BPF_REG_2 - pointer to bpf_array 209 * r7-r8/BPF_REG_3 - index in bpf_array 210 */ 211 int b2p_bpf_array = bpf_to_ppc(ctx, BPF_REG_2); 212 int b2p_index = bpf_to_ppc(ctx, BPF_REG_3); 213 214 /* 215 * if (index >= array->map.max_entries) 216 * goto out; 217 */ 218 EMIT(PPC_RAW_LWZ(_R0, b2p_bpf_array, offsetof(struct bpf_array, map.max_entries))); 219 EMIT(PPC_RAW_CMPLW(b2p_index, _R0)); 220 EMIT(PPC_RAW_LWZ(_R0, _R1, bpf_jit_stack_offsetof(ctx, BPF_PPC_TC))); 221 PPC_BCC(COND_GE, out); 222 223 /* 224 * if (tail_call_cnt > MAX_TAIL_CALL_CNT) 225 * goto out; 226 */ 227 EMIT(PPC_RAW_CMPLWI(_R0, MAX_TAIL_CALL_CNT)); 228 /* tail_call_cnt++; */ 229 EMIT(PPC_RAW_ADDIC(_R0, _R0, 1)); 230 PPC_BCC(COND_GT, out); 231 232 /* prog = array->ptrs[index]; */ 233 EMIT(PPC_RAW_RLWINM(_R3, b2p_index, 2, 0, 29)); 234 EMIT(PPC_RAW_ADD(_R3, _R3, b2p_bpf_array)); 235 EMIT(PPC_RAW_LWZ(_R3, _R3, offsetof(struct bpf_array, ptrs))); 236 EMIT(PPC_RAW_STW(_R0, _R1, bpf_jit_stack_offsetof(ctx, BPF_PPC_TC))); 237 238 /* 239 * if (prog == NULL) 240 * goto out; 241 */ 242 EMIT(PPC_RAW_CMPLWI(_R3, 0)); 243 PPC_BCC(COND_EQ, out); 244 245 /* goto *(prog->bpf_func + prologue_size); */ 246 EMIT(PPC_RAW_LWZ(_R3, _R3, offsetof(struct bpf_prog, bpf_func))); 247 248 if (ctx->seen & SEEN_FUNC) 249 EMIT(PPC_RAW_LWZ(_R0, _R1, BPF_PPC_STACKFRAME(ctx) + PPC_LR_STKOFF)); 250 251 EMIT(PPC_RAW_ADDIC(_R3, _R3, BPF_TAILCALL_PROLOGUE_SIZE)); 252 253 if (ctx->seen & SEEN_FUNC) 254 EMIT(PPC_RAW_MTLR(_R0)); 255 256 EMIT(PPC_RAW_MTCTR(_R3)); 257 258 EMIT(PPC_RAW_MR(_R3, bpf_to_ppc(ctx, BPF_REG_1))); 259 260 /* tear restore NVRs, ... */ 261 bpf_jit_emit_common_epilogue(image, ctx); 262 263 EMIT(PPC_RAW_BCTR()); 264 /* out: */ 265 } 266 267 /* Assemble the body code between the prologue & epilogue */ 268 int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, struct codegen_context *ctx, 269 u32 *addrs, bool extra_pass) 270 { 271 const struct bpf_insn *insn = fp->insnsi; 272 int flen = fp->len; 273 int i, ret; 274 275 /* Start of epilogue code - will only be valid 2nd pass onwards */ 276 u32 exit_addr = addrs[flen]; 277 278 for (i = 0; i < flen; i++) { 279 u32 code = insn[i].code; 280 u32 dst_reg = bpf_to_ppc(ctx, insn[i].dst_reg); 281 u32 dst_reg_h = dst_reg - 1; 282 u32 src_reg = bpf_to_ppc(ctx, insn[i].src_reg); 283 u32 src_reg_h = src_reg - 1; 284 u32 tmp_reg = bpf_to_ppc(ctx, TMP_REG); 285 s16 off = insn[i].off; 286 s32 imm = insn[i].imm; 287 bool func_addr_fixed; 288 u64 func_addr; 289 u32 true_cond; 290 291 /* 292 * addrs[] maps a BPF bytecode address into a real offset from 293 * the start of the body code. 294 */ 295 addrs[i] = ctx->idx * 4; 296 297 /* 298 * As an optimization, we note down which registers 299 * are used so that we can only save/restore those in our 300 * prologue and epilogue. We do this here regardless of whether 301 * the actual BPF instruction uses src/dst registers or not 302 * (for instance, BPF_CALL does not use them). The expectation 303 * is that those instructions will have src_reg/dst_reg set to 304 * 0. Even otherwise, we just lose some prologue/epilogue 305 * optimization but everything else should work without 306 * any issues. 307 */ 308 if (dst_reg >= 3 && dst_reg < 32) { 309 bpf_set_seen_register(ctx, dst_reg); 310 bpf_set_seen_register(ctx, dst_reg_h); 311 } 312 313 if (src_reg >= 3 && src_reg < 32) { 314 bpf_set_seen_register(ctx, src_reg); 315 bpf_set_seen_register(ctx, src_reg_h); 316 } 317 318 switch (code) { 319 /* 320 * Arithmetic operations: ADD/SUB/MUL/DIV/MOD/NEG 321 */ 322 case BPF_ALU | BPF_ADD | BPF_X: /* (u32) dst += (u32) src */ 323 EMIT(PPC_RAW_ADD(dst_reg, dst_reg, src_reg)); 324 break; 325 case BPF_ALU64 | BPF_ADD | BPF_X: /* dst += src */ 326 EMIT(PPC_RAW_ADDC(dst_reg, dst_reg, src_reg)); 327 EMIT(PPC_RAW_ADDE(dst_reg_h, dst_reg_h, src_reg_h)); 328 break; 329 case BPF_ALU | BPF_SUB | BPF_X: /* (u32) dst -= (u32) src */ 330 EMIT(PPC_RAW_SUB(dst_reg, dst_reg, src_reg)); 331 break; 332 case BPF_ALU64 | BPF_SUB | BPF_X: /* dst -= src */ 333 EMIT(PPC_RAW_SUBFC(dst_reg, src_reg, dst_reg)); 334 EMIT(PPC_RAW_SUBFE(dst_reg_h, src_reg_h, dst_reg_h)); 335 break; 336 case BPF_ALU | BPF_SUB | BPF_K: /* (u32) dst -= (u32) imm */ 337 imm = -imm; 338 fallthrough; 339 case BPF_ALU | BPF_ADD | BPF_K: /* (u32) dst += (u32) imm */ 340 if (IMM_HA(imm) & 0xffff) 341 EMIT(PPC_RAW_ADDIS(dst_reg, dst_reg, IMM_HA(imm))); 342 if (IMM_L(imm)) 343 EMIT(PPC_RAW_ADDI(dst_reg, dst_reg, IMM_L(imm))); 344 break; 345 case BPF_ALU64 | BPF_SUB | BPF_K: /* dst -= imm */ 346 imm = -imm; 347 fallthrough; 348 case BPF_ALU64 | BPF_ADD | BPF_K: /* dst += imm */ 349 if (!imm) 350 break; 351 352 if (imm >= -32768 && imm < 32768) { 353 EMIT(PPC_RAW_ADDIC(dst_reg, dst_reg, imm)); 354 } else { 355 PPC_LI32(_R0, imm); 356 EMIT(PPC_RAW_ADDC(dst_reg, dst_reg, _R0)); 357 } 358 if (imm >= 0) 359 EMIT(PPC_RAW_ADDZE(dst_reg_h, dst_reg_h)); 360 else 361 EMIT(PPC_RAW_ADDME(dst_reg_h, dst_reg_h)); 362 break; 363 case BPF_ALU64 | BPF_MUL | BPF_X: /* dst *= src */ 364 bpf_set_seen_register(ctx, tmp_reg); 365 EMIT(PPC_RAW_MULW(_R0, dst_reg, src_reg_h)); 366 EMIT(PPC_RAW_MULW(dst_reg_h, dst_reg_h, src_reg)); 367 EMIT(PPC_RAW_MULHWU(tmp_reg, dst_reg, src_reg)); 368 EMIT(PPC_RAW_MULW(dst_reg, dst_reg, src_reg)); 369 EMIT(PPC_RAW_ADD(dst_reg_h, dst_reg_h, _R0)); 370 EMIT(PPC_RAW_ADD(dst_reg_h, dst_reg_h, tmp_reg)); 371 break; 372 case BPF_ALU | BPF_MUL | BPF_X: /* (u32) dst *= (u32) src */ 373 EMIT(PPC_RAW_MULW(dst_reg, dst_reg, src_reg)); 374 break; 375 case BPF_ALU | BPF_MUL | BPF_K: /* (u32) dst *= (u32) imm */ 376 if (imm >= -32768 && imm < 32768) { 377 EMIT(PPC_RAW_MULI(dst_reg, dst_reg, imm)); 378 } else { 379 PPC_LI32(_R0, imm); 380 EMIT(PPC_RAW_MULW(dst_reg, dst_reg, _R0)); 381 } 382 break; 383 case BPF_ALU64 | BPF_MUL | BPF_K: /* dst *= imm */ 384 if (!imm) { 385 PPC_LI32(dst_reg, 0); 386 PPC_LI32(dst_reg_h, 0); 387 break; 388 } 389 if (imm == 1) 390 break; 391 if (imm == -1) { 392 EMIT(PPC_RAW_SUBFIC(dst_reg, dst_reg, 0)); 393 EMIT(PPC_RAW_SUBFZE(dst_reg_h, dst_reg_h)); 394 break; 395 } 396 bpf_set_seen_register(ctx, tmp_reg); 397 PPC_LI32(tmp_reg, imm); 398 EMIT(PPC_RAW_MULW(dst_reg_h, dst_reg_h, tmp_reg)); 399 if (imm < 0) 400 EMIT(PPC_RAW_SUB(dst_reg_h, dst_reg_h, dst_reg)); 401 EMIT(PPC_RAW_MULHWU(_R0, dst_reg, tmp_reg)); 402 EMIT(PPC_RAW_MULW(dst_reg, dst_reg, tmp_reg)); 403 EMIT(PPC_RAW_ADD(dst_reg_h, dst_reg_h, _R0)); 404 break; 405 case BPF_ALU | BPF_DIV | BPF_X: /* (u32) dst /= (u32) src */ 406 EMIT(PPC_RAW_DIVWU(dst_reg, dst_reg, src_reg)); 407 break; 408 case BPF_ALU | BPF_MOD | BPF_X: /* (u32) dst %= (u32) src */ 409 EMIT(PPC_RAW_DIVWU(_R0, dst_reg, src_reg)); 410 EMIT(PPC_RAW_MULW(_R0, src_reg, _R0)); 411 EMIT(PPC_RAW_SUB(dst_reg, dst_reg, _R0)); 412 break; 413 case BPF_ALU64 | BPF_DIV | BPF_X: /* dst /= src */ 414 return -EOPNOTSUPP; 415 case BPF_ALU64 | BPF_MOD | BPF_X: /* dst %= src */ 416 return -EOPNOTSUPP; 417 case BPF_ALU | BPF_DIV | BPF_K: /* (u32) dst /= (u32) imm */ 418 if (!imm) 419 return -EINVAL; 420 if (imm == 1) 421 break; 422 423 PPC_LI32(_R0, imm); 424 EMIT(PPC_RAW_DIVWU(dst_reg, dst_reg, _R0)); 425 break; 426 case BPF_ALU | BPF_MOD | BPF_K: /* (u32) dst %= (u32) imm */ 427 if (!imm) 428 return -EINVAL; 429 430 if (!is_power_of_2((u32)imm)) { 431 bpf_set_seen_register(ctx, tmp_reg); 432 PPC_LI32(tmp_reg, imm); 433 EMIT(PPC_RAW_DIVWU(_R0, dst_reg, tmp_reg)); 434 EMIT(PPC_RAW_MULW(_R0, tmp_reg, _R0)); 435 EMIT(PPC_RAW_SUB(dst_reg, dst_reg, _R0)); 436 break; 437 } 438 if (imm == 1) 439 EMIT(PPC_RAW_LI(dst_reg, 0)); 440 else 441 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 0, 32 - ilog2((u32)imm), 31)); 442 443 break; 444 case BPF_ALU64 | BPF_MOD | BPF_K: /* dst %= imm */ 445 if (!imm) 446 return -EINVAL; 447 if (imm < 0) 448 imm = -imm; 449 if (!is_power_of_2(imm)) 450 return -EOPNOTSUPP; 451 if (imm == 1) 452 EMIT(PPC_RAW_LI(dst_reg, 0)); 453 else 454 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 0, 32 - ilog2(imm), 31)); 455 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 456 break; 457 case BPF_ALU64 | BPF_DIV | BPF_K: /* dst /= imm */ 458 if (!imm) 459 return -EINVAL; 460 if (!is_power_of_2(abs(imm))) 461 return -EOPNOTSUPP; 462 463 if (imm < 0) { 464 EMIT(PPC_RAW_SUBFIC(dst_reg, dst_reg, 0)); 465 EMIT(PPC_RAW_SUBFZE(dst_reg_h, dst_reg_h)); 466 imm = -imm; 467 } 468 if (imm == 1) 469 break; 470 imm = ilog2(imm); 471 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 32 - imm, imm, 31)); 472 EMIT(PPC_RAW_RLWIMI(dst_reg, dst_reg_h, 32 - imm, 0, imm - 1)); 473 EMIT(PPC_RAW_SRAWI(dst_reg_h, dst_reg_h, imm)); 474 break; 475 case BPF_ALU | BPF_NEG: /* (u32) dst = -dst */ 476 EMIT(PPC_RAW_NEG(dst_reg, dst_reg)); 477 break; 478 case BPF_ALU64 | BPF_NEG: /* dst = -dst */ 479 EMIT(PPC_RAW_SUBFIC(dst_reg, dst_reg, 0)); 480 EMIT(PPC_RAW_SUBFZE(dst_reg_h, dst_reg_h)); 481 break; 482 483 /* 484 * Logical operations: AND/OR/XOR/[A]LSH/[A]RSH 485 */ 486 case BPF_ALU64 | BPF_AND | BPF_X: /* dst = dst & src */ 487 EMIT(PPC_RAW_AND(dst_reg, dst_reg, src_reg)); 488 EMIT(PPC_RAW_AND(dst_reg_h, dst_reg_h, src_reg_h)); 489 break; 490 case BPF_ALU | BPF_AND | BPF_X: /* (u32) dst = dst & src */ 491 EMIT(PPC_RAW_AND(dst_reg, dst_reg, src_reg)); 492 break; 493 case BPF_ALU64 | BPF_AND | BPF_K: /* dst = dst & imm */ 494 if (imm >= 0) 495 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 496 fallthrough; 497 case BPF_ALU | BPF_AND | BPF_K: /* (u32) dst = dst & imm */ 498 if (!IMM_H(imm)) { 499 EMIT(PPC_RAW_ANDI(dst_reg, dst_reg, IMM_L(imm))); 500 } else if (!IMM_L(imm)) { 501 EMIT(PPC_RAW_ANDIS(dst_reg, dst_reg, IMM_H(imm))); 502 } else if (imm == (((1 << fls(imm)) - 1) ^ ((1 << (ffs(i) - 1)) - 1))) { 503 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 0, 504 32 - fls(imm), 32 - ffs(imm))); 505 } else { 506 PPC_LI32(_R0, imm); 507 EMIT(PPC_RAW_AND(dst_reg, dst_reg, _R0)); 508 } 509 break; 510 case BPF_ALU64 | BPF_OR | BPF_X: /* dst = dst | src */ 511 EMIT(PPC_RAW_OR(dst_reg, dst_reg, src_reg)); 512 EMIT(PPC_RAW_OR(dst_reg_h, dst_reg_h, src_reg_h)); 513 break; 514 case BPF_ALU | BPF_OR | BPF_X: /* dst = (u32) dst | (u32) src */ 515 EMIT(PPC_RAW_OR(dst_reg, dst_reg, src_reg)); 516 break; 517 case BPF_ALU64 | BPF_OR | BPF_K:/* dst = dst | imm */ 518 /* Sign-extended */ 519 if (imm < 0) 520 EMIT(PPC_RAW_LI(dst_reg_h, -1)); 521 fallthrough; 522 case BPF_ALU | BPF_OR | BPF_K:/* dst = (u32) dst | (u32) imm */ 523 if (IMM_L(imm)) 524 EMIT(PPC_RAW_ORI(dst_reg, dst_reg, IMM_L(imm))); 525 if (IMM_H(imm)) 526 EMIT(PPC_RAW_ORIS(dst_reg, dst_reg, IMM_H(imm))); 527 break; 528 case BPF_ALU64 | BPF_XOR | BPF_X: /* dst ^= src */ 529 if (dst_reg == src_reg) { 530 EMIT(PPC_RAW_LI(dst_reg, 0)); 531 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 532 } else { 533 EMIT(PPC_RAW_XOR(dst_reg, dst_reg, src_reg)); 534 EMIT(PPC_RAW_XOR(dst_reg_h, dst_reg_h, src_reg_h)); 535 } 536 break; 537 case BPF_ALU | BPF_XOR | BPF_X: /* (u32) dst ^= src */ 538 if (dst_reg == src_reg) 539 EMIT(PPC_RAW_LI(dst_reg, 0)); 540 else 541 EMIT(PPC_RAW_XOR(dst_reg, dst_reg, src_reg)); 542 break; 543 case BPF_ALU64 | BPF_XOR | BPF_K: /* dst ^= imm */ 544 if (imm < 0) 545 EMIT(PPC_RAW_NOR(dst_reg_h, dst_reg_h, dst_reg_h)); 546 fallthrough; 547 case BPF_ALU | BPF_XOR | BPF_K: /* (u32) dst ^= (u32) imm */ 548 if (IMM_L(imm)) 549 EMIT(PPC_RAW_XORI(dst_reg, dst_reg, IMM_L(imm))); 550 if (IMM_H(imm)) 551 EMIT(PPC_RAW_XORIS(dst_reg, dst_reg, IMM_H(imm))); 552 break; 553 case BPF_ALU | BPF_LSH | BPF_X: /* (u32) dst <<= (u32) src */ 554 EMIT(PPC_RAW_SLW(dst_reg, dst_reg, src_reg)); 555 break; 556 case BPF_ALU64 | BPF_LSH | BPF_X: /* dst <<= src; */ 557 bpf_set_seen_register(ctx, tmp_reg); 558 EMIT(PPC_RAW_SUBFIC(_R0, src_reg, 32)); 559 EMIT(PPC_RAW_SLW(dst_reg_h, dst_reg_h, src_reg)); 560 EMIT(PPC_RAW_ADDI(tmp_reg, src_reg, 32)); 561 EMIT(PPC_RAW_SRW(_R0, dst_reg, _R0)); 562 EMIT(PPC_RAW_SLW(tmp_reg, dst_reg, tmp_reg)); 563 EMIT(PPC_RAW_OR(dst_reg_h, dst_reg_h, _R0)); 564 EMIT(PPC_RAW_SLW(dst_reg, dst_reg, src_reg)); 565 EMIT(PPC_RAW_OR(dst_reg_h, dst_reg_h, tmp_reg)); 566 break; 567 case BPF_ALU | BPF_LSH | BPF_K: /* (u32) dst <<= (u32) imm */ 568 if (!imm) 569 break; 570 EMIT(PPC_RAW_SLWI(dst_reg, dst_reg, imm)); 571 break; 572 case BPF_ALU64 | BPF_LSH | BPF_K: /* dst <<= imm */ 573 if (imm < 0) 574 return -EINVAL; 575 if (!imm) 576 break; 577 if (imm < 32) { 578 EMIT(PPC_RAW_RLWINM(dst_reg_h, dst_reg_h, imm, 0, 31 - imm)); 579 EMIT(PPC_RAW_RLWIMI(dst_reg_h, dst_reg, imm, 32 - imm, 31)); 580 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, imm, 0, 31 - imm)); 581 break; 582 } 583 if (imm < 64) 584 EMIT(PPC_RAW_RLWINM(dst_reg_h, dst_reg, imm, 0, 31 - imm)); 585 else 586 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 587 EMIT(PPC_RAW_LI(dst_reg, 0)); 588 break; 589 case BPF_ALU | BPF_RSH | BPF_X: /* (u32) dst >>= (u32) src */ 590 EMIT(PPC_RAW_SRW(dst_reg, dst_reg, src_reg)); 591 break; 592 case BPF_ALU64 | BPF_RSH | BPF_X: /* dst >>= src */ 593 bpf_set_seen_register(ctx, tmp_reg); 594 EMIT(PPC_RAW_SUBFIC(_R0, src_reg, 32)); 595 EMIT(PPC_RAW_SRW(dst_reg, dst_reg, src_reg)); 596 EMIT(PPC_RAW_ADDI(tmp_reg, src_reg, 32)); 597 EMIT(PPC_RAW_SLW(_R0, dst_reg_h, _R0)); 598 EMIT(PPC_RAW_SRW(tmp_reg, dst_reg_h, tmp_reg)); 599 EMIT(PPC_RAW_OR(dst_reg, dst_reg, _R0)); 600 EMIT(PPC_RAW_SRW(dst_reg_h, dst_reg_h, src_reg)); 601 EMIT(PPC_RAW_OR(dst_reg, dst_reg, tmp_reg)); 602 break; 603 case BPF_ALU | BPF_RSH | BPF_K: /* (u32) dst >>= (u32) imm */ 604 if (!imm) 605 break; 606 EMIT(PPC_RAW_SRWI(dst_reg, dst_reg, imm)); 607 break; 608 case BPF_ALU64 | BPF_RSH | BPF_K: /* dst >>= imm */ 609 if (imm < 0) 610 return -EINVAL; 611 if (!imm) 612 break; 613 if (imm < 32) { 614 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 32 - imm, imm, 31)); 615 EMIT(PPC_RAW_RLWIMI(dst_reg, dst_reg_h, 32 - imm, 0, imm - 1)); 616 EMIT(PPC_RAW_RLWINM(dst_reg_h, dst_reg_h, 32 - imm, imm, 31)); 617 break; 618 } 619 if (imm < 64) 620 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg_h, 64 - imm, imm - 32, 31)); 621 else 622 EMIT(PPC_RAW_LI(dst_reg, 0)); 623 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 624 break; 625 case BPF_ALU | BPF_ARSH | BPF_X: /* (s32) dst >>= src */ 626 EMIT(PPC_RAW_SRAW(dst_reg_h, dst_reg, src_reg)); 627 break; 628 case BPF_ALU64 | BPF_ARSH | BPF_X: /* (s64) dst >>= src */ 629 bpf_set_seen_register(ctx, tmp_reg); 630 EMIT(PPC_RAW_SUBFIC(_R0, src_reg, 32)); 631 EMIT(PPC_RAW_SRW(dst_reg, dst_reg, src_reg)); 632 EMIT(PPC_RAW_SLW(_R0, dst_reg_h, _R0)); 633 EMIT(PPC_RAW_ADDI(tmp_reg, src_reg, 32)); 634 EMIT(PPC_RAW_OR(dst_reg, dst_reg, _R0)); 635 EMIT(PPC_RAW_RLWINM(_R0, tmp_reg, 0, 26, 26)); 636 EMIT(PPC_RAW_SRAW(tmp_reg, dst_reg_h, tmp_reg)); 637 EMIT(PPC_RAW_SRAW(dst_reg_h, dst_reg_h, src_reg)); 638 EMIT(PPC_RAW_SLW(tmp_reg, tmp_reg, _R0)); 639 EMIT(PPC_RAW_OR(dst_reg, dst_reg, tmp_reg)); 640 break; 641 case BPF_ALU | BPF_ARSH | BPF_K: /* (s32) dst >>= imm */ 642 if (!imm) 643 break; 644 EMIT(PPC_RAW_SRAWI(dst_reg, dst_reg, imm)); 645 break; 646 case BPF_ALU64 | BPF_ARSH | BPF_K: /* (s64) dst >>= imm */ 647 if (imm < 0) 648 return -EINVAL; 649 if (!imm) 650 break; 651 if (imm < 32) { 652 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 32 - imm, imm, 31)); 653 EMIT(PPC_RAW_RLWIMI(dst_reg, dst_reg_h, 32 - imm, 0, imm - 1)); 654 EMIT(PPC_RAW_SRAWI(dst_reg_h, dst_reg_h, imm)); 655 break; 656 } 657 if (imm < 64) 658 EMIT(PPC_RAW_SRAWI(dst_reg, dst_reg_h, imm - 32)); 659 else 660 EMIT(PPC_RAW_SRAWI(dst_reg, dst_reg_h, 31)); 661 EMIT(PPC_RAW_SRAWI(dst_reg_h, dst_reg_h, 31)); 662 break; 663 664 /* 665 * MOV 666 */ 667 case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */ 668 if (dst_reg == src_reg) 669 break; 670 EMIT(PPC_RAW_MR(dst_reg, src_reg)); 671 EMIT(PPC_RAW_MR(dst_reg_h, src_reg_h)); 672 break; 673 case BPF_ALU | BPF_MOV | BPF_X: /* (u32) dst = src */ 674 /* special mov32 for zext */ 675 if (imm == 1) 676 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 677 else if (dst_reg != src_reg) 678 EMIT(PPC_RAW_MR(dst_reg, src_reg)); 679 break; 680 case BPF_ALU64 | BPF_MOV | BPF_K: /* dst = (s64) imm */ 681 PPC_LI32(dst_reg, imm); 682 PPC_EX32(dst_reg_h, imm); 683 break; 684 case BPF_ALU | BPF_MOV | BPF_K: /* (u32) dst = imm */ 685 PPC_LI32(dst_reg, imm); 686 break; 687 688 /* 689 * BPF_FROM_BE/LE 690 */ 691 case BPF_ALU | BPF_END | BPF_FROM_LE: 692 switch (imm) { 693 case 16: 694 /* Copy 16 bits to upper part */ 695 EMIT(PPC_RAW_RLWIMI(dst_reg, dst_reg, 16, 0, 15)); 696 /* Rotate 8 bits right & mask */ 697 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 24, 16, 31)); 698 break; 699 case 32: 700 /* 701 * Rotate word left by 8 bits: 702 * 2 bytes are already in their final position 703 * -- byte 2 and 4 (of bytes 1, 2, 3 and 4) 704 */ 705 EMIT(PPC_RAW_RLWINM(_R0, dst_reg, 8, 0, 31)); 706 /* Rotate 24 bits and insert byte 1 */ 707 EMIT(PPC_RAW_RLWIMI(_R0, dst_reg, 24, 0, 7)); 708 /* Rotate 24 bits and insert byte 3 */ 709 EMIT(PPC_RAW_RLWIMI(_R0, dst_reg, 24, 16, 23)); 710 EMIT(PPC_RAW_MR(dst_reg, _R0)); 711 break; 712 case 64: 713 bpf_set_seen_register(ctx, tmp_reg); 714 EMIT(PPC_RAW_RLWINM(tmp_reg, dst_reg, 8, 0, 31)); 715 EMIT(PPC_RAW_RLWINM(_R0, dst_reg_h, 8, 0, 31)); 716 /* Rotate 24 bits and insert byte 1 */ 717 EMIT(PPC_RAW_RLWIMI(tmp_reg, dst_reg, 24, 0, 7)); 718 EMIT(PPC_RAW_RLWIMI(_R0, dst_reg_h, 24, 0, 7)); 719 /* Rotate 24 bits and insert byte 3 */ 720 EMIT(PPC_RAW_RLWIMI(tmp_reg, dst_reg, 24, 16, 23)); 721 EMIT(PPC_RAW_RLWIMI(_R0, dst_reg_h, 24, 16, 23)); 722 EMIT(PPC_RAW_MR(dst_reg, _R0)); 723 EMIT(PPC_RAW_MR(dst_reg_h, tmp_reg)); 724 break; 725 } 726 break; 727 case BPF_ALU | BPF_END | BPF_FROM_BE: 728 switch (imm) { 729 case 16: 730 /* zero-extend 16 bits into 32 bits */ 731 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 0, 16, 31)); 732 break; 733 case 32: 734 case 64: 735 /* nop */ 736 break; 737 } 738 break; 739 740 /* 741 * BPF_ST NOSPEC (speculation barrier) 742 */ 743 case BPF_ST | BPF_NOSPEC: 744 break; 745 746 /* 747 * BPF_ST(X) 748 */ 749 case BPF_STX | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = src */ 750 EMIT(PPC_RAW_STB(src_reg, dst_reg, off)); 751 break; 752 case BPF_ST | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = imm */ 753 PPC_LI32(_R0, imm); 754 EMIT(PPC_RAW_STB(_R0, dst_reg, off)); 755 break; 756 case BPF_STX | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = src */ 757 EMIT(PPC_RAW_STH(src_reg, dst_reg, off)); 758 break; 759 case BPF_ST | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = imm */ 760 PPC_LI32(_R0, imm); 761 EMIT(PPC_RAW_STH(_R0, dst_reg, off)); 762 break; 763 case BPF_STX | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = src */ 764 EMIT(PPC_RAW_STW(src_reg, dst_reg, off)); 765 break; 766 case BPF_ST | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = imm */ 767 PPC_LI32(_R0, imm); 768 EMIT(PPC_RAW_STW(_R0, dst_reg, off)); 769 break; 770 case BPF_STX | BPF_MEM | BPF_DW: /* (u64 *)(dst + off) = src */ 771 EMIT(PPC_RAW_STW(src_reg_h, dst_reg, off)); 772 EMIT(PPC_RAW_STW(src_reg, dst_reg, off + 4)); 773 break; 774 case BPF_ST | BPF_MEM | BPF_DW: /* *(u64 *)(dst + off) = imm */ 775 PPC_LI32(_R0, imm); 776 EMIT(PPC_RAW_STW(_R0, dst_reg, off + 4)); 777 PPC_EX32(_R0, imm); 778 EMIT(PPC_RAW_STW(_R0, dst_reg, off)); 779 break; 780 781 /* 782 * BPF_STX ATOMIC (atomic ops) 783 */ 784 case BPF_STX | BPF_ATOMIC | BPF_W: 785 if (imm != BPF_ADD) { 786 pr_err_ratelimited("eBPF filter atomic op code %02x (@%d) unsupported\n", 787 code, i); 788 return -ENOTSUPP; 789 } 790 791 /* *(u32 *)(dst + off) += src */ 792 793 bpf_set_seen_register(ctx, tmp_reg); 794 /* Get offset into TMP_REG */ 795 EMIT(PPC_RAW_LI(tmp_reg, off)); 796 /* load value from memory into r0 */ 797 EMIT(PPC_RAW_LWARX(_R0, tmp_reg, dst_reg, 0)); 798 /* add value from src_reg into this */ 799 EMIT(PPC_RAW_ADD(_R0, _R0, src_reg)); 800 /* store result back */ 801 EMIT(PPC_RAW_STWCX(_R0, tmp_reg, dst_reg)); 802 /* we're done if this succeeded */ 803 PPC_BCC_SHORT(COND_NE, (ctx->idx - 3) * 4); 804 break; 805 806 case BPF_STX | BPF_ATOMIC | BPF_DW: /* *(u64 *)(dst + off) += src */ 807 return -EOPNOTSUPP; 808 809 /* 810 * BPF_LDX 811 */ 812 case BPF_LDX | BPF_MEM | BPF_B: /* dst = *(u8 *)(ul) (src + off) */ 813 EMIT(PPC_RAW_LBZ(dst_reg, src_reg, off)); 814 if (!fp->aux->verifier_zext) 815 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 816 break; 817 case BPF_LDX | BPF_MEM | BPF_H: /* dst = *(u16 *)(ul) (src + off) */ 818 EMIT(PPC_RAW_LHZ(dst_reg, src_reg, off)); 819 if (!fp->aux->verifier_zext) 820 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 821 break; 822 case BPF_LDX | BPF_MEM | BPF_W: /* dst = *(u32 *)(ul) (src + off) */ 823 EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off)); 824 if (!fp->aux->verifier_zext) 825 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 826 break; 827 case BPF_LDX | BPF_MEM | BPF_DW: /* dst = *(u64 *)(ul) (src + off) */ 828 EMIT(PPC_RAW_LWZ(dst_reg_h, src_reg, off)); 829 EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off + 4)); 830 break; 831 832 /* 833 * Doubleword load 834 * 16 byte instruction that uses two 'struct bpf_insn' 835 */ 836 case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */ 837 PPC_LI32(dst_reg_h, (u32)insn[i + 1].imm); 838 PPC_LI32(dst_reg, (u32)insn[i].imm); 839 /* Adjust for two bpf instructions */ 840 addrs[++i] = ctx->idx * 4; 841 break; 842 843 /* 844 * Return/Exit 845 */ 846 case BPF_JMP | BPF_EXIT: 847 /* 848 * If this isn't the very last instruction, branch to 849 * the epilogue. If we _are_ the last instruction, 850 * we'll just fall through to the epilogue. 851 */ 852 if (i != flen - 1) 853 PPC_JMP(exit_addr); 854 /* else fall through to the epilogue */ 855 break; 856 857 /* 858 * Call kernel helper or bpf function 859 */ 860 case BPF_JMP | BPF_CALL: 861 ctx->seen |= SEEN_FUNC; 862 863 ret = bpf_jit_get_func_addr(fp, &insn[i], extra_pass, 864 &func_addr, &func_addr_fixed); 865 if (ret < 0) 866 return ret; 867 868 if (bpf_is_seen_register(ctx, bpf_to_ppc(ctx, BPF_REG_5))) { 869 EMIT(PPC_RAW_STW(bpf_to_ppc(ctx, BPF_REG_5) - 1, _R1, 8)); 870 EMIT(PPC_RAW_STW(bpf_to_ppc(ctx, BPF_REG_5), _R1, 12)); 871 } 872 873 bpf_jit_emit_func_call_rel(image, ctx, func_addr); 874 875 EMIT(PPC_RAW_MR(bpf_to_ppc(ctx, BPF_REG_0) - 1, _R3)); 876 EMIT(PPC_RAW_MR(bpf_to_ppc(ctx, BPF_REG_0), _R4)); 877 break; 878 879 /* 880 * Jumps and branches 881 */ 882 case BPF_JMP | BPF_JA: 883 PPC_JMP(addrs[i + 1 + off]); 884 break; 885 886 case BPF_JMP | BPF_JGT | BPF_K: 887 case BPF_JMP | BPF_JGT | BPF_X: 888 case BPF_JMP | BPF_JSGT | BPF_K: 889 case BPF_JMP | BPF_JSGT | BPF_X: 890 case BPF_JMP32 | BPF_JGT | BPF_K: 891 case BPF_JMP32 | BPF_JGT | BPF_X: 892 case BPF_JMP32 | BPF_JSGT | BPF_K: 893 case BPF_JMP32 | BPF_JSGT | BPF_X: 894 true_cond = COND_GT; 895 goto cond_branch; 896 case BPF_JMP | BPF_JLT | BPF_K: 897 case BPF_JMP | BPF_JLT | BPF_X: 898 case BPF_JMP | BPF_JSLT | BPF_K: 899 case BPF_JMP | BPF_JSLT | BPF_X: 900 case BPF_JMP32 | BPF_JLT | BPF_K: 901 case BPF_JMP32 | BPF_JLT | BPF_X: 902 case BPF_JMP32 | BPF_JSLT | BPF_K: 903 case BPF_JMP32 | BPF_JSLT | BPF_X: 904 true_cond = COND_LT; 905 goto cond_branch; 906 case BPF_JMP | BPF_JGE | BPF_K: 907 case BPF_JMP | BPF_JGE | BPF_X: 908 case BPF_JMP | BPF_JSGE | BPF_K: 909 case BPF_JMP | BPF_JSGE | BPF_X: 910 case BPF_JMP32 | BPF_JGE | BPF_K: 911 case BPF_JMP32 | BPF_JGE | BPF_X: 912 case BPF_JMP32 | BPF_JSGE | BPF_K: 913 case BPF_JMP32 | BPF_JSGE | BPF_X: 914 true_cond = COND_GE; 915 goto cond_branch; 916 case BPF_JMP | BPF_JLE | BPF_K: 917 case BPF_JMP | BPF_JLE | BPF_X: 918 case BPF_JMP | BPF_JSLE | BPF_K: 919 case BPF_JMP | BPF_JSLE | BPF_X: 920 case BPF_JMP32 | BPF_JLE | BPF_K: 921 case BPF_JMP32 | BPF_JLE | BPF_X: 922 case BPF_JMP32 | BPF_JSLE | BPF_K: 923 case BPF_JMP32 | BPF_JSLE | BPF_X: 924 true_cond = COND_LE; 925 goto cond_branch; 926 case BPF_JMP | BPF_JEQ | BPF_K: 927 case BPF_JMP | BPF_JEQ | BPF_X: 928 case BPF_JMP32 | BPF_JEQ | BPF_K: 929 case BPF_JMP32 | BPF_JEQ | BPF_X: 930 true_cond = COND_EQ; 931 goto cond_branch; 932 case BPF_JMP | BPF_JNE | BPF_K: 933 case BPF_JMP | BPF_JNE | BPF_X: 934 case BPF_JMP32 | BPF_JNE | BPF_K: 935 case BPF_JMP32 | BPF_JNE | BPF_X: 936 true_cond = COND_NE; 937 goto cond_branch; 938 case BPF_JMP | BPF_JSET | BPF_K: 939 case BPF_JMP | BPF_JSET | BPF_X: 940 case BPF_JMP32 | BPF_JSET | BPF_K: 941 case BPF_JMP32 | BPF_JSET | BPF_X: 942 true_cond = COND_NE; 943 /* fallthrough; */ 944 945 cond_branch: 946 switch (code) { 947 case BPF_JMP | BPF_JGT | BPF_X: 948 case BPF_JMP | BPF_JLT | BPF_X: 949 case BPF_JMP | BPF_JGE | BPF_X: 950 case BPF_JMP | BPF_JLE | BPF_X: 951 case BPF_JMP | BPF_JEQ | BPF_X: 952 case BPF_JMP | BPF_JNE | BPF_X: 953 /* unsigned comparison */ 954 EMIT(PPC_RAW_CMPLW(dst_reg_h, src_reg_h)); 955 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4); 956 EMIT(PPC_RAW_CMPLW(dst_reg, src_reg)); 957 break; 958 case BPF_JMP32 | BPF_JGT | BPF_X: 959 case BPF_JMP32 | BPF_JLT | BPF_X: 960 case BPF_JMP32 | BPF_JGE | BPF_X: 961 case BPF_JMP32 | BPF_JLE | BPF_X: 962 case BPF_JMP32 | BPF_JEQ | BPF_X: 963 case BPF_JMP32 | BPF_JNE | BPF_X: 964 /* unsigned comparison */ 965 EMIT(PPC_RAW_CMPLW(dst_reg, src_reg)); 966 break; 967 case BPF_JMP | BPF_JSGT | BPF_X: 968 case BPF_JMP | BPF_JSLT | BPF_X: 969 case BPF_JMP | BPF_JSGE | BPF_X: 970 case BPF_JMP | BPF_JSLE | BPF_X: 971 /* signed comparison */ 972 EMIT(PPC_RAW_CMPW(dst_reg_h, src_reg_h)); 973 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4); 974 EMIT(PPC_RAW_CMPLW(dst_reg, src_reg)); 975 break; 976 case BPF_JMP32 | BPF_JSGT | BPF_X: 977 case BPF_JMP32 | BPF_JSLT | BPF_X: 978 case BPF_JMP32 | BPF_JSGE | BPF_X: 979 case BPF_JMP32 | BPF_JSLE | BPF_X: 980 /* signed comparison */ 981 EMIT(PPC_RAW_CMPW(dst_reg, src_reg)); 982 break; 983 case BPF_JMP | BPF_JSET | BPF_X: 984 EMIT(PPC_RAW_AND_DOT(_R0, dst_reg_h, src_reg_h)); 985 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4); 986 EMIT(PPC_RAW_AND_DOT(_R0, dst_reg, src_reg)); 987 break; 988 case BPF_JMP32 | BPF_JSET | BPF_X: { 989 EMIT(PPC_RAW_AND_DOT(_R0, dst_reg, src_reg)); 990 break; 991 case BPF_JMP | BPF_JNE | BPF_K: 992 case BPF_JMP | BPF_JEQ | BPF_K: 993 case BPF_JMP | BPF_JGT | BPF_K: 994 case BPF_JMP | BPF_JLT | BPF_K: 995 case BPF_JMP | BPF_JGE | BPF_K: 996 case BPF_JMP | BPF_JLE | BPF_K: 997 /* 998 * Need sign-extended load, so only positive 999 * values can be used as imm in cmplwi 1000 */ 1001 if (imm >= 0 && imm < 32768) { 1002 EMIT(PPC_RAW_CMPLWI(dst_reg_h, 0)); 1003 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4); 1004 EMIT(PPC_RAW_CMPLWI(dst_reg, imm)); 1005 } else { 1006 /* sign-extending load ... but unsigned comparison */ 1007 PPC_EX32(_R0, imm); 1008 EMIT(PPC_RAW_CMPLW(dst_reg_h, _R0)); 1009 PPC_LI32(_R0, imm); 1010 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4); 1011 EMIT(PPC_RAW_CMPLW(dst_reg, _R0)); 1012 } 1013 break; 1014 case BPF_JMP32 | BPF_JNE | BPF_K: 1015 case BPF_JMP32 | BPF_JEQ | BPF_K: 1016 case BPF_JMP32 | BPF_JGT | BPF_K: 1017 case BPF_JMP32 | BPF_JLT | BPF_K: 1018 case BPF_JMP32 | BPF_JGE | BPF_K: 1019 case BPF_JMP32 | BPF_JLE | BPF_K: 1020 if (imm >= 0 && imm < 65536) { 1021 EMIT(PPC_RAW_CMPLWI(dst_reg, imm)); 1022 } else { 1023 PPC_LI32(_R0, imm); 1024 EMIT(PPC_RAW_CMPLW(dst_reg, _R0)); 1025 } 1026 break; 1027 } 1028 case BPF_JMP | BPF_JSGT | BPF_K: 1029 case BPF_JMP | BPF_JSLT | BPF_K: 1030 case BPF_JMP | BPF_JSGE | BPF_K: 1031 case BPF_JMP | BPF_JSLE | BPF_K: 1032 if (imm >= 0 && imm < 65536) { 1033 EMIT(PPC_RAW_CMPWI(dst_reg_h, imm < 0 ? -1 : 0)); 1034 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4); 1035 EMIT(PPC_RAW_CMPLWI(dst_reg, imm)); 1036 } else { 1037 /* sign-extending load */ 1038 EMIT(PPC_RAW_CMPWI(dst_reg_h, imm < 0 ? -1 : 0)); 1039 PPC_LI32(_R0, imm); 1040 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4); 1041 EMIT(PPC_RAW_CMPLW(dst_reg, _R0)); 1042 } 1043 break; 1044 case BPF_JMP32 | BPF_JSGT | BPF_K: 1045 case BPF_JMP32 | BPF_JSLT | BPF_K: 1046 case BPF_JMP32 | BPF_JSGE | BPF_K: 1047 case BPF_JMP32 | BPF_JSLE | BPF_K: 1048 /* 1049 * signed comparison, so any 16-bit value 1050 * can be used in cmpwi 1051 */ 1052 if (imm >= -32768 && imm < 32768) { 1053 EMIT(PPC_RAW_CMPWI(dst_reg, imm)); 1054 } else { 1055 /* sign-extending load */ 1056 PPC_LI32(_R0, imm); 1057 EMIT(PPC_RAW_CMPW(dst_reg, _R0)); 1058 } 1059 break; 1060 case BPF_JMP | BPF_JSET | BPF_K: 1061 /* andi does not sign-extend the immediate */ 1062 if (imm >= 0 && imm < 32768) { 1063 /* PPC_ANDI is _only/always_ dot-form */ 1064 EMIT(PPC_RAW_ANDI(_R0, dst_reg, imm)); 1065 } else { 1066 PPC_LI32(_R0, imm); 1067 if (imm < 0) { 1068 EMIT(PPC_RAW_CMPWI(dst_reg_h, 0)); 1069 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4); 1070 } 1071 EMIT(PPC_RAW_AND_DOT(_R0, dst_reg, _R0)); 1072 } 1073 break; 1074 case BPF_JMP32 | BPF_JSET | BPF_K: 1075 /* andi does not sign-extend the immediate */ 1076 if (imm >= -32768 && imm < 32768) { 1077 /* PPC_ANDI is _only/always_ dot-form */ 1078 EMIT(PPC_RAW_ANDI(_R0, dst_reg, imm)); 1079 } else { 1080 PPC_LI32(_R0, imm); 1081 EMIT(PPC_RAW_AND_DOT(_R0, dst_reg, _R0)); 1082 } 1083 break; 1084 } 1085 PPC_BCC(true_cond, addrs[i + 1 + off]); 1086 break; 1087 1088 /* 1089 * Tail call 1090 */ 1091 case BPF_JMP | BPF_TAIL_CALL: 1092 ctx->seen |= SEEN_TAILCALL; 1093 bpf_jit_emit_tail_call(image, ctx, addrs[i + 1]); 1094 break; 1095 1096 default: 1097 /* 1098 * The filter contains something cruel & unusual. 1099 * We don't handle it, but also there shouldn't be 1100 * anything missing from our list. 1101 */ 1102 pr_err_ratelimited("eBPF filter opcode %04x (@%d) unsupported\n", code, i); 1103 return -EOPNOTSUPP; 1104 } 1105 if (BPF_CLASS(code) == BPF_ALU && !fp->aux->verifier_zext && 1106 !insn_is_zext(&insn[i + 1])) 1107 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 1108 } 1109 1110 /* Set end-of-body-code address for exit. */ 1111 addrs[i] = ctx->idx * 4; 1112 1113 return 0; 1114 } 1115