1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * bpf_jit.h: BPF JIT compiler for PPC 4 * 5 * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation 6 * 2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> 7 */ 8 #ifndef _BPF_JIT_H 9 #define _BPF_JIT_H 10 11 #ifndef __ASSEMBLY__ 12 13 #include <asm/types.h> 14 #include <asm/ppc-opcode.h> 15 16 #ifdef PPC64_ELF_ABI_v1 17 #define FUNCTION_DESCR_SIZE 24 18 #else 19 #define FUNCTION_DESCR_SIZE 0 20 #endif 21 22 #define PLANT_INSTR(d, idx, instr) \ 23 do { if (d) { (d)[idx] = instr; } idx++; } while (0) 24 #define EMIT(instr) PLANT_INSTR(image, ctx->idx, instr) 25 26 /* Long jump; (unconditional 'branch') */ 27 #define PPC_JMP(dest) EMIT(PPC_INST_BRANCH | \ 28 (((dest) - (ctx->idx * 4)) & 0x03fffffc)) 29 /* "cond" here covers BO:BI fields. */ 30 #define PPC_BCC_SHORT(cond, dest) EMIT(PPC_INST_BRANCH_COND | \ 31 (((cond) & 0x3ff) << 16) | \ 32 (((dest) - (ctx->idx * 4)) & \ 33 0xfffc)) 34 /* Sign-extended 32-bit immediate load */ 35 #define PPC_LI32(d, i) do { \ 36 if ((int)(uintptr_t)(i) >= -32768 && \ 37 (int)(uintptr_t)(i) < 32768) \ 38 EMIT(PPC_RAW_LI(d, i)); \ 39 else { \ 40 EMIT(PPC_RAW_LIS(d, IMM_H(i))); \ 41 if (IMM_L(i)) \ 42 EMIT(PPC_RAW_ORI(d, d, IMM_L(i))); \ 43 } } while(0) 44 45 #ifdef CONFIG_PPC32 46 #define PPC_EX32(r, i) EMIT(PPC_RAW_LI((r), (i) < 0 ? -1 : 0)) 47 #endif 48 49 #define PPC_LI64(d, i) do { \ 50 if ((long)(i) >= -2147483648 && \ 51 (long)(i) < 2147483648) \ 52 PPC_LI32(d, i); \ 53 else { \ 54 if (!((uintptr_t)(i) & 0xffff800000000000ULL)) \ 55 EMIT(PPC_RAW_LI(d, ((uintptr_t)(i) >> 32) & \ 56 0xffff)); \ 57 else { \ 58 EMIT(PPC_RAW_LIS(d, ((uintptr_t)(i) >> 48))); \ 59 if ((uintptr_t)(i) & 0x0000ffff00000000ULL) \ 60 EMIT(PPC_RAW_ORI(d, d, \ 61 ((uintptr_t)(i) >> 32) & 0xffff)); \ 62 } \ 63 EMIT(PPC_RAW_SLDI(d, d, 32)); \ 64 if ((uintptr_t)(i) & 0x00000000ffff0000ULL) \ 65 EMIT(PPC_RAW_ORIS(d, d, \ 66 ((uintptr_t)(i) >> 16) & 0xffff)); \ 67 if ((uintptr_t)(i) & 0x000000000000ffffULL) \ 68 EMIT(PPC_RAW_ORI(d, d, (uintptr_t)(i) & \ 69 0xffff)); \ 70 } } while (0) 71 72 #ifdef CONFIG_PPC64 73 #define PPC_FUNC_ADDR(d,i) do { PPC_LI64(d, i); } while(0) 74 #else 75 #define PPC_FUNC_ADDR(d,i) do { PPC_LI32(d, i); } while(0) 76 #endif 77 78 static inline bool is_nearbranch(int offset) 79 { 80 return (offset < 32768) && (offset >= -32768); 81 } 82 83 /* 84 * The fly in the ointment of code size changing from pass to pass is 85 * avoided by padding the short branch case with a NOP. If code size differs 86 * with different branch reaches we will have the issue of code moving from 87 * one pass to the next and will need a few passes to converge on a stable 88 * state. 89 */ 90 #define PPC_BCC(cond, dest) do { \ 91 if (is_nearbranch((dest) - (ctx->idx * 4))) { \ 92 PPC_BCC_SHORT(cond, dest); \ 93 EMIT(PPC_RAW_NOP()); \ 94 } else { \ 95 /* Flip the 'T or F' bit to invert comparison */ \ 96 PPC_BCC_SHORT(cond ^ COND_CMP_TRUE, (ctx->idx+2)*4); \ 97 PPC_JMP(dest); \ 98 } } while(0) 99 100 /* To create a branch condition, select a bit of cr0... */ 101 #define CR0_LT 0 102 #define CR0_GT 1 103 #define CR0_EQ 2 104 /* ...and modify BO[3] */ 105 #define COND_CMP_TRUE 0x100 106 #define COND_CMP_FALSE 0x000 107 /* Together, they make all required comparisons: */ 108 #define COND_GT (CR0_GT | COND_CMP_TRUE) 109 #define COND_GE (CR0_LT | COND_CMP_FALSE) 110 #define COND_EQ (CR0_EQ | COND_CMP_TRUE) 111 #define COND_NE (CR0_EQ | COND_CMP_FALSE) 112 #define COND_LT (CR0_LT | COND_CMP_TRUE) 113 #define COND_LE (CR0_GT | COND_CMP_FALSE) 114 115 #define SEEN_FUNC 0x20000000 /* might call external helpers */ 116 #define SEEN_STACK 0x40000000 /* uses BPF stack */ 117 #define SEEN_TAILCALL 0x80000000 /* uses tail calls */ 118 119 struct codegen_context { 120 /* 121 * This is used to track register usage as well 122 * as calls to external helpers. 123 * - register usage is tracked with corresponding 124 * bits (r3-r31) 125 * - rest of the bits can be used to track other 126 * things -- for now, we use bits 0 to 2 127 * encoded in SEEN_* macros above 128 */ 129 unsigned int seen; 130 unsigned int idx; 131 unsigned int stack_size; 132 }; 133 134 static inline void bpf_flush_icache(void *start, void *end) 135 { 136 smp_wmb(); /* smp write barrier */ 137 flush_icache_range((unsigned long)start, (unsigned long)end); 138 } 139 140 static inline bool bpf_is_seen_register(struct codegen_context *ctx, int i) 141 { 142 return ctx->seen & (1 << (31 - i)); 143 } 144 145 static inline void bpf_set_seen_register(struct codegen_context *ctx, int i) 146 { 147 ctx->seen |= 1 << (31 - i); 148 } 149 150 void bpf_jit_emit_func_call_rel(u32 *image, struct codegen_context *ctx, u64 func); 151 int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, struct codegen_context *ctx, 152 u32 *addrs, bool extra_pass); 153 void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx); 154 void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx); 155 156 #endif 157 158 #endif 159