1 /* 2 * bpf_jit.h: BPF JIT compiler for PPC 3 * 4 * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation 5 * 2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; version 2 10 * of the License. 11 */ 12 #ifndef _BPF_JIT_H 13 #define _BPF_JIT_H 14 15 #ifndef __ASSEMBLY__ 16 17 #include <asm/types.h> 18 19 #ifdef PPC64_ELF_ABI_v1 20 #define FUNCTION_DESCR_SIZE 24 21 #else 22 #define FUNCTION_DESCR_SIZE 0 23 #endif 24 25 /* 26 * 16-bit immediate helper macros: HA() is for use with sign-extending instrs 27 * (e.g. LD, ADDI). If the bottom 16 bits is "-ve", add another bit into the 28 * top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000). 29 */ 30 #define IMM_H(i) ((uintptr_t)(i)>>16) 31 #define IMM_HA(i) (((uintptr_t)(i)>>16) + \ 32 (((uintptr_t)(i) & 0x8000) >> 15)) 33 #define IMM_L(i) ((uintptr_t)(i) & 0xffff) 34 35 #define PLANT_INSTR(d, idx, instr) \ 36 do { if (d) { (d)[idx] = instr; } idx++; } while (0) 37 #define EMIT(instr) PLANT_INSTR(image, ctx->idx, instr) 38 39 #define PPC_NOP() EMIT(PPC_INST_NOP) 40 #define PPC_BLR() EMIT(PPC_INST_BLR) 41 #define PPC_BLRL() EMIT(PPC_INST_BLRL) 42 #define PPC_MTLR(r) EMIT(PPC_INST_MTLR | ___PPC_RT(r)) 43 #define PPC_BCTR() EMIT(PPC_INST_BCTR) 44 #define PPC_MTCTR(r) EMIT(PPC_INST_MTCTR | ___PPC_RT(r)) 45 #define PPC_ADDI(d, a, i) EMIT(PPC_INST_ADDI | ___PPC_RT(d) | \ 46 ___PPC_RA(a) | IMM_L(i)) 47 #define PPC_MR(d, a) PPC_OR(d, a, a) 48 #define PPC_LI(r, i) PPC_ADDI(r, 0, i) 49 #define PPC_ADDIS(d, a, i) EMIT(PPC_INST_ADDIS | \ 50 ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i)) 51 #define PPC_LIS(r, i) PPC_ADDIS(r, 0, i) 52 #define PPC_STD(r, base, i) EMIT(PPC_INST_STD | ___PPC_RS(r) | \ 53 ___PPC_RA(base) | ((i) & 0xfffc)) 54 #define PPC_STDX(r, base, b) EMIT(PPC_INST_STDX | ___PPC_RS(r) | \ 55 ___PPC_RA(base) | ___PPC_RB(b)) 56 #define PPC_STDU(r, base, i) EMIT(PPC_INST_STDU | ___PPC_RS(r) | \ 57 ___PPC_RA(base) | ((i) & 0xfffc)) 58 #define PPC_STW(r, base, i) EMIT(PPC_INST_STW | ___PPC_RS(r) | \ 59 ___PPC_RA(base) | IMM_L(i)) 60 #define PPC_STWU(r, base, i) EMIT(PPC_INST_STWU | ___PPC_RS(r) | \ 61 ___PPC_RA(base) | IMM_L(i)) 62 #define PPC_STH(r, base, i) EMIT(PPC_INST_STH | ___PPC_RS(r) | \ 63 ___PPC_RA(base) | IMM_L(i)) 64 #define PPC_STB(r, base, i) EMIT(PPC_INST_STB | ___PPC_RS(r) | \ 65 ___PPC_RA(base) | IMM_L(i)) 66 67 #define PPC_LBZ(r, base, i) EMIT(PPC_INST_LBZ | ___PPC_RT(r) | \ 68 ___PPC_RA(base) | IMM_L(i)) 69 #define PPC_LD(r, base, i) EMIT(PPC_INST_LD | ___PPC_RT(r) | \ 70 ___PPC_RA(base) | ((i) & 0xfffc)) 71 #define PPC_LDX(r, base, b) EMIT(PPC_INST_LDX | ___PPC_RT(r) | \ 72 ___PPC_RA(base) | ___PPC_RB(b)) 73 #define PPC_LWZ(r, base, i) EMIT(PPC_INST_LWZ | ___PPC_RT(r) | \ 74 ___PPC_RA(base) | IMM_L(i)) 75 #define PPC_LHZ(r, base, i) EMIT(PPC_INST_LHZ | ___PPC_RT(r) | \ 76 ___PPC_RA(base) | IMM_L(i)) 77 #define PPC_LHBRX(r, base, b) EMIT(PPC_INST_LHBRX | ___PPC_RT(r) | \ 78 ___PPC_RA(base) | ___PPC_RB(b)) 79 #define PPC_LDBRX(r, base, b) EMIT(PPC_INST_LDBRX | ___PPC_RT(r) | \ 80 ___PPC_RA(base) | ___PPC_RB(b)) 81 82 #define PPC_BPF_LDARX(t, a, b, eh) EMIT(PPC_INST_LDARX | ___PPC_RT(t) | \ 83 ___PPC_RA(a) | ___PPC_RB(b) | \ 84 __PPC_EH(eh)) 85 #define PPC_BPF_LWARX(t, a, b, eh) EMIT(PPC_INST_LWARX | ___PPC_RT(t) | \ 86 ___PPC_RA(a) | ___PPC_RB(b) | \ 87 __PPC_EH(eh)) 88 #define PPC_BPF_STWCX(s, a, b) EMIT(PPC_INST_STWCX | ___PPC_RS(s) | \ 89 ___PPC_RA(a) | ___PPC_RB(b)) 90 #define PPC_BPF_STDCX(s, a, b) EMIT(PPC_INST_STDCX | ___PPC_RS(s) | \ 91 ___PPC_RA(a) | ___PPC_RB(b)) 92 #define PPC_CMPWI(a, i) EMIT(PPC_INST_CMPWI | ___PPC_RA(a) | IMM_L(i)) 93 #define PPC_CMPDI(a, i) EMIT(PPC_INST_CMPDI | ___PPC_RA(a) | IMM_L(i)) 94 #define PPC_CMPW(a, b) EMIT(PPC_INST_CMPW | ___PPC_RA(a) | \ 95 ___PPC_RB(b)) 96 #define PPC_CMPD(a, b) EMIT(PPC_INST_CMPD | ___PPC_RA(a) | \ 97 ___PPC_RB(b)) 98 #define PPC_CMPLWI(a, i) EMIT(PPC_INST_CMPLWI | ___PPC_RA(a) | IMM_L(i)) 99 #define PPC_CMPLDI(a, i) EMIT(PPC_INST_CMPLDI | ___PPC_RA(a) | IMM_L(i)) 100 #define PPC_CMPLW(a, b) EMIT(PPC_INST_CMPLW | ___PPC_RA(a) | \ 101 ___PPC_RB(b)) 102 #define PPC_CMPLD(a, b) EMIT(PPC_INST_CMPLD | ___PPC_RA(a) | \ 103 ___PPC_RB(b)) 104 105 #define PPC_SUB(d, a, b) EMIT(PPC_INST_SUB | ___PPC_RT(d) | \ 106 ___PPC_RB(a) | ___PPC_RA(b)) 107 #define PPC_ADD(d, a, b) EMIT(PPC_INST_ADD | ___PPC_RT(d) | \ 108 ___PPC_RA(a) | ___PPC_RB(b)) 109 #define PPC_MULD(d, a, b) EMIT(PPC_INST_MULLD | ___PPC_RT(d) | \ 110 ___PPC_RA(a) | ___PPC_RB(b)) 111 #define PPC_MULW(d, a, b) EMIT(PPC_INST_MULLW | ___PPC_RT(d) | \ 112 ___PPC_RA(a) | ___PPC_RB(b)) 113 #define PPC_MULHWU(d, a, b) EMIT(PPC_INST_MULHWU | ___PPC_RT(d) | \ 114 ___PPC_RA(a) | ___PPC_RB(b)) 115 #define PPC_MULI(d, a, i) EMIT(PPC_INST_MULLI | ___PPC_RT(d) | \ 116 ___PPC_RA(a) | IMM_L(i)) 117 #define PPC_DIVWU(d, a, b) EMIT(PPC_INST_DIVWU | ___PPC_RT(d) | \ 118 ___PPC_RA(a) | ___PPC_RB(b)) 119 #define PPC_DIVD(d, a, b) EMIT(PPC_INST_DIVD | ___PPC_RT(d) | \ 120 ___PPC_RA(a) | ___PPC_RB(b)) 121 #define PPC_AND(d, a, b) EMIT(PPC_INST_AND | ___PPC_RA(d) | \ 122 ___PPC_RS(a) | ___PPC_RB(b)) 123 #define PPC_ANDI(d, a, i) EMIT(PPC_INST_ANDI | ___PPC_RA(d) | \ 124 ___PPC_RS(a) | IMM_L(i)) 125 #define PPC_AND_DOT(d, a, b) EMIT(PPC_INST_ANDDOT | ___PPC_RA(d) | \ 126 ___PPC_RS(a) | ___PPC_RB(b)) 127 #define PPC_OR(d, a, b) EMIT(PPC_INST_OR | ___PPC_RA(d) | \ 128 ___PPC_RS(a) | ___PPC_RB(b)) 129 #define PPC_MR(d, a) PPC_OR(d, a, a) 130 #define PPC_ORI(d, a, i) EMIT(PPC_INST_ORI | ___PPC_RA(d) | \ 131 ___PPC_RS(a) | IMM_L(i)) 132 #define PPC_ORIS(d, a, i) EMIT(PPC_INST_ORIS | ___PPC_RA(d) | \ 133 ___PPC_RS(a) | IMM_L(i)) 134 #define PPC_XOR(d, a, b) EMIT(PPC_INST_XOR | ___PPC_RA(d) | \ 135 ___PPC_RS(a) | ___PPC_RB(b)) 136 #define PPC_XORI(d, a, i) EMIT(PPC_INST_XORI | ___PPC_RA(d) | \ 137 ___PPC_RS(a) | IMM_L(i)) 138 #define PPC_XORIS(d, a, i) EMIT(PPC_INST_XORIS | ___PPC_RA(d) | \ 139 ___PPC_RS(a) | IMM_L(i)) 140 #define PPC_EXTSW(d, a) EMIT(PPC_INST_EXTSW | ___PPC_RA(d) | \ 141 ___PPC_RS(a)) 142 #define PPC_SLW(d, a, s) EMIT(PPC_INST_SLW | ___PPC_RA(d) | \ 143 ___PPC_RS(a) | ___PPC_RB(s)) 144 #define PPC_SLD(d, a, s) EMIT(PPC_INST_SLD | ___PPC_RA(d) | \ 145 ___PPC_RS(a) | ___PPC_RB(s)) 146 #define PPC_SRW(d, a, s) EMIT(PPC_INST_SRW | ___PPC_RA(d) | \ 147 ___PPC_RS(a) | ___PPC_RB(s)) 148 #define PPC_SRAW(d, a, s) EMIT(PPC_INST_SRAW | ___PPC_RA(d) | \ 149 ___PPC_RS(a) | ___PPC_RB(s)) 150 #define PPC_SRAWI(d, a, i) EMIT(PPC_INST_SRAWI | ___PPC_RA(d) | \ 151 ___PPC_RS(a) | __PPC_SH(i)) 152 #define PPC_SRD(d, a, s) EMIT(PPC_INST_SRD | ___PPC_RA(d) | \ 153 ___PPC_RS(a) | ___PPC_RB(s)) 154 #define PPC_SRAD(d, a, s) EMIT(PPC_INST_SRAD | ___PPC_RA(d) | \ 155 ___PPC_RS(a) | ___PPC_RB(s)) 156 #define PPC_SRADI(d, a, i) EMIT(PPC_INST_SRADI | ___PPC_RA(d) | \ 157 ___PPC_RS(a) | __PPC_SH64(i)) 158 #define PPC_RLWINM(d, a, i, mb, me) EMIT(PPC_INST_RLWINM | ___PPC_RA(d) | \ 159 ___PPC_RS(a) | __PPC_SH(i) | \ 160 __PPC_MB(mb) | __PPC_ME(me)) 161 #define PPC_RLWINM_DOT(d, a, i, mb, me) EMIT(PPC_INST_RLWINM_DOT | \ 162 ___PPC_RA(d) | ___PPC_RS(a) | \ 163 __PPC_SH(i) | __PPC_MB(mb) | \ 164 __PPC_ME(me)) 165 #define PPC_RLWIMI(d, a, i, mb, me) EMIT(PPC_INST_RLWIMI | ___PPC_RA(d) | \ 166 ___PPC_RS(a) | __PPC_SH(i) | \ 167 __PPC_MB(mb) | __PPC_ME(me)) 168 #define PPC_RLDICL(d, a, i, mb) EMIT(PPC_INST_RLDICL | ___PPC_RA(d) | \ 169 ___PPC_RS(a) | __PPC_SH64(i) | \ 170 __PPC_MB64(mb)) 171 #define PPC_RLDICR(d, a, i, me) EMIT(PPC_INST_RLDICR | ___PPC_RA(d) | \ 172 ___PPC_RS(a) | __PPC_SH64(i) | \ 173 __PPC_ME64(me)) 174 175 /* slwi = rlwinm Rx, Ry, n, 0, 31-n */ 176 #define PPC_SLWI(d, a, i) PPC_RLWINM(d, a, i, 0, 31-(i)) 177 /* srwi = rlwinm Rx, Ry, 32-n, n, 31 */ 178 #define PPC_SRWI(d, a, i) PPC_RLWINM(d, a, 32-(i), i, 31) 179 /* sldi = rldicr Rx, Ry, n, 63-n */ 180 #define PPC_SLDI(d, a, i) PPC_RLDICR(d, a, i, 63-(i)) 181 /* sldi = rldicl Rx, Ry, 64-n, n */ 182 #define PPC_SRDI(d, a, i) PPC_RLDICL(d, a, 64-(i), i) 183 184 #define PPC_NEG(d, a) EMIT(PPC_INST_NEG | ___PPC_RT(d) | ___PPC_RA(a)) 185 186 /* Long jump; (unconditional 'branch') */ 187 #define PPC_JMP(dest) EMIT(PPC_INST_BRANCH | \ 188 (((dest) - (ctx->idx * 4)) & 0x03fffffc)) 189 /* "cond" here covers BO:BI fields. */ 190 #define PPC_BCC_SHORT(cond, dest) EMIT(PPC_INST_BRANCH_COND | \ 191 (((cond) & 0x3ff) << 16) | \ 192 (((dest) - (ctx->idx * 4)) & \ 193 0xfffc)) 194 /* Sign-extended 32-bit immediate load */ 195 #define PPC_LI32(d, i) do { \ 196 if ((int)(uintptr_t)(i) >= -32768 && \ 197 (int)(uintptr_t)(i) < 32768) \ 198 PPC_LI(d, i); \ 199 else { \ 200 PPC_LIS(d, IMM_H(i)); \ 201 if (IMM_L(i)) \ 202 PPC_ORI(d, d, IMM_L(i)); \ 203 } } while(0) 204 205 #define PPC_LI64(d, i) do { \ 206 if ((long)(i) >= -2147483648 && \ 207 (long)(i) < 2147483648) \ 208 PPC_LI32(d, i); \ 209 else { \ 210 if (!((uintptr_t)(i) & 0xffff800000000000ULL)) \ 211 PPC_LI(d, ((uintptr_t)(i) >> 32) & 0xffff); \ 212 else { \ 213 PPC_LIS(d, ((uintptr_t)(i) >> 48)); \ 214 if ((uintptr_t)(i) & 0x0000ffff00000000ULL) \ 215 PPC_ORI(d, d, \ 216 ((uintptr_t)(i) >> 32) & 0xffff); \ 217 } \ 218 PPC_SLDI(d, d, 32); \ 219 if ((uintptr_t)(i) & 0x00000000ffff0000ULL) \ 220 PPC_ORIS(d, d, \ 221 ((uintptr_t)(i) >> 16) & 0xffff); \ 222 if ((uintptr_t)(i) & 0x000000000000ffffULL) \ 223 PPC_ORI(d, d, (uintptr_t)(i) & 0xffff); \ 224 } } while (0) 225 226 #ifdef CONFIG_PPC64 227 #define PPC_FUNC_ADDR(d,i) do { PPC_LI64(d, i); } while(0) 228 #else 229 #define PPC_FUNC_ADDR(d,i) do { PPC_LI32(d, i); } while(0) 230 #endif 231 232 static inline bool is_nearbranch(int offset) 233 { 234 return (offset < 32768) && (offset >= -32768); 235 } 236 237 /* 238 * The fly in the ointment of code size changing from pass to pass is 239 * avoided by padding the short branch case with a NOP. If code size differs 240 * with different branch reaches we will have the issue of code moving from 241 * one pass to the next and will need a few passes to converge on a stable 242 * state. 243 */ 244 #define PPC_BCC(cond, dest) do { \ 245 if (is_nearbranch((dest) - (ctx->idx * 4))) { \ 246 PPC_BCC_SHORT(cond, dest); \ 247 PPC_NOP(); \ 248 } else { \ 249 /* Flip the 'T or F' bit to invert comparison */ \ 250 PPC_BCC_SHORT(cond ^ COND_CMP_TRUE, (ctx->idx+2)*4); \ 251 PPC_JMP(dest); \ 252 } } while(0) 253 254 /* To create a branch condition, select a bit of cr0... */ 255 #define CR0_LT 0 256 #define CR0_GT 1 257 #define CR0_EQ 2 258 /* ...and modify BO[3] */ 259 #define COND_CMP_TRUE 0x100 260 #define COND_CMP_FALSE 0x000 261 /* Together, they make all required comparisons: */ 262 #define COND_GT (CR0_GT | COND_CMP_TRUE) 263 #define COND_GE (CR0_LT | COND_CMP_FALSE) 264 #define COND_EQ (CR0_EQ | COND_CMP_TRUE) 265 #define COND_NE (CR0_EQ | COND_CMP_FALSE) 266 #define COND_LT (CR0_LT | COND_CMP_TRUE) 267 #define COND_LE (CR0_GT | COND_CMP_FALSE) 268 269 #endif 270 271 #endif 272