1b886d83cSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 26ac0ba5aSNaveen N. Rao /* 36ac0ba5aSNaveen N. Rao * bpf_jit.h: BPF JIT compiler for PPC 40ca87f05SMatt Evans * 50ca87f05SMatt Evans * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation 6156d0e29SNaveen N. Rao * 2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> 70ca87f05SMatt Evans */ 80ca87f05SMatt Evans #ifndef _BPF_JIT_H 90ca87f05SMatt Evans #define _BPF_JIT_H 100ca87f05SMatt Evans 110ca87f05SMatt Evans #ifndef __ASSEMBLY__ 120ca87f05SMatt Evans 13156d0e29SNaveen N. Rao #include <asm/types.h> 1406541865SBalamuruhan S #include <asm/ppc-opcode.h> 15156d0e29SNaveen N. Rao 16156d0e29SNaveen N. Rao #ifdef PPC64_ELF_ABI_v1 170ca87f05SMatt Evans #define FUNCTION_DESCR_SIZE 24 1809ca5ab2SDenis Kirjanov #else 1909ca5ab2SDenis Kirjanov #define FUNCTION_DESCR_SIZE 0 2009ca5ab2SDenis Kirjanov #endif 210ca87f05SMatt Evans 220ca87f05SMatt Evans #define PLANT_INSTR(d, idx, instr) \ 230ca87f05SMatt Evans do { if (d) { (d)[idx] = instr; } idx++; } while (0) 240ca87f05SMatt Evans #define EMIT(instr) PLANT_INSTR(image, ctx->idx, instr) 250ca87f05SMatt Evans 260ca87f05SMatt Evans /* Long jump; (unconditional 'branch') */ 273832ba4eSNaveen N. Rao #define PPC_JMP(dest) \ 283832ba4eSNaveen N. Rao do { \ 293832ba4eSNaveen N. Rao long offset = (long)(dest) - (ctx->idx * 4); \ 303832ba4eSNaveen N. Rao if (!is_offset_in_branch_range(offset)) { \ 313832ba4eSNaveen N. Rao pr_err_ratelimited("Branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx); \ 323832ba4eSNaveen N. Rao return -ERANGE; \ 333832ba4eSNaveen N. Rao } \ 343832ba4eSNaveen N. Rao EMIT(PPC_INST_BRANCH | (offset & 0x03fffffc)); \ 353832ba4eSNaveen N. Rao } while (0) 363832ba4eSNaveen N. Rao 37ee7c3ec3SChristophe Leroy /* blr; (unconditional 'branch' with link) to absolute address */ 38ee7c3ec3SChristophe Leroy #define PPC_BL_ABS(dest) EMIT(PPC_INST_BL | \ 39ee7c3ec3SChristophe Leroy (((dest) - (unsigned long)(image + ctx->idx)) & 0x03fffffc)) 400ca87f05SMatt Evans /* "cond" here covers BO:BI fields. */ 413832ba4eSNaveen N. Rao #define PPC_BCC_SHORT(cond, dest) \ 423832ba4eSNaveen N. Rao do { \ 433832ba4eSNaveen N. Rao long offset = (long)(dest) - (ctx->idx * 4); \ 443832ba4eSNaveen N. Rao if (!is_offset_in_cond_branch_range(offset)) { \ 453832ba4eSNaveen N. Rao pr_err_ratelimited("Conditional branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx); \ 463832ba4eSNaveen N. Rao return -ERANGE; \ 473832ba4eSNaveen N. Rao } \ 483832ba4eSNaveen N. Rao EMIT(PPC_INST_BRANCH_COND | (((cond) & 0x3ff) << 16) | (offset & 0xfffc)); \ 493832ba4eSNaveen N. Rao } while (0) 503832ba4eSNaveen N. Rao 51aaf2f7e0SNaveen N. Rao /* Sign-extended 32-bit immediate load */ 52aaf2f7e0SNaveen N. Rao #define PPC_LI32(d, i) do { \ 53aaf2f7e0SNaveen N. Rao if ((int)(uintptr_t)(i) >= -32768 && \ 54aaf2f7e0SNaveen N. Rao (int)(uintptr_t)(i) < 32768) \ 553a181237SBalamuruhan S EMIT(PPC_RAW_LI(d, i)); \ 56aaf2f7e0SNaveen N. Rao else { \ 573a181237SBalamuruhan S EMIT(PPC_RAW_LIS(d, IMM_H(i))); \ 58aaf2f7e0SNaveen N. Rao if (IMM_L(i)) \ 593a181237SBalamuruhan S EMIT(PPC_RAW_ORI(d, d, IMM_L(i))); \ 600ca87f05SMatt Evans } } while(0) 61aaf2f7e0SNaveen N. Rao 6251c66ad8SChristophe Leroy #ifdef CONFIG_PPC32 6351c66ad8SChristophe Leroy #define PPC_EX32(r, i) EMIT(PPC_RAW_LI((r), (i) < 0 ? -1 : 0)) 6451c66ad8SChristophe Leroy #endif 6551c66ad8SChristophe Leroy 660ca87f05SMatt Evans #define PPC_LI64(d, i) do { \ 67b1a05787SNaveen N. Rao if ((long)(i) >= -2147483648 && \ 68b1a05787SNaveen N. Rao (long)(i) < 2147483648) \ 690ca87f05SMatt Evans PPC_LI32(d, i); \ 700ca87f05SMatt Evans else { \ 71b1a05787SNaveen N. Rao if (!((uintptr_t)(i) & 0xffff800000000000ULL)) \ 723a181237SBalamuruhan S EMIT(PPC_RAW_LI(d, ((uintptr_t)(i) >> 32) & \ 733a181237SBalamuruhan S 0xffff)); \ 74b1a05787SNaveen N. Rao else { \ 753a181237SBalamuruhan S EMIT(PPC_RAW_LIS(d, ((uintptr_t)(i) >> 48))); \ 760ca87f05SMatt Evans if ((uintptr_t)(i) & 0x0000ffff00000000ULL) \ 773a181237SBalamuruhan S EMIT(PPC_RAW_ORI(d, d, \ 783a181237SBalamuruhan S ((uintptr_t)(i) >> 32) & 0xffff)); \ 79b1a05787SNaveen N. Rao } \ 803a181237SBalamuruhan S EMIT(PPC_RAW_SLDI(d, d, 32)); \ 810ca87f05SMatt Evans if ((uintptr_t)(i) & 0x00000000ffff0000ULL) \ 823a181237SBalamuruhan S EMIT(PPC_RAW_ORIS(d, d, \ 833a181237SBalamuruhan S ((uintptr_t)(i) >> 16) & 0xffff)); \ 840ca87f05SMatt Evans if ((uintptr_t)(i) & 0x000000000000ffffULL) \ 853a181237SBalamuruhan S EMIT(PPC_RAW_ORI(d, d, (uintptr_t)(i) & \ 863a181237SBalamuruhan S 0xffff)); \ 87b1a05787SNaveen N. Rao } } while (0) 880ca87f05SMatt Evans 8909ca5ab2SDenis Kirjanov #ifdef CONFIG_PPC64 9009ca5ab2SDenis Kirjanov #define PPC_FUNC_ADDR(d,i) do { PPC_LI64(d, i); } while(0) 9109ca5ab2SDenis Kirjanov #else 9209ca5ab2SDenis Kirjanov #define PPC_FUNC_ADDR(d,i) do { PPC_LI32(d, i); } while(0) 9309ca5ab2SDenis Kirjanov #endif 9409ca5ab2SDenis Kirjanov 950ca87f05SMatt Evans /* 960ca87f05SMatt Evans * The fly in the ointment of code size changing from pass to pass is 970ca87f05SMatt Evans * avoided by padding the short branch case with a NOP. If code size differs 980ca87f05SMatt Evans * with different branch reaches we will have the issue of code moving from 990ca87f05SMatt Evans * one pass to the next and will need a few passes to converge on a stable 1000ca87f05SMatt Evans * state. 1010ca87f05SMatt Evans */ 1020ca87f05SMatt Evans #define PPC_BCC(cond, dest) do { \ 1034549c3eaSNaveen N. Rao if (is_offset_in_cond_branch_range((long)(dest) - (ctx->idx * 4))) { \ 1040ca87f05SMatt Evans PPC_BCC_SHORT(cond, dest); \ 1053a181237SBalamuruhan S EMIT(PPC_RAW_NOP()); \ 1060ca87f05SMatt Evans } else { \ 1070ca87f05SMatt Evans /* Flip the 'T or F' bit to invert comparison */ \ 1080ca87f05SMatt Evans PPC_BCC_SHORT(cond ^ COND_CMP_TRUE, (ctx->idx+2)*4); \ 1090ca87f05SMatt Evans PPC_JMP(dest); \ 1100ca87f05SMatt Evans } } while(0) 1110ca87f05SMatt Evans 1120ca87f05SMatt Evans /* To create a branch condition, select a bit of cr0... */ 1130ca87f05SMatt Evans #define CR0_LT 0 1140ca87f05SMatt Evans #define CR0_GT 1 1150ca87f05SMatt Evans #define CR0_EQ 2 1160ca87f05SMatt Evans /* ...and modify BO[3] */ 1170ca87f05SMatt Evans #define COND_CMP_TRUE 0x100 1180ca87f05SMatt Evans #define COND_CMP_FALSE 0x000 1190ca87f05SMatt Evans /* Together, they make all required comparisons: */ 1200ca87f05SMatt Evans #define COND_GT (CR0_GT | COND_CMP_TRUE) 1210ca87f05SMatt Evans #define COND_GE (CR0_LT | COND_CMP_FALSE) 1220ca87f05SMatt Evans #define COND_EQ (CR0_EQ | COND_CMP_TRUE) 1230ca87f05SMatt Evans #define COND_NE (CR0_EQ | COND_CMP_FALSE) 1240ca87f05SMatt Evans #define COND_LT (CR0_LT | COND_CMP_TRUE) 12520dbf5ccSDaniel Borkmann #define COND_LE (CR0_GT | COND_CMP_FALSE) 1260ca87f05SMatt Evans 127c426810fSChristophe Leroy #define SEEN_FUNC 0x20000000 /* might call external helpers */ 128*c9ce7c36SRavi Bangoria #define SEEN_TAILCALL 0x40000000 /* uses tail calls */ 129f1b1583dSChristophe Leroy 13040272035SChristophe Leroy #define SEEN_VREG_MASK 0x1ff80000 /* Volatile registers r3-r12 */ 13140272035SChristophe Leroy #define SEEN_NVREG_MASK 0x0003ffff /* Non volatile registers r14-r31 */ 13240272035SChristophe Leroy 13340272035SChristophe Leroy #ifdef CONFIG_PPC64 13440272035SChristophe Leroy extern const int b2p[MAX_BPF_JIT_REG + 2]; 13540272035SChristophe Leroy #else 13640272035SChristophe Leroy extern const int b2p[MAX_BPF_JIT_REG + 1]; 13740272035SChristophe Leroy #endif 13840272035SChristophe Leroy 139f1b1583dSChristophe Leroy struct codegen_context { 140f1b1583dSChristophe Leroy /* 141f1b1583dSChristophe Leroy * This is used to track register usage as well 142f1b1583dSChristophe Leroy * as calls to external helpers. 143f1b1583dSChristophe Leroy * - register usage is tracked with corresponding 144c426810fSChristophe Leroy * bits (r3-r31) 145f1b1583dSChristophe Leroy * - rest of the bits can be used to track other 146c426810fSChristophe Leroy * things -- for now, we use bits 0 to 2 147f1b1583dSChristophe Leroy * encoded in SEEN_* macros above 148f1b1583dSChristophe Leroy */ 149f1b1583dSChristophe Leroy unsigned int seen; 150f1b1583dSChristophe Leroy unsigned int idx; 151f1b1583dSChristophe Leroy unsigned int stack_size; 15240272035SChristophe Leroy int b2p[ARRAY_SIZE(b2p)]; 153f1b1583dSChristophe Leroy }; 154f1b1583dSChristophe Leroy 155f1b1583dSChristophe Leroy static inline void bpf_flush_icache(void *start, void *end) 156f1b1583dSChristophe Leroy { 157f1b1583dSChristophe Leroy smp_wmb(); /* smp write barrier */ 158f1b1583dSChristophe Leroy flush_icache_range((unsigned long)start, (unsigned long)end); 159f1b1583dSChristophe Leroy } 160f1b1583dSChristophe Leroy 161f1b1583dSChristophe Leroy static inline bool bpf_is_seen_register(struct codegen_context *ctx, int i) 162f1b1583dSChristophe Leroy { 163f1b1583dSChristophe Leroy return ctx->seen & (1 << (31 - i)); 164f1b1583dSChristophe Leroy } 165f1b1583dSChristophe Leroy 166f1b1583dSChristophe Leroy static inline void bpf_set_seen_register(struct codegen_context *ctx, int i) 167f1b1583dSChristophe Leroy { 168f1b1583dSChristophe Leroy ctx->seen |= 1 << (31 - i); 169f1b1583dSChristophe Leroy } 170f1b1583dSChristophe Leroy 17140272035SChristophe Leroy static inline void bpf_clear_seen_register(struct codegen_context *ctx, int i) 17240272035SChristophe Leroy { 17340272035SChristophe Leroy ctx->seen &= ~(1 << (31 - i)); 17440272035SChristophe Leroy } 17540272035SChristophe Leroy 1764ea76e90SChristophe Leroy void bpf_jit_emit_func_call_rel(u32 *image, struct codegen_context *ctx, u64 func); 1774ea76e90SChristophe Leroy int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, struct codegen_context *ctx, 1784ea76e90SChristophe Leroy u32 *addrs, bool extra_pass); 1794ea76e90SChristophe Leroy void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx); 1804ea76e90SChristophe Leroy void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx); 18140272035SChristophe Leroy void bpf_jit_realloc_regs(struct codegen_context *ctx); 1824ea76e90SChristophe Leroy 1830ca87f05SMatt Evans #endif 1840ca87f05SMatt Evans 1850ca87f05SMatt Evans #endif 186