16ac0ba5aSNaveen N. Rao /* 26ac0ba5aSNaveen N. Rao * bpf_jit.h: BPF JIT compiler for PPC 30ca87f05SMatt Evans * 40ca87f05SMatt Evans * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation 50ca87f05SMatt Evans * 60ca87f05SMatt Evans * This program is free software; you can redistribute it and/or 70ca87f05SMatt Evans * modify it under the terms of the GNU General Public License 80ca87f05SMatt Evans * as published by the Free Software Foundation; version 2 90ca87f05SMatt Evans * of the License. 100ca87f05SMatt Evans */ 110ca87f05SMatt Evans #ifndef _BPF_JIT_H 120ca87f05SMatt Evans #define _BPF_JIT_H 130ca87f05SMatt Evans 140ca87f05SMatt Evans #ifndef __ASSEMBLY__ 150ca87f05SMatt Evans 1609ca5ab2SDenis Kirjanov #ifdef CONFIG_PPC64 170ca87f05SMatt Evans #define FUNCTION_DESCR_SIZE 24 1809ca5ab2SDenis Kirjanov #else 1909ca5ab2SDenis Kirjanov #define FUNCTION_DESCR_SIZE 0 2009ca5ab2SDenis Kirjanov #endif 210ca87f05SMatt Evans 220ca87f05SMatt Evans /* 230ca87f05SMatt Evans * 16-bit immediate helper macros: HA() is for use with sign-extending instrs 240ca87f05SMatt Evans * (e.g. LD, ADDI). If the bottom 16 bits is "-ve", add another bit into the 250ca87f05SMatt Evans * top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000). 260ca87f05SMatt Evans */ 270ca87f05SMatt Evans #define IMM_H(i) ((uintptr_t)(i)>>16) 280ca87f05SMatt Evans #define IMM_HA(i) (((uintptr_t)(i)>>16) + \ 290ca87f05SMatt Evans (((uintptr_t)(i) & 0x8000) >> 15)) 300ca87f05SMatt Evans #define IMM_L(i) ((uintptr_t)(i) & 0xffff) 310ca87f05SMatt Evans 320ca87f05SMatt Evans #define PLANT_INSTR(d, idx, instr) \ 330ca87f05SMatt Evans do { if (d) { (d)[idx] = instr; } idx++; } while (0) 340ca87f05SMatt Evans #define EMIT(instr) PLANT_INSTR(image, ctx->idx, instr) 350ca87f05SMatt Evans 360ca87f05SMatt Evans #define PPC_NOP() EMIT(PPC_INST_NOP) 370ca87f05SMatt Evans #define PPC_BLR() EMIT(PPC_INST_BLR) 380ca87f05SMatt Evans #define PPC_BLRL() EMIT(PPC_INST_BLRL) 39cdaade71SMichael Neuling #define PPC_MTLR(r) EMIT(PPC_INST_MTLR | ___PPC_RT(r)) 40cdaade71SMichael Neuling #define PPC_ADDI(d, a, i) EMIT(PPC_INST_ADDI | ___PPC_RT(d) | \ 41cdaade71SMichael Neuling ___PPC_RA(a) | IMM_L(i)) 420ca87f05SMatt Evans #define PPC_MR(d, a) PPC_OR(d, a, a) 430ca87f05SMatt Evans #define PPC_LI(r, i) PPC_ADDI(r, 0, i) 440ca87f05SMatt Evans #define PPC_ADDIS(d, a, i) EMIT(PPC_INST_ADDIS | \ 45cef1e8cdSNaveen N. Rao ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i)) 460ca87f05SMatt Evans #define PPC_LIS(r, i) PPC_ADDIS(r, 0, i) 47cdaade71SMichael Neuling #define PPC_STD(r, base, i) EMIT(PPC_INST_STD | ___PPC_RS(r) | \ 48cdaade71SMichael Neuling ___PPC_RA(base) | ((i) & 0xfffc)) 4909ca5ab2SDenis Kirjanov #define PPC_STDU(r, base, i) EMIT(PPC_INST_STDU | ___PPC_RS(r) | \ 5009ca5ab2SDenis Kirjanov ___PPC_RA(base) | ((i) & 0xfffc)) 5109ca5ab2SDenis Kirjanov #define PPC_STW(r, base, i) EMIT(PPC_INST_STW | ___PPC_RS(r) | \ 52cef1e8cdSNaveen N. Rao ___PPC_RA(base) | IMM_L(i)) 5309ca5ab2SDenis Kirjanov #define PPC_STWU(r, base, i) EMIT(PPC_INST_STWU | ___PPC_RS(r) | \ 54cef1e8cdSNaveen N. Rao ___PPC_RA(base) | IMM_L(i)) 554e235761SDenis Kirjanov 564e235761SDenis Kirjanov #define PPC_LBZ(r, base, i) EMIT(PPC_INST_LBZ | ___PPC_RT(r) | \ 574e235761SDenis Kirjanov ___PPC_RA(base) | IMM_L(i)) 58cdaade71SMichael Neuling #define PPC_LD(r, base, i) EMIT(PPC_INST_LD | ___PPC_RT(r) | \ 59cdaade71SMichael Neuling ___PPC_RA(base) | IMM_L(i)) 60cdaade71SMichael Neuling #define PPC_LWZ(r, base, i) EMIT(PPC_INST_LWZ | ___PPC_RT(r) | \ 61cdaade71SMichael Neuling ___PPC_RA(base) | IMM_L(i)) 62cdaade71SMichael Neuling #define PPC_LHZ(r, base, i) EMIT(PPC_INST_LHZ | ___PPC_RT(r) | \ 63cdaade71SMichael Neuling ___PPC_RA(base) | IMM_L(i)) 649c662cadSPhilippe Bergheaud #define PPC_LHBRX(r, base, b) EMIT(PPC_INST_LHBRX | ___PPC_RT(r) | \ 659c662cadSPhilippe Bergheaud ___PPC_RA(base) | ___PPC_RB(b)) 6609ca5ab2SDenis Kirjanov 6709ca5ab2SDenis Kirjanov #ifdef CONFIG_PPC64 6809ca5ab2SDenis Kirjanov #define PPC_BPF_LL(r, base, i) do { PPC_LD(r, base, i); } while(0) 6909ca5ab2SDenis Kirjanov #define PPC_BPF_STL(r, base, i) do { PPC_STD(r, base, i); } while(0) 7009ca5ab2SDenis Kirjanov #define PPC_BPF_STLU(r, base, i) do { PPC_STDU(r, base, i); } while(0) 7109ca5ab2SDenis Kirjanov #else 7209ca5ab2SDenis Kirjanov #define PPC_BPF_LL(r, base, i) do { PPC_LWZ(r, base, i); } while(0) 7309ca5ab2SDenis Kirjanov #define PPC_BPF_STL(r, base, i) do { PPC_STW(r, base, i); } while(0) 7409ca5ab2SDenis Kirjanov #define PPC_BPF_STLU(r, base, i) do { PPC_STWU(r, base, i); } while(0) 7509ca5ab2SDenis Kirjanov #endif 7609ca5ab2SDenis Kirjanov 77cdaade71SMichael Neuling #define PPC_CMPWI(a, i) EMIT(PPC_INST_CMPWI | ___PPC_RA(a) | IMM_L(i)) 78cdaade71SMichael Neuling #define PPC_CMPDI(a, i) EMIT(PPC_INST_CMPDI | ___PPC_RA(a) | IMM_L(i)) 79cdaade71SMichael Neuling #define PPC_CMPLWI(a, i) EMIT(PPC_INST_CMPLWI | ___PPC_RA(a) | IMM_L(i)) 80cef1e8cdSNaveen N. Rao #define PPC_CMPLW(a, b) EMIT(PPC_INST_CMPLW | ___PPC_RA(a) | \ 81cef1e8cdSNaveen N. Rao ___PPC_RB(b)) 820ca87f05SMatt Evans 83cdaade71SMichael Neuling #define PPC_SUB(d, a, b) EMIT(PPC_INST_SUB | ___PPC_RT(d) | \ 84cdaade71SMichael Neuling ___PPC_RB(a) | ___PPC_RA(b)) 85cdaade71SMichael Neuling #define PPC_ADD(d, a, b) EMIT(PPC_INST_ADD | ___PPC_RT(d) | \ 86cdaade71SMichael Neuling ___PPC_RA(a) | ___PPC_RB(b)) 87cef1e8cdSNaveen N. Rao #define PPC_MULW(d, a, b) EMIT(PPC_INST_MULLW | ___PPC_RT(d) | \ 88cdaade71SMichael Neuling ___PPC_RA(a) | ___PPC_RB(b)) 89cdaade71SMichael Neuling #define PPC_MULHWU(d, a, b) EMIT(PPC_INST_MULHWU | ___PPC_RT(d) | \ 90cdaade71SMichael Neuling ___PPC_RA(a) | ___PPC_RB(b)) 91cdaade71SMichael Neuling #define PPC_MULI(d, a, i) EMIT(PPC_INST_MULLI | ___PPC_RT(d) | \ 92cdaade71SMichael Neuling ___PPC_RA(a) | IMM_L(i)) 93cdaade71SMichael Neuling #define PPC_DIVWU(d, a, b) EMIT(PPC_INST_DIVWU | ___PPC_RT(d) | \ 94cdaade71SMichael Neuling ___PPC_RA(a) | ___PPC_RB(b)) 95cdaade71SMichael Neuling #define PPC_AND(d, a, b) EMIT(PPC_INST_AND | ___PPC_RA(d) | \ 96cdaade71SMichael Neuling ___PPC_RS(a) | ___PPC_RB(b)) 97cdaade71SMichael Neuling #define PPC_ANDI(d, a, i) EMIT(PPC_INST_ANDI | ___PPC_RA(d) | \ 98cdaade71SMichael Neuling ___PPC_RS(a) | IMM_L(i)) 99cdaade71SMichael Neuling #define PPC_AND_DOT(d, a, b) EMIT(PPC_INST_ANDDOT | ___PPC_RA(d) | \ 100cdaade71SMichael Neuling ___PPC_RS(a) | ___PPC_RB(b)) 101cdaade71SMichael Neuling #define PPC_OR(d, a, b) EMIT(PPC_INST_OR | ___PPC_RA(d) | \ 102cdaade71SMichael Neuling ___PPC_RS(a) | ___PPC_RB(b)) 103cdaade71SMichael Neuling #define PPC_ORI(d, a, i) EMIT(PPC_INST_ORI | ___PPC_RA(d) | \ 104cdaade71SMichael Neuling ___PPC_RS(a) | IMM_L(i)) 105cdaade71SMichael Neuling #define PPC_ORIS(d, a, i) EMIT(PPC_INST_ORIS | ___PPC_RA(d) | \ 106cdaade71SMichael Neuling ___PPC_RS(a) | IMM_L(i)) 10702871903SDaniel Borkmann #define PPC_XOR(d, a, b) EMIT(PPC_INST_XOR | ___PPC_RA(d) | \ 10802871903SDaniel Borkmann ___PPC_RS(a) | ___PPC_RB(b)) 10902871903SDaniel Borkmann #define PPC_XORI(d, a, i) EMIT(PPC_INST_XORI | ___PPC_RA(d) | \ 11002871903SDaniel Borkmann ___PPC_RS(a) | IMM_L(i)) 11102871903SDaniel Borkmann #define PPC_XORIS(d, a, i) EMIT(PPC_INST_XORIS | ___PPC_RA(d) | \ 11202871903SDaniel Borkmann ___PPC_RS(a) | IMM_L(i)) 113cdaade71SMichael Neuling #define PPC_SLW(d, a, s) EMIT(PPC_INST_SLW | ___PPC_RA(d) | \ 114cdaade71SMichael Neuling ___PPC_RS(a) | ___PPC_RB(s)) 115cdaade71SMichael Neuling #define PPC_SRW(d, a, s) EMIT(PPC_INST_SRW | ___PPC_RA(d) | \ 116cdaade71SMichael Neuling ___PPC_RS(a) | ___PPC_RB(s)) 117277285b8SNaveen N. Rao #define PPC_RLWINM(d, a, i, mb, me) EMIT(PPC_INST_RLWINM | ___PPC_RA(d) | \ 118277285b8SNaveen N. Rao ___PPC_RS(a) | __PPC_SH(i) | \ 119277285b8SNaveen N. Rao __PPC_MB(mb) | __PPC_ME(me)) 120277285b8SNaveen N. Rao #define PPC_RLDICR(d, a, i, me) EMIT(PPC_INST_RLDICR | ___PPC_RA(d) | \ 121277285b8SNaveen N. Rao ___PPC_RS(a) | __PPC_SH(i) | \ 122277285b8SNaveen N. Rao __PPC_ME64(me) | (((i) & 0x20) >> 4)) 123277285b8SNaveen N. Rao 1240ca87f05SMatt Evans /* slwi = rlwinm Rx, Ry, n, 0, 31-n */ 125277285b8SNaveen N. Rao #define PPC_SLWI(d, a, i) PPC_RLWINM(d, a, i, 0, 31-(i)) 1260ca87f05SMatt Evans /* srwi = rlwinm Rx, Ry, 32-n, n, 31 */ 127277285b8SNaveen N. Rao #define PPC_SRWI(d, a, i) PPC_RLWINM(d, a, 32-(i), i, 31) 1280ca87f05SMatt Evans /* sldi = rldicr Rx, Ry, n, 63-n */ 129277285b8SNaveen N. Rao #define PPC_SLDI(d, a, i) PPC_RLDICR(d, a, i, 63-(i)) 130277285b8SNaveen N. Rao 131cdaade71SMichael Neuling #define PPC_NEG(d, a) EMIT(PPC_INST_NEG | ___PPC_RT(d) | ___PPC_RA(a)) 1320ca87f05SMatt Evans 1330ca87f05SMatt Evans /* Long jump; (unconditional 'branch') */ 1340ca87f05SMatt Evans #define PPC_JMP(dest) EMIT(PPC_INST_BRANCH | \ 1350ca87f05SMatt Evans (((dest) - (ctx->idx * 4)) & 0x03fffffc)) 1360ca87f05SMatt Evans /* "cond" here covers BO:BI fields. */ 1370ca87f05SMatt Evans #define PPC_BCC_SHORT(cond, dest) EMIT(PPC_INST_BRANCH_COND | \ 1380ca87f05SMatt Evans (((cond) & 0x3ff) << 16) | \ 1390ca87f05SMatt Evans (((dest) - (ctx->idx * 4)) & \ 1400ca87f05SMatt Evans 0xfffc)) 141aaf2f7e0SNaveen N. Rao /* Sign-extended 32-bit immediate load */ 142aaf2f7e0SNaveen N. Rao #define PPC_LI32(d, i) do { \ 143aaf2f7e0SNaveen N. Rao if ((int)(uintptr_t)(i) >= -32768 && \ 144aaf2f7e0SNaveen N. Rao (int)(uintptr_t)(i) < 32768) \ 145aaf2f7e0SNaveen N. Rao PPC_LI(d, i); \ 146aaf2f7e0SNaveen N. Rao else { \ 147aaf2f7e0SNaveen N. Rao PPC_LIS(d, IMM_H(i)); \ 148aaf2f7e0SNaveen N. Rao if (IMM_L(i)) \ 149aaf2f7e0SNaveen N. Rao PPC_ORI(d, d, IMM_L(i)); \ 1500ca87f05SMatt Evans } } while(0) 151aaf2f7e0SNaveen N. Rao 1520ca87f05SMatt Evans #define PPC_LI64(d, i) do { \ 153b1a05787SNaveen N. Rao if ((long)(i) >= -2147483648 && \ 154b1a05787SNaveen N. Rao (long)(i) < 2147483648) \ 1550ca87f05SMatt Evans PPC_LI32(d, i); \ 1560ca87f05SMatt Evans else { \ 157b1a05787SNaveen N. Rao if (!((uintptr_t)(i) & 0xffff800000000000ULL)) \ 158b1a05787SNaveen N. Rao PPC_LI(d, ((uintptr_t)(i) >> 32) & 0xffff); \ 159b1a05787SNaveen N. Rao else { \ 1600ca87f05SMatt Evans PPC_LIS(d, ((uintptr_t)(i) >> 48)); \ 1610ca87f05SMatt Evans if ((uintptr_t)(i) & 0x0000ffff00000000ULL) \ 1620ca87f05SMatt Evans PPC_ORI(d, d, \ 1630ca87f05SMatt Evans ((uintptr_t)(i) >> 32) & 0xffff); \ 164b1a05787SNaveen N. Rao } \ 1650ca87f05SMatt Evans PPC_SLDI(d, d, 32); \ 1660ca87f05SMatt Evans if ((uintptr_t)(i) & 0x00000000ffff0000ULL) \ 1670ca87f05SMatt Evans PPC_ORIS(d, d, \ 1680ca87f05SMatt Evans ((uintptr_t)(i) >> 16) & 0xffff); \ 1690ca87f05SMatt Evans if ((uintptr_t)(i) & 0x000000000000ffffULL) \ 1700ca87f05SMatt Evans PPC_ORI(d, d, (uintptr_t)(i) & 0xffff); \ 171b1a05787SNaveen N. Rao } } while (0) 1720ca87f05SMatt Evans 17309ca5ab2SDenis Kirjanov #ifdef CONFIG_PPC64 17409ca5ab2SDenis Kirjanov #define PPC_FUNC_ADDR(d,i) do { PPC_LI64(d, i); } while(0) 17509ca5ab2SDenis Kirjanov #else 17609ca5ab2SDenis Kirjanov #define PPC_FUNC_ADDR(d,i) do { PPC_LI32(d, i); } while(0) 17709ca5ab2SDenis Kirjanov #endif 17809ca5ab2SDenis Kirjanov 1790ca87f05SMatt Evans static inline bool is_nearbranch(int offset) 1800ca87f05SMatt Evans { 1810ca87f05SMatt Evans return (offset < 32768) && (offset >= -32768); 1820ca87f05SMatt Evans } 1830ca87f05SMatt Evans 1840ca87f05SMatt Evans /* 1850ca87f05SMatt Evans * The fly in the ointment of code size changing from pass to pass is 1860ca87f05SMatt Evans * avoided by padding the short branch case with a NOP. If code size differs 1870ca87f05SMatt Evans * with different branch reaches we will have the issue of code moving from 1880ca87f05SMatt Evans * one pass to the next and will need a few passes to converge on a stable 1890ca87f05SMatt Evans * state. 1900ca87f05SMatt Evans */ 1910ca87f05SMatt Evans #define PPC_BCC(cond, dest) do { \ 1920ca87f05SMatt Evans if (is_nearbranch((dest) - (ctx->idx * 4))) { \ 1930ca87f05SMatt Evans PPC_BCC_SHORT(cond, dest); \ 1940ca87f05SMatt Evans PPC_NOP(); \ 1950ca87f05SMatt Evans } else { \ 1960ca87f05SMatt Evans /* Flip the 'T or F' bit to invert comparison */ \ 1970ca87f05SMatt Evans PPC_BCC_SHORT(cond ^ COND_CMP_TRUE, (ctx->idx+2)*4); \ 1980ca87f05SMatt Evans PPC_JMP(dest); \ 1990ca87f05SMatt Evans } } while(0) 2000ca87f05SMatt Evans 2010ca87f05SMatt Evans /* To create a branch condition, select a bit of cr0... */ 2020ca87f05SMatt Evans #define CR0_LT 0 2030ca87f05SMatt Evans #define CR0_GT 1 2040ca87f05SMatt Evans #define CR0_EQ 2 2050ca87f05SMatt Evans /* ...and modify BO[3] */ 2060ca87f05SMatt Evans #define COND_CMP_TRUE 0x100 2070ca87f05SMatt Evans #define COND_CMP_FALSE 0x000 2080ca87f05SMatt Evans /* Together, they make all required comparisons: */ 2090ca87f05SMatt Evans #define COND_GT (CR0_GT | COND_CMP_TRUE) 2100ca87f05SMatt Evans #define COND_GE (CR0_LT | COND_CMP_FALSE) 2110ca87f05SMatt Evans #define COND_EQ (CR0_EQ | COND_CMP_TRUE) 2120ca87f05SMatt Evans #define COND_NE (CR0_EQ | COND_CMP_FALSE) 2130ca87f05SMatt Evans #define COND_LT (CR0_LT | COND_CMP_TRUE) 2140ca87f05SMatt Evans 2150ca87f05SMatt Evans #endif 2160ca87f05SMatt Evans 2170ca87f05SMatt Evans #endif 218