1b886d83cSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 26ac0ba5aSNaveen N. Rao /* 36ac0ba5aSNaveen N. Rao * bpf_jit.h: BPF JIT compiler for PPC 40ca87f05SMatt Evans * 50ca87f05SMatt Evans * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation 6156d0e29SNaveen N. Rao * 2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> 70ca87f05SMatt Evans */ 80ca87f05SMatt Evans #ifndef _BPF_JIT_H 90ca87f05SMatt Evans #define _BPF_JIT_H 100ca87f05SMatt Evans 110ca87f05SMatt Evans #ifndef __ASSEMBLY__ 120ca87f05SMatt Evans 13156d0e29SNaveen N. Rao #include <asm/types.h> 1406541865SBalamuruhan S #include <asm/ppc-opcode.h> 15156d0e29SNaveen N. Rao 16156d0e29SNaveen N. Rao #ifdef PPC64_ELF_ABI_v1 170ca87f05SMatt Evans #define FUNCTION_DESCR_SIZE 24 1809ca5ab2SDenis Kirjanov #else 1909ca5ab2SDenis Kirjanov #define FUNCTION_DESCR_SIZE 0 2009ca5ab2SDenis Kirjanov #endif 210ca87f05SMatt Evans 220ca87f05SMatt Evans #define PLANT_INSTR(d, idx, instr) \ 230ca87f05SMatt Evans do { if (d) { (d)[idx] = instr; } idx++; } while (0) 240ca87f05SMatt Evans #define EMIT(instr) PLANT_INSTR(image, ctx->idx, instr) 250ca87f05SMatt Evans 260ca87f05SMatt Evans /* Long jump; (unconditional 'branch') */ 273832ba4eSNaveen N. Rao #define PPC_JMP(dest) \ 283832ba4eSNaveen N. Rao do { \ 293832ba4eSNaveen N. Rao long offset = (long)(dest) - (ctx->idx * 4); \ 30acd7408dSNaveen N. Rao if ((dest) != 0 && !is_offset_in_branch_range(offset)) { \ 313832ba4eSNaveen N. Rao pr_err_ratelimited("Branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx); \ 323832ba4eSNaveen N. Rao return -ERANGE; \ 333832ba4eSNaveen N. Rao } \ 34f15a71b3SHari Bathini EMIT(PPC_RAW_BRANCH(offset)); \ 353832ba4eSNaveen N. Rao } while (0) 363832ba4eSNaveen N. Rao 3774bbe3f0SNaveen N. Rao /* bl (unconditional 'branch' with link) */ 3874bbe3f0SNaveen N. Rao #define PPC_BL(dest) EMIT(PPC_INST_BL | (((dest) - (unsigned long)(image + ctx->idx)) & 0x03fffffc)) 3974bbe3f0SNaveen N. Rao 400ca87f05SMatt Evans /* "cond" here covers BO:BI fields. */ 413832ba4eSNaveen N. Rao #define PPC_BCC_SHORT(cond, dest) \ 423832ba4eSNaveen N. Rao do { \ 433832ba4eSNaveen N. Rao long offset = (long)(dest) - (ctx->idx * 4); \ 44acd7408dSNaveen N. Rao if ((dest) != 0 && !is_offset_in_cond_branch_range(offset)) { \ 453832ba4eSNaveen N. Rao pr_err_ratelimited("Conditional branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx); \ 463832ba4eSNaveen N. Rao return -ERANGE; \ 473832ba4eSNaveen N. Rao } \ 483832ba4eSNaveen N. Rao EMIT(PPC_INST_BRANCH_COND | (((cond) & 0x3ff) << 16) | (offset & 0xfffc)); \ 493832ba4eSNaveen N. Rao } while (0) 503832ba4eSNaveen N. Rao 51aaf2f7e0SNaveen N. Rao /* Sign-extended 32-bit immediate load */ 52aaf2f7e0SNaveen N. Rao #define PPC_LI32(d, i) do { \ 53aaf2f7e0SNaveen N. Rao if ((int)(uintptr_t)(i) >= -32768 && \ 54aaf2f7e0SNaveen N. Rao (int)(uintptr_t)(i) < 32768) \ 553a181237SBalamuruhan S EMIT(PPC_RAW_LI(d, i)); \ 56aaf2f7e0SNaveen N. Rao else { \ 573a181237SBalamuruhan S EMIT(PPC_RAW_LIS(d, IMM_H(i))); \ 58aaf2f7e0SNaveen N. Rao if (IMM_L(i)) \ 593a181237SBalamuruhan S EMIT(PPC_RAW_ORI(d, d, IMM_L(i))); \ 600ca87f05SMatt Evans } } while(0) 61aaf2f7e0SNaveen N. Rao 627b187dcdSNaveen N. Rao #ifdef CONFIG_PPC64 630ca87f05SMatt Evans #define PPC_LI64(d, i) do { \ 64b1a05787SNaveen N. Rao if ((long)(i) >= -2147483648 && \ 65b1a05787SNaveen N. Rao (long)(i) < 2147483648) \ 660ca87f05SMatt Evans PPC_LI32(d, i); \ 670ca87f05SMatt Evans else { \ 68b1a05787SNaveen N. Rao if (!((uintptr_t)(i) & 0xffff800000000000ULL)) \ 693a181237SBalamuruhan S EMIT(PPC_RAW_LI(d, ((uintptr_t)(i) >> 32) & \ 703a181237SBalamuruhan S 0xffff)); \ 71b1a05787SNaveen N. Rao else { \ 723a181237SBalamuruhan S EMIT(PPC_RAW_LIS(d, ((uintptr_t)(i) >> 48))); \ 730ca87f05SMatt Evans if ((uintptr_t)(i) & 0x0000ffff00000000ULL) \ 743a181237SBalamuruhan S EMIT(PPC_RAW_ORI(d, d, \ 753a181237SBalamuruhan S ((uintptr_t)(i) >> 32) & 0xffff)); \ 76b1a05787SNaveen N. Rao } \ 773a181237SBalamuruhan S EMIT(PPC_RAW_SLDI(d, d, 32)); \ 780ca87f05SMatt Evans if ((uintptr_t)(i) & 0x00000000ffff0000ULL) \ 793a181237SBalamuruhan S EMIT(PPC_RAW_ORIS(d, d, \ 803a181237SBalamuruhan S ((uintptr_t)(i) >> 16) & 0xffff)); \ 810ca87f05SMatt Evans if ((uintptr_t)(i) & 0x000000000000ffffULL) \ 823a181237SBalamuruhan S EMIT(PPC_RAW_ORI(d, d, (uintptr_t)(i) & \ 833a181237SBalamuruhan S 0xffff)); \ 84b1a05787SNaveen N. Rao } } while (0) 8509ca5ab2SDenis Kirjanov #endif 8609ca5ab2SDenis Kirjanov 870ca87f05SMatt Evans /* 880ca87f05SMatt Evans * The fly in the ointment of code size changing from pass to pass is 890ca87f05SMatt Evans * avoided by padding the short branch case with a NOP. If code size differs 900ca87f05SMatt Evans * with different branch reaches we will have the issue of code moving from 910ca87f05SMatt Evans * one pass to the next and will need a few passes to converge on a stable 920ca87f05SMatt Evans * state. 930ca87f05SMatt Evans */ 940ca87f05SMatt Evans #define PPC_BCC(cond, dest) do { \ 954549c3eaSNaveen N. Rao if (is_offset_in_cond_branch_range((long)(dest) - (ctx->idx * 4))) { \ 960ca87f05SMatt Evans PPC_BCC_SHORT(cond, dest); \ 973a181237SBalamuruhan S EMIT(PPC_RAW_NOP()); \ 980ca87f05SMatt Evans } else { \ 990ca87f05SMatt Evans /* Flip the 'T or F' bit to invert comparison */ \ 1000ca87f05SMatt Evans PPC_BCC_SHORT(cond ^ COND_CMP_TRUE, (ctx->idx+2)*4); \ 1010ca87f05SMatt Evans PPC_JMP(dest); \ 1020ca87f05SMatt Evans } } while(0) 1030ca87f05SMatt Evans 1040ca87f05SMatt Evans /* To create a branch condition, select a bit of cr0... */ 1050ca87f05SMatt Evans #define CR0_LT 0 1060ca87f05SMatt Evans #define CR0_GT 1 1070ca87f05SMatt Evans #define CR0_EQ 2 1080ca87f05SMatt Evans /* ...and modify BO[3] */ 1090ca87f05SMatt Evans #define COND_CMP_TRUE 0x100 1100ca87f05SMatt Evans #define COND_CMP_FALSE 0x000 1110ca87f05SMatt Evans /* Together, they make all required comparisons: */ 1120ca87f05SMatt Evans #define COND_GT (CR0_GT | COND_CMP_TRUE) 1130ca87f05SMatt Evans #define COND_GE (CR0_LT | COND_CMP_FALSE) 1140ca87f05SMatt Evans #define COND_EQ (CR0_EQ | COND_CMP_TRUE) 1150ca87f05SMatt Evans #define COND_NE (CR0_EQ | COND_CMP_FALSE) 1160ca87f05SMatt Evans #define COND_LT (CR0_LT | COND_CMP_TRUE) 11720dbf5ccSDaniel Borkmann #define COND_LE (CR0_GT | COND_CMP_FALSE) 1180ca87f05SMatt Evans 119c426810fSChristophe Leroy #define SEEN_FUNC 0x20000000 /* might call external helpers */ 120c9ce7c36SRavi Bangoria #define SEEN_TAILCALL 0x40000000 /* uses tail calls */ 121f1b1583dSChristophe Leroy 122f1b1583dSChristophe Leroy struct codegen_context { 123f1b1583dSChristophe Leroy /* 124f1b1583dSChristophe Leroy * This is used to track register usage as well 125f1b1583dSChristophe Leroy * as calls to external helpers. 126f1b1583dSChristophe Leroy * - register usage is tracked with corresponding 127c426810fSChristophe Leroy * bits (r3-r31) 128f1b1583dSChristophe Leroy * - rest of the bits can be used to track other 129c426810fSChristophe Leroy * things -- for now, we use bits 0 to 2 130f1b1583dSChristophe Leroy * encoded in SEEN_* macros above 131f1b1583dSChristophe Leroy */ 132f1b1583dSChristophe Leroy unsigned int seen; 133f1b1583dSChristophe Leroy unsigned int idx; 134f1b1583dSChristophe Leroy unsigned int stack_size; 135*49c3af43SNaveen N. Rao int b2p[MAX_BPF_JIT_REG + 2]; 136983bdc02SRavi Bangoria unsigned int exentry_idx; 1370ffdbce6SNaveen N. Rao unsigned int alt_exit_addr; 138f1b1583dSChristophe Leroy }; 139f1b1583dSChristophe Leroy 140*49c3af43SNaveen N. Rao #define bpf_to_ppc(r) (ctx->b2p[r]) 141*49c3af43SNaveen N. Rao 14223b51916SHari Bathini #ifdef CONFIG_PPC32 14323b51916SHari Bathini #define BPF_FIXUP_LEN 3 /* Three instructions => 12 bytes */ 14423b51916SHari Bathini #else 145983bdc02SRavi Bangoria #define BPF_FIXUP_LEN 2 /* Two instructions => 8 bytes */ 14623b51916SHari Bathini #endif 147983bdc02SRavi Bangoria 148f1b1583dSChristophe Leroy static inline void bpf_flush_icache(void *start, void *end) 149f1b1583dSChristophe Leroy { 150f1b1583dSChristophe Leroy smp_wmb(); /* smp write barrier */ 151f1b1583dSChristophe Leroy flush_icache_range((unsigned long)start, (unsigned long)end); 152f1b1583dSChristophe Leroy } 153f1b1583dSChristophe Leroy 154f1b1583dSChristophe Leroy static inline bool bpf_is_seen_register(struct codegen_context *ctx, int i) 155f1b1583dSChristophe Leroy { 156f1b1583dSChristophe Leroy return ctx->seen & (1 << (31 - i)); 157f1b1583dSChristophe Leroy } 158f1b1583dSChristophe Leroy 159f1b1583dSChristophe Leroy static inline void bpf_set_seen_register(struct codegen_context *ctx, int i) 160f1b1583dSChristophe Leroy { 161f1b1583dSChristophe Leroy ctx->seen |= 1 << (31 - i); 162f1b1583dSChristophe Leroy } 163f1b1583dSChristophe Leroy 16440272035SChristophe Leroy static inline void bpf_clear_seen_register(struct codegen_context *ctx, int i) 16540272035SChristophe Leroy { 16640272035SChristophe Leroy ctx->seen &= ~(1 << (31 - i)); 16740272035SChristophe Leroy } 16840272035SChristophe Leroy 169*49c3af43SNaveen N. Rao void bpf_jit_init_reg_mapping(struct codegen_context *ctx); 17043d636f8SNaveen N. Rao int bpf_jit_emit_func_call_rel(u32 *image, struct codegen_context *ctx, u64 func); 1714ea76e90SChristophe Leroy int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, struct codegen_context *ctx, 172983bdc02SRavi Bangoria u32 *addrs, int pass); 1734ea76e90SChristophe Leroy void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx); 1744ea76e90SChristophe Leroy void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx); 17540272035SChristophe Leroy void bpf_jit_realloc_regs(struct codegen_context *ctx); 1760ffdbce6SNaveen N. Rao int bpf_jit_emit_exit_insn(u32 *image, struct codegen_context *ctx, int tmp_reg, long exit_addr); 1774ea76e90SChristophe Leroy 178983bdc02SRavi Bangoria int bpf_add_extable_entry(struct bpf_prog *fp, u32 *image, int pass, struct codegen_context *ctx, 179983bdc02SRavi Bangoria int insn_idx, int jmp_off, int dst_reg); 180983bdc02SRavi Bangoria 1810ca87f05SMatt Evans #endif 1820ca87f05SMatt Evans 1830ca87f05SMatt Evans #endif 184